JPH0479186B2 - - Google Patents

Description

[Detailed Description of the Invention] (A) Technical Field of the Invention The present invention relates to a phase modulation signal receiving device, and in particular, to a phase modulation signal receiving device, in particular, a point (Sr+jSi) on the (X, jY) plane during two-phase phase modulation.
and the point (-Sr-jSi) as the decision point is received, and the point (Sr+jSi) on the (X, jY) plane is received.
and point (−Sr+jSi), point (−Sr−jSi), and point (Sr−
The present invention relates to a phase modulated signal receiving device in which a receiving process and a processing mode of a four-phase phase modulated signal using jSi) as a decision point are shared.

(B) Technical background and problems Traditionally, in data transmission using phase modulation, V ₂₂ (CCITT) uses four-phase phase modulation with four decision points as shown in Figure 1A at 1200 bit/s. signal, and in the case of 600 bit/s, the first
As shown in Figure B, the signal is a two-phase phase modulation signal having binary decision points. Also in V ₂₆ (CCITT)
In the case of 2400 bit/s, it is considered as a four-phase phase modulation signal,
In the case of 1200 bit/s, it is a two-phase phase modulation signal.

In the case shown in FIG. 1A, based on the polarity of the coordinate value Sr and the polarity of the coordinate value Si of the received signal, in the case of (+, +), it is determined that the position is on the plane A shown in the figure. In the case of (-, +), it is determined that it is located on surface B, in the case of (-, -), it is determined that it is located on surface C, and in the case of (+, -), it is determined that it is located on surface B. is determined to be located on plane D. In addition, in the case shown in FIG. 1B, based on the polarity of the coordinate value Sr of the received signal, if it is (+), it is assumed to be located on plane A+D, and if it is (-), it is assumed that it is located on plane (B+C). )
It is determined that it is located above.

Conventionally, as mentioned above, the decision point in a four-phase phase modulation signal and the decision point in a two-phase phase modulation signal corresponded to planes of different dimensions, so there was a problem that the reception processing programs were different. Ta.

(C) Object and structure of the invention The present invention aims to solve the above points. That is, in the case of the present invention, as described later, 4
When the decision points for phase modulation are as shown by the black dots in FIG. 2A, the reception processing is The purpose is to make programs virtually common. Therefore, the phase modulated signal receiving device of the present invention receives a reference value from an A/D converter that converts a received signal into a digital signal, and a processor side, and performs arithmetic processing based on the A/D converted result. In a phase modulated signal receiving device having an arithmetic unit and a processor that receives the arithmetic result from the arithmetic unit and determines received data, the arithmetic unit calculates a point (Sr+jSi) and a point on the (X, jY) plane. (−Sr＋jSi) and point (−Sr−jSi)
and the point (Sr−jSi) as the decision point and the point (Sr+jSi) on the (X, jY) plane.
jSi) and the point (-Sr-jSi) as decision points, and the calculation unit is configured to receive at least a two-phase phase modulation signal having judgment points of the four-phase phase modulation signal and the two-phase phase modulation signal. In the same way as in the case of a signal, the value Sr is calculated based on the above received signal.
The polarity of the value Sr, the polarity of the value Si, and the polarity of the value (Sr+Si) are extracted and transferred to the processor side, and the processor extracts the polarity of the value Sr and the polarity of the value Si when receiving data during the four-phase phase modulation. Based on the combination with polarity, the above point (Sr + jSi) and point (−Sr
+jSi), the point (-Sr-jSi), and the point (Sr-jSi)
When receiving data during phase modulation, the above point (Sr + jSi) is determined based on the polarity of the recorded value Sr and the polarity of the value Si.
The binary received data corresponding to the point (-Sr-jSi) is determined, and the point (Sr
+jSi) and point (-Sr-jSi) in the same phase range as two of the four points mentioned above during the four-phase phase modulation, and when data cannot be identified only by the polarity of the value Sr and the polarity of the value Si. , the reception data is determined based on the polarity of the value (Sr+Si). This will be explained below with reference to the drawings.

(D) Embodiment of the Invention FIG. 2 is an explanatory diagram for explaining determination points used in the present invention, and FIG. 3 shows the configuration of an embodiment of the present invention.

When the decision points for the four-phase phase modulation signal are the point (Sr+jSi), the point (-Sr+jSi), the point (-Sr-jSi), and the point (Sr-jSi) as shown in FIG. As an example, the decision points for a two-phase phase modulation signal are the point (Sr+jSi) and the point (-) as shown in FIG. 2B.
Sr−jSi). By doing this, when associating points corresponding to judgment points with received data, substantially the same phase range is extracted, and the reception processing program can be made common to the case shown in FIG. 2A. It becomes possible to achieve this goal.

However, when the determination point is determined as shown in FIG. 2B, (i) the polarity of the value Sr and (ii) where any of planes A, B, C, and D shown in FIG. ) value Si, the planes B-1 and B- shown in FIG.
2, D-1, and D-2, the microprocessor 3 judges the received data based on the polarity of the value (Sr+Si). Therefore, in one embodiment of the present invention, as shown in FIG. 3, the polarity of the value (Sr+Si) is notified. In other words, when receiving a 4-phase phase modulation signal, 2
When receiving a phase modulation signal, the polarity of Sr, the polarity of Si, and (Sr+Si) are distinguished without distinguishing between the two.
At the same time, the two points (Sr + jSi) when the binary phase modulation signal is received are
and the point (-Sr-jSi) are values corresponding to the four points when the quadrature phase modulation signal is received, for example,
It is sufficient to perform the subsequent processing by regarding them as "00" and "11".

FIG. 3 shows the configuration of an embodiment of the present invention, in which reference numeral 1 is an A/D conversion section, 2 is an arithmetic section, 3 is a microprocessor that performs judgment, and 4 is a coordinate value extraction circuit. part, 5 is (Sr+Si) polarity discrimination part, 6 is
It represents the Sr polarity/Si polarity discrimination section.

In the illustrated embodiment, the coordinate values of the received signal converted into a digital signal by the A/D converter, that is, (Sr+jSi) or (-Sr+jSi) or (-Sr-
Coordinate values corresponding to four-phase phase modulation, which are either jSi) or (Sr−jSi), or (Sr+jSi)
or (-Sr-jSi), which corresponds to the coordinate value at the time of two-phase phase modulation, is supplied to the calculation unit 2. In the calculation section 2, one of the above coordinate values is supplied to the coordinate value extraction circuit section 4. In the coordinate value extraction circuit section 4, the real part Sr and the imaginary part Si are separated, and the value is further extracted to extract the polarity of the value (Sr+Si).
Sr and Si are added by an adder. Note that the illustrated reference value notifies the decision point shown in FIG. 2A in the case of receiving a four-phase phase modulation signal, and notifies the decision point shown in FIG. 2B in the case of receiving a two-phase phase modulation signal. You can think of it as something you do.

From the above calculation unit 2, (i) polarity of (Sr+Si), (ii)
The microprocessor that receives the polarity of Sr and (iii) the polarity of Si uses the discriminator 6 when receiving a four-phase phase modulation signal, and uses only the discriminator 6 when receiving a two-phase phase modulation signal, if the microprocessor cannot make a determination. Discrimination unit 5
Determine the received data using In the subsequent processing, among the four signals "00", "01", "11", and "10" when receiving the four-phase phase modulation signal, when receiving the two-phase phase modulation signal, the signal " Only the signals "00" and "11" are considered to have been received.

In FIG. 3, the calculation section 2 has been described as having its own processing circuit as the coordinate value extraction circuit section 4. However, in order to obtain the polarity of the value (Sr+Si), the following multiplication process may be performed to extract the polarity of the real part. That is, (Sr+jSi)(cos45゜−jsin45゜) =1/√2(Sr+jSi)(1−j) =1/√2 {(Sr+Si)+j(Si−Sr)} (E) Effect of the invention As explained above According to the present invention, since the coordinates of the decision point during four-phase phase modulation and the coordinates of the decision point during two-phase phase modulation both have the form (Sr+jSi), the coordinates of the decision point correspond to the decision point. When associating the detected points with the received data, it becomes possible to extract substantially the same phase range, and it becomes possible to use a common program.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram explaining conventional judgment points, and Fig. 2
The figure is an explanatory diagram for explaining determination points used in the present invention, and FIG. 3 shows the configuration of an embodiment of the present invention. In the figure, 1 is an A/D conversion section, 2 is a calculation section, 3 is a microprocessor, 4 is a coordinate value extraction circuit section, 5 is a (Sr+Si) polarity discrimination section, and 6 is an Sr polarity/Si polarity discrimination section. .

Claims (1)

[Scope of Claims] 1. An A/D converter that converts a received signal into a digital signal, an arithmetic unit that receives a reference value from a processor and performs arithmetic processing based on the A/D converted result, and the arithmetic operation. In a phase modulation signal receiving device having a processor that receives calculation results from a processor and determines received data, the calculation part calculates points (Sr+jSi), (−Sr+jSi) and points on the (X, jY) plane. (−Sr−jSi)
and the point (Sr−jSi) as the decision point and the point (Sr+jSi) on the (X, jY) plane.
jSi) and the point (-Sr-jSi) as decision points, and the calculation unit is configured to receive at least a two-phase phase modulation signal having judgment points of the four-phase phase modulation signal and the two-phase phase modulation signal. In the same way as in the case of a signal, the value Sr is calculated based on the above received signal.
The polarity of the value Sr, the polarity of the value Si, and the polarity of the value (Sr+Si) are extracted and transferred to the processor side, and the processor extracts the polarity of the value Sr and the polarity of the value Si when receiving data during the four-phase phase modulation. Based on the combination with polarity, the above point (Sr + jSi) and point (−Sr
+jSi), the point (-Sr-jSi), and the point (Sr-jSi)
When receiving data during phase modulation, the above point (Sr +
The binary reception data corresponding to the points (-Sr-jSi) and (-Sr-jSi) are determined, and the points (Sr+jSi) and (-Sr-jSi) at the time of the two-phase phase modulation are converted into the four-phase phase modulation. A phase modulated signal receiving device characterized in that the phase range is the same as two of the four points at the time. 2. When data cannot be identified based only on the polarity of the value Sr and the polarity of the value Si during data reception during the two-phase phase modulation described above, the received data is determined based on the polarity of the value (Sr + Si). A phase modulated signal receiving device according to claim 1, characterized in that: