JPH0479172B2 - - Google Patents

Description

TECHNICAL FIELD The present invention relates to optically driven solid state relays.

(Background Art) FIG. 5 is a circuit diagram showing a conventional solid state relay. In the same figure, 1a and 1b are input terminals, 8
a and 8b are output terminals. Input terminals 1a, 1b
A light emitting diode 2 is connected between them. The photovoltaic element 3 includes a plurality of solar cells connected in series, and each solar cell is arranged to receive the light emitted by the light emitting diode 2. The positive end of the photovoltaic element 3 is connected to the gate of the output MOS transistor 7, and the negative end thereof is connected to the source of the MOS transistor 7 via the impedance element 6. Between the gate and source of the MOS transistor 7, the drain and source of the depletion type static induction transistor 4 are connected. The gate and source of the static induction transistor 4 are connected to both ends of the impedance element 6, respectively. The drain and source of the MOS transistor 7 are connected to output terminals 8a and 8b of the solid state relay, respectively.

The operation of the circuit shown in FIG. 5 will be explained below. First, when a current is input between the input terminals 1a and 1b of the solid state relay, the light emitting diode 2 emits light. The light emitted by the light emitting diode 2 is
The light is received by each solar cell constituting the photovoltaic element 3, and each solar cell generates a voltage across its ends. A voltage multiplied by the number of solar cells is generated across the photovoltaic element 3, and this voltage causes a current to flow into the impedance element 6 through the drain and source of the static induction transistor 4. When current flows through the impedance element 6, a voltage is generated across the impedance element 6 such that the gate of the static induction transistor 4 has a negative polarity with respect to the source. Therefore, a negative bias is applied between the gate and source of the static induction transistor 4 by the impedance element 6, and a high impedance state is created between the drain and source of the static induction transistor 4. Here, the impedance element 6 is set so that a small amount of current necessary for negative bias flows between the drain and source of the electrostatic transistor 4 while being in a high impedance state. Since the drain and source of the static induction transistor 4 are in a high impedance state, a voltage is applied between the gate and source of the MOS transistor 7, and the MOS transistor 7 is turned on.
With MOS transistor 7 turned on,
The output terminals 8a and 8b of the solid state relay become electrically conductive.

Next, when no current flows between the input terminals 1a and 1b of the solid state relay, the light emitting diode 2 stops emitting light. With no light irradiation, each solar cell constituting the photovoltaic element 3 no longer generates voltage, and no voltage is generated at both ends of the photovoltaic element 3. For this reason, impedance element 6
As the voltage across the MOS transistor 7 decreases and the negative bias of the static induction transistor 4 decreases, the drain and source of the static induction transistor 4 become in a low impedance state, and the voltage stored between the gate and source of the MOS transistor 7 is reduced. The accumulated charge is bypassed to the electrostatic induction transistor 4 and is transferred to the MOS transistor 7.
is in the off state. Therefore, there is no conduction between the output terminals 8a and 8b of the solid state relay.

Next, the problems of the conventional example shown in FIG. 5 will be explained. MOS transistor 7 does not conduct electricity unless the voltage between its gate and source exceeds a predetermined threshold voltage necessary for self-conduction. Therefore, in order to make the MOS transistor 7 conductive, it is better to have a high voltage between its gate and source. However, if the voltage between the gate and source of the MOS transistor 7 is increased, the drain and
Since the voltage applied between the sources also increases, the threshold voltage between the gate and source required to make the static induction transistor 4 high impedance increases, causing the problem that the solid state relay cannot be driven with a small input current. It was hot.

(Objective of the Invention) The present invention has been made in view of the above points, and its object is to provide a solid state relay that can be driven with a small input current.

(Disclosure of the Invention) FIG. 1 is a circuit diagram showing a solid state relay according to an embodiment of the present invention. In this embodiment, the drain and source of another static induction transistor 5 are connected between the gate of the MOS transistor 7 and the drain of the static induction transistor 4 in the conventional example shown in FIG. The gate and source of the electrostatic induction transistor 5 are connected to the gate and drain of the electrostatic induction transistor 4, respectively. The other configurations are the same as the conventional example shown in FIG.

The operation of the circuit shown in FIG. 1 will be explained below. First, when a current is input between the input terminals 1a and 1b of the solid state relay, the light emitting diode 2 emits light.

The light irradiated by the light emitting diode 2 is received by each solar cell constituting the photovoltaic element 3,
Each solar cell generates a voltage across it. A voltage multiplied by the number of solar cells is generated across the photovoltaic element 3, and the voltage is applied to the impedance element 6 through the drains and sources of the static induction transistors 4 and 5 connected in series. Current flows. When current flows through the impedance element 6, a voltage is generated across the impedance element 6 such that the gate of the static induction transistor 4 has a negative polarity with respect to the source. Therefore, a negative bias is applied between the gate and source of the static induction transistor 4 by the impedance element 6,
The drain and source of the static induction transistor 4 are in a high impedance state. With the static induction transistor 4 in a high impedance state,
At the same time, a voltage that is the sum of the voltage drop of the static induction transistor 4 and the voltage across the impedance element 6 is applied between the gate and source of the static induction transistor 5 as a negative bias. A high impedance state exists between the sources. Here, an impedance element 6 is set so that a slight current flows between the drains and sources of the electrostatic induction transistors 4 and 5 to obtain a voltage necessary for negative bias, although the transistors are in a high impedance state. Static induction transistor 4, 5
As a result, a voltage is applied between the gate and source of the MOS transistor 7, and the MOS transistor 7 is turned on. Since the MOS transistor 7 is turned on, the output terminals 8a and 8b of the solid state relay become conductive.

Next, when no current flows between the solid state relay input terminals 1a and 1b, the light emitting diode 2 stops emitting light. With no light irradiation, each solar cell constituting the photovoltaic element 3 no longer generates voltage, and no voltage is generated at both ends of the photovoltaic element 3. Therefore, the voltage across the impedance element 6 decreases, and the electrostatic induction transistors 4 and 5
Since the negative bias of MOS transistors 4 and 5 decreases, the impedance between the drains and sources of the static induction transistors 4 and 5 becomes low, and the charge stored between the gate and source of the MOS transistor 7 is transferred to the static induction transistors 4 and 5. is bypassed, and the MOS transistor 7 is turned off. Therefore, there is no conduction between the output terminals 8a and 8b of the solid state relay.

Here, the threshold value of the static induction transistor 5 is the voltage applied between the drain and source of the static induction transistor 4 and the impedance element 6. The voltage applied between the drain and source of the static induction transistor 4 is a value obtained by subtracting the voltage applied to the impedance element 6 from the threshold value of the static induction transistor 5, which is a considerably small value. If the voltage applied between the drain and source of the static induction transistor 4 is small, its threshold value will be correspondingly small, so that even if the negative bias voltage by the impedance element 6 is small, the static induction transistor 4 will be in a high impedance state. .

Figure 2 is a characteristic diagram showing the relationship between the gate-source voltage V _GS and the drain-source current I _DS of a static induction transistor _{. DS} =
The characteristic curve is shown when changing the voltage in the range of 0.2 to 8V. As shown in the figure, if the drain-source voltage V _DS of the static induction transistor is set low, even if the negative bias voltage V _GS applied between the gate and source is small, the drain-source current I _DS can be lowered. This shows that even if the negative bias applied between the gate and source of the static induction transistor is small, the static induction transistor can be brought into a high impedance state.

FIG. 3 is a characteristic diagram showing the relationship between the input current of the solid state relay shown in FIG. 1 and the drain-source voltage of the two static induction transistors 4 and 5.
In the same figure, the horizontal axis is the input current I _F of the solid state relay
, the left vertical axis is the drain-source voltage V _DS1 of the first static induction transistor 4, and the right vertical axis is the drain-source voltage of the second static induction transistor 5.
V _DS2 are shown respectively. Static induction transistor 5
As shown in characteristic curve A, as the input current I _F is increased, the drain-source voltage V _DS2 rises, becoming high impedance at operating point a, and the drain-source voltage in that case is V _DS2 is approx.
It becomes 5V. The characteristics of the static induction transistor 4 are as follows:
As shown in characteristic curve B, as the input current I _F is increased, the drain-source voltage V _DS1 rises, and the impedance becomes high at operating point b. In this case, the drain-source voltage V _DS1 is approximately 0.37. It becomes V.
That is, compared to the voltage V _DS2 applied between the drain and source of the static induction transistor 5, the voltage V _DS1 applied between the drain and source of the static induction transistor 4 has a lower value. Voltage applied between the drain and source of the static induction transistor 4
As V _DS1 becomes a low value, as is clear from FIG. 2, the threshold value of the static induction transistor 4 also becomes low, and as a result, a static induction transistor with a low threshold value is used. In the present invention, by using two static induction transistors 4 and 5 in this way, one static induction transistor 4
Since the threshold value can be lowered, even if the negative bias voltage generated across the impedance element 6 is small, the current flowing between the drain and source of the static induction transistor 4 can be lowered, as shown in FIG. Compared to the case where the electrostatic induction transistor 4 shown in the example is used alone, it is easier to bring the electrostatic induction transistor 4 into a high impedance state.

FIG. 4 is a characteristic diagram showing the relationship between input current and output current of the solid state relay of the present invention. In the figure, the horizontal axis represents the input current I _F of the solid state relay, the left vertical axis represents the drain-source current I _{DS of the MOS transistor 7, which is the output current of the solid state relay, and the right horizontal axis represents the solid state relay output current I DS} .
Gate-source voltage of MMOS transistor 7
V _GS are shown respectively. In the figure, characteristic curves D1 to D5 represent the measurement results when the threshold of the static induction transistor 5 is fixed and five static induction transistors 4 with different threshold values are used. The static induction transistors are shown in order from lowest to lowest. In addition, the characteristic curves C1 to C
5 indicates the voltage V _GS applied between the gate and source of the MOS transistor 7 for each of the above characteristic curves D1 to D5. As is clear from each characteristic curve, if the threshold value of the static induction transistor is reduced, the input current can be reduced.
The MOS transistor 7 can be driven. From this, it can be seen that it is advantageous to use a static induction transistor with a low threshold value.

In this embodiment, a normally open solid state relay is constructed using an enhancement type output MOS transistor 7, but a normally closed solid state relay is constructed using a depletion type output MOS transistor. Needless to say, it's good.

(Effects of the Invention) As described above, the present invention applies photovoltaic force from a photovoltaic element that receives light emitted from a light emitting element connected to an input terminal between a gate and a source via an impedance element. Two depletion type static induction transistors are connected in series between the gate and source of an output MOS transistor whose drain and source are connected to the output terminal, and the impedance element and the photovoltaic element are connected. The gates of each of the electrostatic induction transistors are connected to the connection points, and the first electrostatic induction transistor is placed in a high impedance state due to the voltage drop that occurs across the impedance element when photovoltaic force is generated by the photovoltaic element. Since the second static induction transistor is biased to a high impedance state by the composite voltage of the voltage drop occurring across the impedance element and the voltage drop of the first static induction transistor, the first static induction transistor is biased to a high impedance state. The voltage applied between the drain and source of the first static induction transistor becomes smaller, and the gate-source threshold becomes lower, so even if the negative bias voltage generated across the impedance element is small, the first static induction transistor can be Therefore, the conventional depletion type static induction transistor can be in a high impedance state.
This has the advantage that a solid state relay can be driven with a small input current compared to the case of a single relay.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a solid state relay according to an embodiment of the present invention, FIG. 2 is a characteristic diagram showing the relationship between the static induction transistor gate-source voltage and drain-source current in the same example, and FIG. The figure is a characteristic diagram showing the relationship between the input current of the solid state relay shown in Figure 1 and the drain-source voltage of the two static induction transistors, and Figure 4 is a characteristic diagram showing the relationship between the input current and the output current of the solid state relay of the present invention. FIG. 5 is a circuit diagram showing a conventional solid state relay. 1a and 1b are input terminals, 2 is a light emitting diode,
3 is a photovoltaic element, 4 and 5 are depletion type static induction transistors, 6 is an impedance element, 7 is an output MOS transistor, 8a, 8b
is the output terminal.

Claims (1)

[Claims] 1 A pair of input terminals, a light emitting element in contact with the input terminal, a photovoltaic element arranged to receive light emitted by the light emitting element, and a photovoltaic element connected in series with the photovoltaic element. an output MOS transistor that changes from a first impedance state to a second impedance state by applying photovoltaic force from the photovoltaic element between the gate and the source through the impedance element; a pair of output terminals connected to the drain and source of the output MOS transistor, respectively, and a source connected to one of the gate and source of the output MOS transistor,
A gate is connected to a connection point between the impedance element and the photovoltaic element and is biased to a high impedance state by a voltage drop that occurs across the impedance element when the photovoltaic element generates a photovoltaic force. 1 depletion type static induction transistor, and the drain is for the output.
connected to the other of the gate and source of the MOS transistor, the source connected to the drain of the first static induction transistor, and the gate connected to the connection point between the impedance element and the photovoltaic element, A second transistor biased to a high impedance state by a composite voltage of a voltage drop occurring across the impedance element and a voltage drop occurring across the first static induction transistor when photovoltaic force is generated by the photovoltaic element. 1. A solid state relay comprising a depletion type electrostatic induction transistor.