JPH0477297B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a camera in which the shutter time is set to a constant strobe synchronization time during flash photography.

2. Description of the Related Art Cameras that automatically set the shutter time to a constant strobe synchronization time when a strobe is attached to perform flash photography are already well known.
In this way, when taking flash photography, forcing the shutter speed to be fixed to a fixed strobe synchronization speed, for example 1/60 second, is a problem because the strobe's flash emission time is extremely short, so it is difficult to use the flash with the shutter fully open. This is because a flash must be emitted.

By the way, it goes without saying that even in such a camera, the exposure level is determined from the strobe synchronization time, the photometered luminance value, and the preset aperture value and film sensitivity value. This exposure level is the exposure level obtained when shooting under the brightness of only natural light at the strobe synchronization time mentioned above, but with conventional cameras, such an exposure level is displayed as there is no practical benefit in displaying it. I hadn't done it. However, even such an exposure level may be useful in determining whether or not the background will be properly exposed, for example, when performing synchronized photography during the day.

SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to provide a camera that displays an exposure level based on strobe synchronization time, photometric brightness value, etc. as a deviation from a standard exposure level.

According to the present invention, before flash photography, the amount of deviation of the exposure level from the standard exposure level when shooting under the brightness of only natural light is displayed at the flash synchronization time, so the brightness of only natural light is displayed. This will tell you how much exposure will be done. Therefore, it is possible to judge in advance whether the subject is bright enough to eliminate the need for strobe photography, and to what extent the background will be overexposed or underexposed when synchronized photography is performed during the day.

Hereinafter, the present invention will be explained based on an illustrated embodiment.

FIGS. 1 and 2 show a front view and a plan view, respectively, of a camera showing an embodiment of the present invention. This camera 10 is a so-called single-lens reflex camera, and has a photographing lens barrel 2 removably attached to the center of the front surface of the camera body 1, and a pentaprism housing 3 in the center of the top surface. It has a protruding triangular roof shape. As is well known, the photographic lens barrel 2 houses and holds a photographic lens 4, and on the outer periphery of the lens barrel 2, from the front to the rear, there is an aperture value setting ring 5, a photographing distance A setting ring 6 and a manual shutter seconds setting ring 7 are arranged in sequence so as to be rotatable. Further, on the left half of the upper surface of the camera body 1, which is partitioned by the pentaprism storage section 3, there is a film winding lever 8, a film frame number display window 9, a shutter release button 11, and a self-timer command operation knob 12. , a memory command operation knob 13, a spot input button 14, a highlight command button 15, and a shadow command button 16, respectively. On the other hand, on the right half of the top surface of the camera body 1, a film rewind knob 17, a film sensitivity setting dial 18,
A film sensitivity display window 19, a photographing mode switching operation knob 21, an exposure correction operation knob 22, and a battery check display window 23 are provided. In addition, the pentaprism storage section 3
A strobe mounting shoe 24 is provided near the rear end of the top surface, and a strobe (not shown) is provided near the upper right end of the front surface of the camera body 1.
A connector 25 is provided for connecting through a connecting cord (not shown). In FIGS. 1 and 2, reference numeral 26 designates an operation button for attaching the photographing lens barrel 2 to the camera body 1.
Reference numeral 7 indicates a metal fitting for attaching a strap (not shown) to the camera body 1, and 28 indicates a viewfinder eyepiece window frame.

The memory command operation knob 13 is rotatably arranged at the base of the pedestal of the shutter release button 11.
"MEMORY" written on the top of the camera body 1
The indicator written on the knob 13 is stopped at an intermediate position between the indicator and the "CLEAR" indicator. This memory command operation knob 13 is an operation member for selecting or canceling a memory photography mode (hereinafter simply referred to as memory mode) in which multiple frames are photographed at an exposure level once stored. At the same time, the memory switch described later
SW ₆ (see Figure 7) and clear switch SW ₇
(See Figure 7). Rotate the memory command operation knob 13 to set the same knob 1.
If you match the 3rd indicator to the “MEMORY” indicator,
When memory switch SW ₆ is closed and memory shooting mode is selected, and the "CLEAR" index is aligned, clear switch SW ₇ is closed and memory shooting mode is canceled. When the rotational force is removed from the operation knob 13, the knob 13 automatically returns to its normal position by its own habit, but the memory photographing mode and the state in which it is released are maintained as they are. This point will be explained in detail later in the explanation of FIG.

The spot input button 14 allows the camera 10 to input the luminance value of the subject partially metered through the shooting level 4.
This is a self-returning push button that serves to input and memorize an input into the electric circuit, and is designed to be linked to a spot input switch _SW8 (see FIG. 7), which will be described later. When this spot input button 14 is pressed, the spot input switch SW ₈ is closed and a spot shooting mode is selected in which the exposure level is controlled based on the stored partial metering value.At the same time, the partial metering brightness value is selected. is beginning to be remembered. When the spot input button 14 is pressed multiple times, the partially photometered brightness value is stored each time, and a plurality of photometered values are held in the camera 10. Note that the spot photographing mode is not canceled by the self-resetting of the spot input button 14, and the photographing mode is canceled in conjunction with the completion of one photographing operation.

The highlight command button 15 is a highlight reference shooting mode in which exposure is performed at an exposure value 21/3 Ev lower than the highest luminance value of the partial photometry values stored by operating the spot input button 14. (Hereinafter, simply referred to as highlight mode.)
This is a self-returning push button for selecting the button, and is linked to a highlight switch SW ₉ (see FIG. 7), which will be described later. When the highlight command button 15 is pressed an odd number of times, the highlight mode is selected, and when it is pressed an even number of times, the highlight mode is canceled. Further, the shadow command button 16 is used for a shadow reference shooting mode in which exposure is performed at an exposure value that is 22/3 Ev higher than the lowest luminance value of the partial photometry values stored by operating the spot input button 14. (hereinafter simply referred to as a shadow mode) is a self-resetting type push button that is linked to a shadow switch SW ₁₀ (see FIG. 7), which will be described later. When the shadow command button 16 is pressed an odd number of times, a shadow mode is selected, and when it is pressed an even number of times, the shadow mode is canceled. Note that if the partial photometry values are not stored at the time when the highlight command button 15 and shadow command button 16 are pressed, the highlight mode and the shadow mode are not selected. Furthermore, if the shadow command button 16 is pressed in the highlight mode, the highlight mode is canceled and the shadow mode is selected, and the highlight command button 1 is pressed in the shadow mode.
When 5 is pressed, the shadow mode is canceled and the highlight mode is selected.

The shooting mode switching operation knob 21 is rotatably arranged at the base of the pedestal of the film rewind knob 17, and is provided with "MANUAL", "OFF", "AUTO" written on the top surface of the camera body 1. Click stops are applied at positions corresponding to the indicators ``'' and ``CHECK'' to temporarily stop the operation. This shooting mode switching operation knob 21 is a manual switch _SW3 .
(See Figure 7), Auto switch SW ₄ (See Figure 7)
and battery check switch SW ₅ (11th
(see figure).
When the operation knob 21 is set to correspond to the "MANUAL" index, the manual switch SW ₃ is closed and the manual exposure control is performed by operating the shutter (not shown) at the manually set manual shutter speed. When the shooting mode (hereinafter simply referred to as manual mode) corresponds to the "OFF" index, an off-shooting mode (hereinafter simply referred to as OFF mode) in which the shutter is operated at a circuit-constant shutter speed is set. However, when the "AUTO" index is set, auto switch SW ₄ is closed, the shutter time is calculated from the subject's photometric brightness value, and the shutter is operated using this shutter time to control the exposure. The exposure shooting mode (hereinafter simply referred to as auto mode) is
When corresponding to the "CHECK" indicator, the battery check switch SW ₅ is closed and the battery check status is indicated by lighting on the battery check display light emitting window 23 to indicate that the power supply voltage Vcc is higher than the specified voltage. It is becoming possible to obtain it.

FIG. 3 shows the optical system of a single-lens reflex camera disposed within the camera 10 of the present invention.
As is well known, in the optical system of a single-lens reflex camera, a movable reflection mirror 31 is normally rotatably arranged at an angle of 45 degrees with respect to the photographing optical path. 4
Object light that enters the camera 10 through the mirror is reflected right-angled upward and incident on the viewfinder optical system. The finder optical system includes a focusing glass 35 disposed at a position optically conjugate to the photosensitive surface of the photographic film 34.
A condenser lens 36 is placed directly above the focusing glass 35, and a pentaprism 3 is placed directly above the condenser lens 36.
7, and a finder eyepiece lens 38 disposed to face the rear end surface which is the light output end surface of the pentaprism 37, and the rear end edge between the focusing glass 35 and the condenser lens 36. A photographic information display device 39 made of a light-transmissive liquid crystal display panel, which will be described later, is disposed along the side of the camera. Moreover, the central part of the movable reflection mirror 31 is
Half-mirror processing is applied or fully-transmissive slits are arranged in a row to form a semi-transmissive part 31a, and on the back side of the movable reflective mirror 31 corresponding to this semi-transmissive part 31a, there is a totally-reflective slit. A mirror 32 is movably attached to form a predetermined angle with the movable reflective mirror 31. This total reflection mirror 3
2 serves to reflect the subject light that has passed through the semi-transparent portion 31a of the movable reflection mirror 31 toward a photometric light receiving device 41 disposed at the bottom of the camera 10. The photometric light receiving device 41 is formed in a rectangular shape as shown in FIG. 4, and is attached to the camera body 1.
The photosensitive surface of the photographic film 34 or the surface of the focal plane shutter 33 placed at the rear of the
And looking up at the total reflection mirror 32,
It is tilted toward the front end of the bottom of the camera body 1. This photometric light receiving device 41 has a square shape and a square shape P on the surface of an N-type semiconductor substrate 42.
After forming the type semiconductor regions 43a, 43b, a cathode electrode 44 is formed on the N-type semiconductor substrate 42, and anode electrodes 45a, 45 are formed on the P-type semiconductor regions 43a, 43b.
5b, and the area 43a and the substrate 42 are photovoltaic elements that directly measure the average of the subject light reflected on the photosensitive surface of the photographic film 34 or the surface of the focal plane shutter 33. PD ₁ (see FIG. 8) is formed, and the region 43b and the substrate 42 are connected to the total reflection mirror 3.
A photoelectric conversion element PD 2 (see FIG. 8) is formed for spot-memory photometry of the object light reflected by the photodetector PD ₂ .

FIG. 5 is a block diagram showing an outline of the configuration of the electric circuit in the camera 10 of the present invention. This electric circuit includes a microcomputer (hereinafter abbreviated as CPU) 50 as a central processing unit that controls the entire circuit, and a head amplifier circuit 51 that measures subject light and outputs a photometric integral output S2 and a brightness value signal S6. and outputs the trigger signal S1,
a trigger timing adjustment circuit 52 for controlling the photometry start timing of the head amplifier circuit 51; an analog exposure information introduction circuit 53 for inputting analog exposure information such as aperture value, film sensitivity value, and correction value to the circuit; and the head amplifier circuit 51. A first comparison circuit 54 compares the photometric integral output S2 from the analog exposure information introduction circuit 53 and outputs a shutter control signal S17 during direct photometry.
, a shutter control signal S17 during direct photometry from the first comparison circuit 54, and a shutter control signal S1 output from the CPU 50 during memory mode, manual mode, and spot mode.
a first selection circuit 55 that selects and outputs either one of the first selection circuit 55 and the first selection circuit 55;
selectively outputs either one of the brightness value signal S6 from the CPU 50 and the (film sensitivity value - aperture value) signal (SV-AV) from the analog exposure information introducing circuit 53 based on the input selection signal S7 from the CPU 50. 8 from the CPU 50 and a second selection circuit 57 to
A D-A converter circuit 58 that converts bit digital information into A-to-A, an analog signal output from this D-A converter circuit 58, and an analog signal to be A-D converted from the second selection circuit 57. A second comparison circuit 59 compares the data with S8 and inputs it to the CPU 50 as digital information, and a second comparison circuit 59 that compares the value with S8 and inputs it to the CPU 50 as digital information, and a second comparison circuit 59 that compares the value with S8 and inputs it to the CPU 50 as digital information, and a second comparison circuit 59 that compares the value of S8 and inputs it to the CPU 50 as digital information, and a second comparison circuit 59 that inputs the manual shutter speed and correction value as digital exposure information.
Its main parts are composed of a digital exposure information introduction circuit 60 for inputting into the CPU 50 and the photographing information display device 39 which is driven in response to the output from the CPU 50. In addition, there is a strobe determination circuit 62 for displaying the completion of strobe charging, and a battery check circuit 63 for determining whether the power supply voltage Vcc is equal to or higher than a specified voltage.
A power hold release circuit 64 that releases self-holding of the power supply, a strobe over/under determination circuit 65 that determines whether exposure by strobe light is over or under exposure, and a strobe control circuit that generates an automatic strobe light control signal. 66 are attached to each. Furthermore, a power supply hold circuit 67 that maintains power supply to the entire circuit, a timer circuit 68 that generates various time signals, and a reference voltage circuit 69 that generates various reference voltages are provided.

FIG. 6 is a block diagram showing the internal configuration of the CPU 50, which is the core of the control system in the camera 10 of the present invention. In the figure, a clock generator (CLOCK) 71 is a part that generates pulses that serve as a reference for the operation of the CPU 50, and a control circuit (CONT) 72 is a part that is a central part that controls the overall operation of the CPU 50. The CPU 50 needs to transfer and process various binary data in an orderly manner according to a predetermined program order, but in order to do so, it is important to know when and for how long the gates inside the CPU 50 should be open. Also, it is necessary to have a part inside the CPU 50 that determines which flip-flop should be set or reset based on the state of the CPU 50 and the state of the input. doing this job
CONT72. The instruction register (INR) 73 is a part that temporarily holds the contents of a random access memory (RAM) 84, which will be described later, and the CONT 72 determines the state of each part of the CPU 50 based on the contents of this INR 73.
The program counter (PC) 76 is a part that stores the address to be executed from now on in order to execute the program in the correct order.
It gets bigger one by one. The stack pointer (SP) 77 is used when an interrupt instruction or a jump instruction to a subroutine occurs, etc., to the PC 76, an accumulator (ACC) 79 (described later), an index register (IX) 78 (also described later), etc. This register is used to temporarily hold the contents when you want to return from those instructions and use them again without destroying the contents.
IX78 is a register for storing an instruction execution address when executing an instruction in index address format. The arithmetic processing circuit (ALU) 81 is
This is the part of instruction execution that performs operations related to arithmetic operations, such as addition and subtraction, execution of invert instructions that invert the contents of memory (“1” or “0”), and the logic of two memories. Performs logical operations such as sum or logical product. Condition Code Register (CCR)
Reference numeral 82 is a register for storing a code used for state detection in a flag when executing an instruction requiring a judgment such as a branch instruction. The determination function occupies an important position for the CPU 50, and in controlling the camera 10 of the present invention, as will be described later, the state of each input port (“1” or “0”) is determined, There are frequently locations where branch instructions are executed, either changing the flow of the program to be executed next, or executing instructions without changing the flow. This is done by determining the state of the flag in CCR82. CCR8
2 is a negative flag that becomes "1" when the result of execution of the instruction becomes negative in two's complement, and "0" when the result becomes positive; "2" becomes "0" when the result becomes "0". 1”, “0” when not “0”
The zero flag is set to "1" when the result causes a two's complement overflow, and the overflow flag is set to "0" otherwise, when a carry or borrow occurs from an unsigned binary number as a result of the operation. It is made up of various flags such as a carry flag which becomes "1" and "0" when it does not occur. The memory buffer register (MBR) 75 is a register from which, when an address to be read is entered in the storage address register (SAR) 74 and a read instruction is issued to the memory, the contents of the specified address are read out.

Read only memory (ROM) 83 is
This is for causing the CPU 50 to execute instructions while sequentially reading out the contents. Further, a random access memory (RAM) 84 is a memory that temporarily stores values during arithmetic processing, their results, or various input information. A display random access memory (DRAM) 85 is provided for each segment of the liquid crystal display panel forming the photographing information display device 39, which will be described in detail later in the explanation of FIG. 19a.
It has an area corresponding to 1 to 1, and DRAM8
If the content of a certain address of No. 5 becomes "1", the corresponding segment of the liquid crystal display panel will be colored. Liquid crystal drive circuit (LCDD) 6
As described above, reference numeral 1 is a circuit for driving the photographing information display device 39 formed of a liquid crystal display panel to generate color. Since the /3 bias drive control method is adopted, 39 segment lines and 3 common lines are drawn out. The input port (INPP) 88 is formed by 17 input ports I0 to I16, as described later, and the output port (OUTPP) 89 is formed by 10 output ports O0 to O9, as also described later. (See Figure 7). In addition, OUTPP8
All outputs of 9 are latch outputs.

Next, the flow of control of the CPU 50 configured as above will be briefly explained.

The CPU 50 repeats two cycles: first, a fetch cycle in which the instruction stored in the address in the memory specified by the PC 76 is loaded, and then an execute cycle in which the instruction is executed. And, first, the value of PC76 is
Transferred to SAR74. At the same time, PC76
The contents that were previously stored in the PC 76 plus 1 are stored in . When the address to be read is entered in the SAR 74, a read instruction is issued to the memory, and after a while, the contents of the address specified to the MBR 75 are read out. The instruction code part is transferred to INR73. This is the fetish cycle. Following this, an execute cycle is entered, but this operation differs depending on the contents of INR73.
As an example, suppose that INR 73 contains an instruction (LDA instruction) to load the contents of memory into ACC 79. The address part of the instruction remaining in the MBR75 is transferred to the SAR74, then a read command is issued to the memory, and after a while the MBR75
The data obtained is transferred to the ACC79 and the command is completed. As another example, we will show how a conditional branch instruction, which frequently appears in the flowcharts described later, is executed. Now, if you want to determine the state of a certain input port (port A) and make a conditional branch, as in the above example, write A to MBR75 in the fetch cycle.
The contents of the port are read. It is assumed that the bit of the A port is in the most significant bit of the memory.
Now, if INR73 contains an LDA instruction that stores the memory contents in ACC79, the contents of A port will be stored in ACC79 in the same way as in the above example.
Transferred to 9. Subsequently, the PC 76 instructs the address to be executed next, and the instruction is stored in the MBR 75 in exactly the same manner. Now at INR73
Command to shift the most significant bit of ACC79 to the carry flag of CCR82 (ROL command)
If this is the case, the status of the A port (“0” or “1”) will be stored in the carry flag in the next execution cycle. Next, in the same way, the state of the carry flag is determined, and if the carry flag is "1", the program branches, and if not, it executes an instruction (BCS instruction) to directly execute the next program. can be accomplished. In the latter example, three instructions, LDA, ROL, and BCS instructions, are used, but desired control can be performed by arbitrarily combining dozens of types of instructions in this way.

In addition, in the flowchart described later,
Although it does not show at the machine language level how to specifically use each block shown in Figure 6 to execute the program, transfer instructions, additions and subtractions, etc. in the program are performed using known methods. This can be easily achieved.

FIG. 7 shows the peripheral interface of the CPU 50. In this figure, the symbols I0 to I1
6 is the input port of the CPU 50, coded O0 to O9
indicate the output ports, respectively. The input port I0 is for detecting whether or not the mode is auto mode, and is connected to one end of the auto switch SW ₄ that is linked to the shooting mode switching operation knob 21, and is also connected to a pull-down resistor R ₁ . is grounded through. A power supply voltage Vcc is applied to the other end of the auto switch _SW4 . Therefore, the input port I0 goes to "L" level and takes "0" when the auto switch SW ₄ is open, and goes to "H" level and takes "1" when it is closed.
When it becomes "1", it indicates that the auto mode has been detected. Auto switch SW ₄ above
One end is also connected to the first input end of a NOR circuit _G4 , which will be described later, via a NOT circuit _G1 . The input port I1 is for detecting whether or not the manual mode is set, and is connected to one end of a manual switch _SW3 that is linked to the shooting mode switching operation knob 21, and is connected to a pull-down resistor. Grounded through R ₂ . A power supply voltage Vcc is applied to the other end of the manual switch _SW3 . Therefore, the input port I1 becomes "L" level and becomes "0" when the manual switch _SW3 is open, and becomes "H" level and becomes "1" when it is closed. and,
When it becomes "1", it indicates that manual mode has been detected.

Input port I6 is for detecting whether or not it is in memory mode, and is connected to a NAND circuit.
Connected to the output end of _G3 . The output end of NAND circuit G ₃ is also connected to one input end of NAND circuit G _{5, and the output end of NAND circuit G 5} is connected to one input end of NAND circuit G ₅ .
connected to the other input end of G ₃ , both circuits G ₃ ,
_G5 constitutes an RS flip-flop circuit for memory mode detection. One input terminal of the NAND circuit _G3 , which serves as the reset input terminal of this RS flip-flop circuit, is connected to the output terminal of the NAND circuit _G2 , and the NAND circuit _G5 , which serves as the set input terminal, is connected to the output terminal of the NAND circuit G2.
The other input terminal of is connected to the output terminal of NOR circuit _G4 . The output terminal of the NOR circuit _G4 is also connected to the other input terminal of the NAND circuit _G2 . One input end of the NAND circuit _G2 is connected to one end of a memory switch _SW6 linked to the memory command operation knob 13, and is also grounded through a resistor _R3 . Memory switch SW ₆ is a self-resetting switch, and the other end is connected to the power supply voltage.
Vcc is applied. A strobe power-on signal S14 is applied to the second input terminal of the NOR circuit _G4 , and a memory timer signal T7 is applied to the third input terminal. . Further, the fourth input terminal is connected to one end of a clear switch _SW7 , which will be described later. The NOR circuit _G4 is a reset gate, and when the input port I0 is "0", that is, when not in auto mode, when a strobe is attached to the camera 10 and the strobe is powered on, the memory timer is reset. This gate is used to cancel the memory mode when the clear signal is turned off or when a clear signal is manually input. Further, the NAND circuit _G2 is a gate for resetting the RS flip-flop circuit with the output of the NOR circuit _G4 , giving priority to the memory mode selection signal.

The input port I2 is for detecting whether or not the spot mode is on, and is a NAND circuit.
Connected to the output terminal of _G9 , and the same output terminal is “H”
When the level is reached, it becomes "1", indicating that it is the spot mode. The NAND circuit _G9 , together with the NAND circuit _G7 , constitutes an RS flip-flop circuit as in the case of the above-mentioned NAND circuits _G3 and _G5 . A NAND circuit serves as the set input terminal of the RS flip-flop circuit for spot mode detection.
One input terminal of G ₇ is connected to the output terminal of NOR circuit G ₆ , which is the reset input terminal of the NAND circuit.
The other input end of _G9 is connected to the output end of NAND circuit _G8 . In addition, the output end of NOR circuit G ₆ is
It is also connected to one input end of NAND circuit _G8 . One input end of the NOR circuit _G6 is connected to the output port O0 for spot mode cancellation.
The other input end is connected to the memory command operation knob 13.
It is connected to one end of a self-resetting clear switch _SW7 that is linked to the switch SW7, and is also grounded through a resistor _R4 . A power supply voltage Vcc is applied to the other end of the clear switch _SW7 . Noah circuit G ₆
is a reset gate, and the spot mode is canceled when clear switch SW ₇ is pressed or when a pulse signal is output to O0 by software according to the program. . The other input end of the NAND circuit _G8 is connected to one end of the spot input switch _SW8 , and this NAND circuit _G8 gives priority to the spot input signal and outputs the output of the NOR circuit _G6 to the RS flip-flop circuit. It serves as a gate for resetting.

The input port I3 is for detecting the presence or absence of spot input, and is connected to the output terminal of the NAND circuit _G11 , and becomes "1" when the output terminal becomes "H" level. indicates that there is a spot input. NAND circuit G ₁₁ is a NAND circuit
Together with _G12 , it forms an RS flip-flop circuit as in the case of the NAND circuits _G3 and _G5 .
One input terminal of the NAND circuit _G11 , which serves as the reset input terminal of this RS flip-flop circuit for spot input detection, is connected to the output terminal of the not circuit _G10 , and the other terminal of the NAND circuit _G12 , which serves as the set input terminal. The input terminal of is connected to the output terminal of the knot circuit _G13 . The input end of the above-mentioned note circuit _G10 is connected to one end of a self-resetting type spot input switch _SW8 via a capacitor _C3 , and
Grounded through resistor _R6 . It is also connected to the collector of an NPN transistor Q ₇₀ , and the emitter of the same transistor Q ₇₀ is connected. Furthermore, the base of the transistor _Q70 is connected to an output port O1 for spot input cancellation through a resistor _R11 , and this output port O1 is also connected to the input end of the above-mentioned note circuit _G13 . In addition, the above spot input switch SW ₈
As mentioned above, one end is connected to the other input end of the NAND circuit _G8 and is grounded through the resistor _R5 , and the power supply voltage Vcc is applied to the other end of the switch _SW8 . ing. The RS flip-flop circuit consisting of the above NAND circuits G ₁₁ and G ₁₂ is
This is to hold the signal each time the spot input switch SW ₈ is closed in order to input the spot photometry operation signal multiple times in the spot mode state. When the spot photometry operation signal is input and the calculation of the shutter time is completed within the CPU 50, a positive pulse signal is output to the output port O1, the RS flip-flop circuit is set, and the CPU 50 returns to the state of waiting for the input of the spot photometry operation signal. becomes.

The input port I4 is for highlight mode detection, and is connected to the output terminal of the NAND circuit _G15 , and when the output terminal reaches the "H" level, it becomes "1" and the highlight mode is detected. . Further, the self-resetting switch SW ₉ is a command switch for highlight reference shooting, and when the switch SW ₉ is closed, the NAND circuit G ₁₅ ,
The output of the RS flip-flop circuit consisting of _G16 becomes "H" level, and the highlight mode is selected. This highlight mode is canceled by outputting a positive pulse to the output port O2. On the other hand, the input port I5 is for shadow mode detection, and is connected to the output terminal of the NAND circuit _G19 , and when the output terminal reaches the "H" level, it becomes "1" and indicates the shadow mode. Show that. In addition, the self-returning switch SW ₁₀ is
When switch SW ₁₀ , which is a command switch for shadow mode reference photography, is closed, the output of the RS flip-flop circuit made up of NAND circuits G ₁₉ and G ₂₁ becomes "H" level, and the shadow mode is selected. This shadow mode is canceled by outputting a positive pulse to the output port O3. In addition, switch SW ₉ , resistors R ₇ , R ₈ ,
R ₁₂ , capacitor C ₄ , NPN type transistor
Q ₇₁ , Knot circuit G ₁₄ , G ₁₇ and NAND circuit G ₁₅ ,
A highlight mode detection circuit consisting of _G16 , and
Switch SW ₁₀ , resistor R ₉ , R ₁₀ , R ₁₃ , capacitor C ₅ , NPN transistor Q ₇₂ , knot circuit
The connection mode of the shadow mode detection circuit consisting of G ₁₈ , G ₂₀ and NAND circuit G ₁₉ , G ₂₁ is the same as the above switch.
SW ₈ , resistor R ₅ , R ₆ , R ₁₁ , capacitor C ₃ ,
NPN transistor Q ₇₀ , knot circuit G ₁₀ , G ₁₃
Since the configuration is almost the same as the spot photometry operation signal input detection circuit consisting of NAND circuits G ₁₁ and G ₁₂ , a detailed explanation thereof will be omitted.

Next, the operations of the spot photometry operation signal input detection circuit, highlight mode detection circuit, and shadow mode detection circuit will be explained by taking the spot photometry operation signal input detection circuit as an example. First, when spot input switch _SW8 is closed, the capacitor
A short pulse signal of "H" level is generated at the input terminal of the knot circuit _G10 via _C3 . Then, the output terminal of the RS flip-flop circuit made up of NAND circuits G ₁₁ and G ₁₂ goes to "H" level, the input port I3 goes to "1", and the CPU 50 detects that the spot photometry operation has become used and continues for a predetermined period of time. After t has elapsed, a pulse-like reset signal of "H" level is output to the output port O1 to reset the RS flip-flop circuit. Here, if capacitor C ₃ ,
If the time constant of resistor _R6 is longer than the above predetermined time t,
Even if the reset signal is output, the RS flip-flop circuit returns to the set state and the CPU 50
There is a risk that the spot photometry operation signal may be mistakenly recognized as being input again. For this reason, a transistor _Q70 is connected in parallel with the resistor _R6 , and the reset signal turns on the transistor _Q70 , forcing the capacitor _C3 to fully charge.

The output port O4 is a port that outputs the photometry mode command signal S3, and when the signal S3 is "1", the average photometry mode is selected in the head amplifier circuit 51 (see FIG. 8), which will be described later, and the signal is "0".
, the spot metering mode is selected. Further, the output port O5 is a port that outputs the input selection signal S7, and the output port O5 is a port that outputs the input selection signal S7.
7 is "1", a second selection circuit 57 (see FIG. 9), which will be described later, outputs the luminance value signal S6 as an analog signal S8 to be A/D converted,
When the value is "0", an analog calculation value signal (SV-AV) of the film sensitivity value and the aperture value is output as the A-D analog signal S8. The output port O6 is an output port for determining the sign of each bit of the DA converter circuit (DAC) 58, and is composed of 8 bits in parallel. The input port I7 is a port for inputting digital information that has been A-D converted, and is a second comparison circuit 59 that forms a successive approximation type A-D conversion circuit together with the D-A conversion circuit 58. As the comparator A is connected to the output terminal of ₁₂ . The inverting input terminal of this comparator _A12 is connected to the output terminal of the DA converter circuit 58, and the other non-inverting input terminal is arranged to be applied with the analog signal S8 to be A/D converted.

The output port O7 serves as a common output terminal of the liquid crystal drive circuit 61, is formed by three lines, and is connected to a liquid crystal display (LCD) of the photographing information display device 39. Also, output port O
8 is a segment output end of the liquid crystal drive circuit 61, formed by 39 lines, and connected to a liquid crystal display (LCD) of the photographing information display device 39. Input port I8 is a port for inputting manual shutter seconds, and consists of four input lines. Further, the input port I9 is a port for inputting a correction value, and consists of four input lines. Both input ports I8 and I9 are connected to the digital exposure information introduction circuit 60. The input port I10 is an input port for detecting a release signal, and a release signal S0 is applied thereto. In addition, input port I11
is an input port for detecting a trigger signal, to which an inverted signal of the trigger signal S1 is applied through a knot circuit _G100 . Further, the input port I12 is an input port for detecting an exposure end signal, and is configured to receive an exposure end signal S13. Furthermore, input port I13
is the input port for strobe power-on signal detection.
A strobe power-on signal S14 is applied. The input port I14 is an input port for detecting an overexposure signal for strobe photography to detect whether or not overexposure occurred during strobe photography, and is configured to receive an overexposure signal S9 for strobe photography. In addition, input port I15
is an input port for detecting an underexposure signal S10 for strobe photography, which is used to detect whether or not exposure is underexposed in photography using a strobe light. Output port O9 receives shutter control signal S1 in memory mode, manual mode, and spot mode.
This is a port for outputting 6. Further, the input port I16 is a port for inputting a strobe light emission appropriateness signal S20 for performing proper display for about 2 seconds after the spot light emission when the exposure is appropriate during spot photography.

FIG. 8 shows a detailed electrical circuit of the head amplifier circuit 51. This head amplifier circuit 5
1 basically consists of a circuit for generating brightness information in open average photometry and brightness information in open spot photometry, an integrating circuit for direct photometry, and an analog switch. operational amplifier
_A1 is an operational amplifier with bipolar transistor input, the reference voltage _V0 is applied to the non-inverting input terminal, and the inverting input terminal is connected to the output terminal of operational amplifier _A2 . This operational amplifier _A1 can suppress the input offset voltage to within 1mV without offset adjustment. The output terminal of operational amplifier A ₁ is connected to the emitter of PNP type transistor Q ₁ , and the collector of transistor Q ₁ is connected to
It is connected to the output terminal of the operational amplifier A ₂ through the resistor R ₁₆ , and the logarithmic compression transistor Q ₂
connected to the kokureku and base. The logarithmic compression transistor Q ₂ is a multi-emitter
It is a PNP type transistor, and one emitter is connected to the anode of the photovoltaic element PD ₁ for average photometry, and the other emitter is connected to the anode of the photovoltaic element PD ₂ for spot photometry. The base and collector of transistor Q ₂ are op amps
Also connected to the non-inverting input of _A3 . The cathodes of the photovoltaic elements PD ₁ and PD ₂ are operational amplifiers.
It is connected to the inverting input terminal of A ₂ , and its anode is connected to one non-inverting input terminal and the other non-inverting input terminal of operational amplifier A ₂ , respectively. The operational amplifier _A2 is a MOS type transistor input operational amplifier and has two non-inverting input terminals.The operational amplifier A2 is a MOS type transistor input operational amplifier and has two non-inverting input terminals. Accordingly, the non-inverting input terminal that becomes valid can be switched. That is, when the photometry mode command signal S3 is at "H" level, the other non-inverting input terminal becomes valid;
The anode and cathode of the photovoltaic element PD ₁ are maintained at zero bias, and the potential between the base and collector of the transistor Q ₂ changes depending on the amount of light received by the photovoltaic element PD ₁ . Furthermore, when the photometry mode command signal S3 is at the "L" level, one non-inverting input terminal is enabled, the anode and cathode of the photovoltaic element PD ₂ are maintained at zero bias, and the base and cathode of the transistor Q ₂ are The potential between the collectors changes depending on the amount of light received by the photovoltaic element PD ₂ . Note that the bias switching signal S4 is applied to the bias switching signal input terminal of the operational amplifier _A2 through the resistor _R17 , and when this signal S4 becomes "H" level during direct photometry, the bias switching signal input terminal of the operational amplifier _A2 is applied. As the bias current increases, operational amplifier _A2 can operate at high speed, and signal S4
When the signal becomes "L" level during memory photometry, the bias current of the operational amplifier _A2 is reduced and power consumption is reduced.

The capacitors C ₁ and C ₂ are integral capacitors for direct photometry, and one ends of both capacitors and the sensors C ₁ and C ₂ are respectively connected to the anode of the photovoltaic element PD ₁ for average photometry. Further, the other end of the capacitor _C1 is grounded, and the other end of the capacitor _C2 is connected to the collector of the NPN transistor _Q6 . The transistor _Q6 is a transistor for switching the integral capacitance, and has an emitter that is grounded, and a base that receives the integral capacitance switching signal S5 through a resistor _R19 . The collector of transistor Q ₆ is also connected to the output of operational amplifier A ₂ through resistor R ₁₈ . The integral capacitance switching signal S5 is a signal that is switched depending on the film sensitivity, and is output from the output terminal Q of the latch circuit DF0 (see FIG. 9). Direct photometry terminates exposure when the photometric integrated output S2 of the integrating circuit (output of operational amplifier _A2 ) reaches a predetermined voltage level depending on the film sensitivity. This would be on the order of several millivolts, making it susceptible to noise such as static electricity. Therefore, in this circuit, when the film sensitivity is high, the integral capacitor switching signal S5 is set to "L" level to turn off the transistor _Q6 , and the capacitance of the integral capacitor is reduced to only the capacitance of the capacitor _C1 . The integrated voltage judgment level is increased. When the film sensitivity is low, the integral voltage can be determined by setting the integral capacitor switching signal S5 to "H" level to turn on the transistor _Q6 and setting the integral capacitor's capacity to the parallel capacitance of capacitors _C1 and _C2 . The level is lowered and the dynamic range is expanded. The reason why the collector of transistor Q ₆ is connected to the output terminal of operational amplifier A ₂ through resistor R ₁₈ is to make the capacitance of capacitor C ₂ substantially zero when transistor Q ₆ is off.

The operational amplifier _A3 is a buffer operational amplifier, and its output terminal is connected to the inverting input terminal of the amplifier _A3 , and is also connected to the collector of a PNP transistor _Q7 . The base of the transistor Q ₇ is connected to the non-inverting input terminal of the operational amplifier A ₃ , and the emitter is connected to one non-inverting input terminal of the operational amplifier A ₉ (see FIG. 9) forming the second selection circuit 57. and is connected to one end of the constant current circuit _CC1 . constant current circuit
A power supply voltage Vcc is applied to the other end of CC ₁ , and a constant current I ₀ flows through the current circuit CC ₁ . At the emitter of the transistor _Q7 , a voltage proportional to the absolute temperature of the logarithmic compression value of the photocurrent generated in the photovoltaic element _PD1 or _PD2 appears, and this voltage is derived as the brightness value signal S6. It's summery.

The base of the transistor _Q1 is connected to the collector of the NPN transistor _Q5 .
The power supply voltage Vcc is applied to the base of the transistor _Q5 through the resistor _R14 , and the emitter of the transistor _Q5 is grounded. In addition, between the base and emitter of transistor _Q5 is a diode-connected NPN transistor _Q4 ,
NPN transistor Q ₃ is connected to each. The base of the transistor _Q3 is connected to the output terminal of a knot circuit _G101 (see FIG. 12) through a resistor _R15 , and receives a trigger signal S1 from the same circuit _G101 .

Next, the operation of the head amplifier circuit 51 configured as described above will be briefly explained. Now, assuming that the trigger signal S1 is at "L" level,
Transistor Q ₃ is turned off, transistor Q ₅ is turned on, and transistor Q ₁ is turned on. This causes the output of op amp _A1 to be
Opamp via Q ₁ , Q ₂ and Opamp A ₂
Feedback is now fed back to the inverting input terminal of _A1 , forming a negative feedback circuit. Therefore, the output voltage of operational amplifier _A2 is equal to the reference voltage _V0 .
Here, a voltage is generated at the emitter of the transistor _Q7 in accordance with the amount of light received by the photovoltaic element _PD1 or _PD2 . During direct metering, as soon as exposure starts, trigger signal S1 changes to "H" level, transistor _Q3 turns on, and transistor
Q ₅ turns off, transistor Q ₁ turns off, the negative feedback circuit mainly formed by operational amplifiers A ₁ and A ₂ is cut off, and the base of transistor Q ₂
The collector potential is the same as the output of operational amplifier _A2 . Therefore, the charges of capacitors C ₁ and C ₂ are
Charging is started according to the photocurrent generated in the photovoltaic element _PD1 . At this time, the voltage between the emitter and base of the transistor _Q2 is only the offset voltage of the operational amplifier _A2 , and the leakage current between the base and emitter and between the emitter and collector of the transistor _Q2 is extremely small. Also, op amp
Since A ₂ is an operational amplifier with MOS type transistor input, the charging current of capacitors C ₁ and C ₂ is almost entirely due to photocurrent, making it possible to create long exposure seconds with high precision. Then, the capacitors C ₁ and C ₂ continue to charge, and the integral output S2 of direct photometry is output to the output terminal of the operational amplifier A ₂ . Then, when the voltage of this integral output S2 becomes higher due to the collector potential of the transistor Q ₂₀ (see FIG. 9), the output of the operational amplifier A ₈ (see FIG. 10) is inverted, and the exposure is completed.

FIG. 9 shows the analog exposure information introducing circuit 53.
and a detailed electrical circuit diagram of the second selection circuit 57. A reference voltage V ₀ is applied to the non-inverting input terminal of the operational amplifier A ₄ , and a voltage proportional to the absolute temperature is applied to the inverting input terminal of the operational amplifier A ₄ by a constant current circuit CC ₂ through a variable resistor RV ₀ for inputting a correction value. A current I ₁ is flowing. Between the output terminal and the inverting input terminal of operational amplifier A ₄ , there are a variable resistor RV ₁ for film sensitivity input, a semi-fixed resistor RV ₂ for direct metering exposure level adjustment, a semi-fixed resistor RV ₃ for display level adjustment, and A series circuit of variable resistor RV ₄ for inputting aperture information is connected. For this reason, the op amp
The output end of _A4 shows the film sensitivity value Sv and aperture value Av.
A voltage corresponding to the analog calculated value (SV-AV) of the difference between the two selectors appears and is applied to the other non-inverting input terminal of the operational amplifier _A9 forming the second selection circuit 57. The brightness value signal S6 is applied to one non-inverting input terminal of the operational amplifier _A9 from the emitter of the transistor _Q7 (see FIG. 8). The output terminal of operational amplifier A ₉ is connected to the inverting input terminal of amplifier A ₉ , and
It is connected to the non-inverting input of comparator A ₁₂ (see Figure 7). Furthermore, an input selection signal S7 is applied to the control signal input terminal of the operational amplifier _A9 from the output port O5 (see FIG. 7).
When the signal S7 is at the "H" level, one non-inverting input terminal becomes valid, and the brightness value signal S6 is outputted to the output terminal of the operational amplifier _A9 as the A-D converted analog signal S8. When the signal S7 is at "L" level, the other non-inverting input terminal becomes valid, and
The output terminal of operational amplifier _A9 has the calculated value (SV−AV)
The voltage corresponding to the A-D converted analog signal S8
It is now output as .

The operational amplifier _A5 and the transistor group in the subsequent stage generate a judgment voltage for the integrating circuit output S2 during direct photometry, and generate a signal for switching the capacitance of the integrating capacitors _C1 and _C2 according to the film sensitivity. It is set up for the purpose of
At the non-inverting input terminal of operational amplifier _A5 , reference voltage _V0 is divided by resistors _R30 and _R31 . It is connected to the connection point of both resistors R ₃₀ and R ₃₁ . Also,
A reference voltage V ₀ is applied to the inverting input terminal of the operational amplifier A ₅ through a resistor R ₃₂ . Op amp A ₅
An NPN transistor _Q10 is inserted between the output end and the inverting input end of the transistor, with the emitter connected to the output end and the collector connected to the non-inverting input end.
The base of the transistor _Q10 is connected to the connection point between the correction value input variable resistor _RV0 and the constant current circuit _CC2 . Also, the output end of operational amplifier _A5 is NPN
It is also connected to the emitter of a type transistor Q ₁₁ , and the base of this transistor Q ₁₁ is connected to the connection point between semi-fixed resistors RV ₂ and RV ₃ .
And the collector of transistor _Q11 is PNP
It is connected to the collector of type transistor Q ₁₃ and the base of PNP type transistor Q ₁₂ , respectively. Transistor Q ₁₃ has the power supply voltage Vcc applied to its emitter, and its base is connected to the base of PNP transistor Q ₁₄ and also to the emitter of transistor Q ₁₂ . The collector of transistor _Q12 is grounded. Transistor _Q14 has the power supply voltage Vcc applied to its emitter, and its collector
Connected to the collector and base of the NPN transistor _Q22 . The above transistor _Q13 and
_Q14 constitutes a current mirror circuit that allows a current equal to the current flowing through the collector of the transistor _Q11 to flow through the collector of the transistor _Q22 . Transistor Q ₂₂ has its emitter grounded and its base connected to NPN transistor Q _81.
and the base of each of the n NPN transistors _Q80 . transistor group
The emitter of each Q ₈₀ transistor is grounded, and the collector is a PNP transistor Q ₁₅
It is connected to the collector of Q16 and the base of PNP transistor _Q16 . The transistor Q ₂₂ and each transistor in the transistor group Q ₈₀ constitute a current mirror circuit, and a current n times the current flowing through the collector of the transistor Q ₂₂ flows through the collector of the transistor Q ₁₅ . ing. The emitter of the transistor _Q81 is grounded, and the base is connected to the output terminal Q of the latch circuit _DF0 through a resistor _R33 . When the integral capacitance switching signal S5 output from the latch circuit _DF0 is at "H" level,
Transistor Q ₈₁ turns on and transistor
Q ₂₂ and the transistor group Q ₈₀ are turned off, and the collector current of the transistor Q ₁₅ becomes zero.

Transistor Q ₁₅ has the supply voltage on its emitter
Vcc is applied to it, and its bases are connected to the bases of PNP transistors Q ₁₇ and Q ₁₈ , respectively, and also connected to the emitter of PNP transistor Q ₁₆ . The collector of transistor _Q16 is grounded. transistor Q ₁₇
has the power supply voltage Vcc applied to its emitter, and its collector connected to the collector of the PNP transistor Q ₂₀ and to the non-inverting input terminal of the comparator A ₈ (see FIG. 10). In addition, the emitter of the transistor _Q18 is applied with the power supply voltage Vcc, and the collector is connected to the PNP type transistor _Q19.
is connected to the collector of
A ₇ (see Figure 10) is connected to the non-inverting input terminal. Transistor Q ₁₅ and transistor Q ₁₇
and _Q18 form a current mirror circuit, and the same current as the collector current of transistor _Q15 flows through the collectors of transistors _Q17 and _Q18 . Transistor Q ₁₉ above and
Q ₂₀ has the supply voltage Vcc applied to its emitter and the reference voltage V ₀ applied to its collector through resistors R ₃₄ and R ₃₅ .
is applied. And transistor Q ₁₉
and Q ₂₀ have their bases connected to the base of transistor Q ₁₃ , respectively, and
_Q13 and each form a current mirror circuit. Therefore, the same current flows through the collectors of transistors Q ₁₉ and Q ₂₀ as the collector current of transistor Q ₁₃ . The base of the above transistor Q ₁₃ is also connected to the base of the PNP type transistor Q ₂₁ , and the transistor Q ₂₁
receives the power supply voltage Vcc at its emitter, and its collector is grounded through a semi-fixed resistor _RV5 for adjusting the switching point of the capacitance of the integrating capacitors _C1 and _C2 . The collector of transistor Q ₂₁ is connected to the non-inverting input terminal of comparator A ₆ . The inverting input terminal of comparator A ₆ is connected to the connection point between resistors R ₃₆ and R ₃₇ that divide the reference voltage V ₀ , and the output terminal is connected to a latch circuit.
Connected to input terminal D of DF ₀ . This comparator _A6 serves to determine whether or not to switch the integral capacity depending on the film sensitivity. The release signal S0 is applied to the control signal input terminal of the latch circuit _DF0 from the collector of the transistor _Q32 (see Fig. 11), and the latch circuit _DF0 outputs an output signal at the time of shutter release. It serves to keep the integral capacitance switching signal S5 output from the terminal Q from being inverted. In addition, the above resistance
The resistance value of R ₃₄ is set to √2 times the resistance value of the resistor R ₃₅ .

Next, the operation of the analog exposure information introduction circuit 53 configured as described above will be briefly described. The output terminal of operational amplifier A ₄ has a reference voltage V ₀ as a reference.
A voltage is generated by adding a voltage drop equal to the product of the series resistance values of the resistors RV ₁ to _{RV 4} multiplied by a constant current I ₁ proportional to the absolute temperature. The voltage corresponding to a change in aperture or film sensitivity per step is approximately 18 mV at constant temperature. Therefore, the output of the operational amplifier _A4 is not affected by the voltage drop caused by the variable constant _RV0 for inputting the correction value.
The base potential of transistor Q ₁₀ is the reference voltage V ₀
Therefore, the value is lower by the voltage drop of the resistor RV ₀ .
On the other hand, _the base potential of transistor Q ₁₁ is higher than the reference voltage V ₀ by the voltage drop of the series resistance of variable resistor RV ₁ for film sensitivity input and semi-fixed resistor RV ₂ for exposure level adjustment, and The base-to-base voltage of ₁₁ has a value corresponding to the film sensitivity and correction value. Now, if the collector current of the transistor Q ₁₁ is Ic, then when the transistor Q ₈₁ is on, the currents flowing through the resistors R ₃₄ and R ₃₅ are both (1+n)Ic. Here, when the variable resistor RV ₁ for film sensitivity input has a low value, that is, when a high-sensitivity film is used, the collector current Ic of the transistor Q ₁₁ becomes small, and therefore (the resistance value of the variable resistor RV ₅ )×(transistor
The collector potential of the transistor _Q21 , which is the value of the collector current Ic) of _Q21 , becomes low, and the output of the comparator _A6 becomes "L" level. Therefore, transistor Q ₈₁ is turned off, and the voltage drop across resistors R ₃₄ and R ₃₅ increases. For this reason, the comparator
The voltage applied to the inverting input terminals of A ₇ and A ₈ increases. This means that the judgment voltage level of the integrating circuit during direct photometry has increased and the judgment voltage range has expanded. Even if the range of judgment voltage is widened,
At the same time, the capacitance of the integrating capacitor becomes the capacitance of only one capacitor, _C1 , so that correct exposure can be obtained. The film sensitivity level at which switching is to be performed is set in advance by adjusting the semi-fixed resistor _RV5 . By the way, if the potential difference between the two input terminals of comparator A ₆ is small, or if the output of comparator A ₆ becomes unstable due to noise etc. during exposure, it will cause an error in exposure, so after operating the shutter release, the release signal S0 is “H”
level and latches the output of the latch circuit _DF0 .

FIG. 10 shows detailed electric circuits of the strobe over/under determination circuit 65 and the first comparison circuit 54. The strobe over/under determination circuit 65 is a part that determines whether the exposure level is over or under when performing strobe photography using direct metering. The inverting inputs of comparators A ₇ and A ₈ are
As mentioned earlier, transistors Q ₁₈ and Q ₁₇
(see FIG. 9), and the integral output S2 of direct photometry from the output end of the operational amplifier _A2 (see FIG. 8) is applied to the non-inverting input terminal. The output terminal of the comparator A ₇ is connected to the first input terminal of the three-input NAND circuit G ₂₂ , and the output terminal of the comparator A ₈ is connected to the second input terminal of the NAND circuit G ₂₂ , a D-type flip-flop. It is connected to the input terminal D of the circuit _DF1 and the input terminal of the knot circuit _G28 , respectively. The comparator _A8 is a comparator for exposure control during direct metering, and compares the integral output S2 from the head amplifier circuit 51 with the output from the analog exposure information introducing circuit 53.
A first comparison circuit 54 is formed to determine the exposure level during direct photometry. Further, the comparator _A7 is also a comparator for determining the integral output S2, but the determination level of this comparator _A7 is set to √2 times the determination level of the comparator _A8 . That is, since the ratio of the resistance values of the resistors R ₃₄ and R ₃₅ is set to √2 times, the potential at the inverting input terminal of comparator A ₇ is √2 times that of comparator A ₈ . ing. The D-type flip-flop circuit _DF1 has a clock pulse CK applied to its clock input terminal, and its inverted output terminal is connected to the third input terminal of the NAND circuit _G22 . The output terminal of NAND circuit _G22 is connected to one input terminal of NAND circuit _G23 , which is the reset input terminal of the RS flip-flop circuit formed by NAND circuits _{G23 and G24} . The other input terminal of the NAND circuit _G24 , which is the set input terminal of the RS flip-flop circuit, receives the strobe charging gate signal T4 from the inverting output terminal of the RS flip-flop circuit _RSF4 (see FIG. 16). ing. Then, from the output terminal of the NAND circuit G ₂₃ , which is the output terminal of the RS flip-flop circuit, if there is overexposure when flash photography is performed using direct metering, a flash photography over signal S9 of the "H" level is sent to the strobe charging gate signal. Input port I1 of CPU 50 only while T4 is at “H” level.
4 is now output. Furthermore, the output terminal of the NAND circuit G ₂₄ , which is the inverting output terminal of the RS flip-flop circuit, is connected to the first output terminal of the 3-input AND circuit G ₉₈ .
connected to the input end of the On the other hand, the shutter control signal S17 during direct photometry is output from the output terminal of the note circuit _G28 to the first selection circuit 55 (see FIG. 15). It is also input to the other input terminal of the NAND circuit _G27 . One input terminal of the NAND circuit G ₂₇ is connected to the RS flip-flop circuit RSF _6.
A strobe under-limit signal T6 is applied from the inverted output terminal of (see FIG. 16). The output terminal of the NAND circuit G ₂₇ is connected to the NAND circuit G ₂₆ which is the reset input terminal of the RS flip-flop circuit formed by the NAND circuits G ₂₅ and G ₂₆ .
is connected to the other input end of the . Further, the strobe charging gate signal T4 is applied to one input terminal of the NAND circuit _G25 , which is the set input terminal of the RS flip-flop circuit.
From the output end of the NAND circuit G ₂₆ , which is the output end of the RS flip-flop circuit, if the exposure is underexposed when shooting with a flash using direct metering,
“H” level strobe photography under signal S10
However, the strobe charge gate signal T4 is input to the input port I15 of the CPU 50 only while the strobe charge gate signal T4 is at "H" level. Further, the output terminal of the NAND circuit _G25 , which is the inverting output terminal of the RS flip-flop circuit, is connected to the third input terminal of the AND circuit _G98 . The strobe charge gate signal T4 is applied to the second input terminal of the AND circuit G ₉₈ , and the output terminal of the AND circuit G ₉₈ is connected to the input port I16. Only then, a strobe light emission appropriate signal S20 which is at "H" level for about 2 seconds is output. Note that the strobe charge gate signal T4 is the 18th strobe charging gate signal T4.
As shown in FIG. g, the strobe synchronization time signal T3 changes to the "H" level at the same time as it is inverted to the "L" level, and then remains at the "H" level for two seconds. Further, the strobe under limiter signal T6 is a signal that changes to the "H" level 22 ms after the trigger signal S1 is inverted to the "H" level, as shown in FIG. 18h. Furthermore, as shown in FIG. 18a, the clock pulse CK is
It is a rectangular wave signal that repeats "H" level and "L" level at 32.768KHz.

Next, the operation of the strobe over/under determination circuit 65 configured as described above will be briefly described. Immediately after shutter release, integral output S2
is small, so the output of comparator _A8 is “L”
It has become a level. Therefore, at this point, the output of the inverting output terminal of the D-type flip-flop circuit _DF1 and the output of the NOT circuit _G28 are at the "H" level. However, the second input terminal of the NAND circuit G ₂₂ and one input terminal of the NAND circuit G ₂₇ are each at "L" level, and the NAND circuit
The outputs of _G22 and _G27 are at "H" level. Further, as can be seen from FIG. 18g, since the strobe charging gate signal T4 is at the "L" level immediately after the release, the strobe photography over signal S9 and the strobe photography under signal S10, which are the outputs of the RS flip-flop circuit, are respectively "L". “It is in a state where it has been reset to the level. Assume now that the photographing mode of the camera 10 is the direct metering photographing mode. Trigger switch shown in Figure 12
When SW ₂ opens, the head amplifier circuit 5 shown in Fig. 8
The potential of the first integral output S2 gradually rises.
When the shutter is fully open, the strobe trigger thyristor serves as the X contact as shown in Figure 15.
When SCR ₁ is turned on, a strobe flash is emitted. The potential of the integral output S2 is the comparator A ₈
When the potential becomes higher than the potential at the non-inverting input terminal of the circuit, the output of the comparator _A8 is inverted to "H" level, and at the same time, the output at the inverting output terminal of the D-type flip-flop circuit _DF1 is delayed by one pulse of the clock pulse CK. The signal changes to “L” level. the result,
At the output end of the NAND circuit G ₂₂ , there is a comparator A ₇
The inverted output of the output from the comparator _A8 is output for one cycle of the clock pulse CK after the output of the comparator A8 changes to the "H" level. Here, as mentioned above, the judgment level of comparator A ₇ is
Since the judgment level of comparator _A8 is set to √2 times, the output of comparator _A8 , which becomes the shutter control signal S17 through the knot circuit _G28 , changes to the "H" level, and then one cycle of the clock pulse CK is applied. If the exposure is 0.5Ev or more within 100μs, the output of comparator _A7 becomes “H”
Therefore, the output of the NAND circuit _G22 goes to the "L" level, and the strobe photography over signal S9, which is the output of the RS flip-flop circuit, is set to the "H" level, warning of overexposure as described later. A display is made.

On the other hand, if the output of comparator _A8 remains at the "L" level even after 6ms after the strobe fires,
That is, when the exposure level is still under, the strobe under-limit signal T6 changes to the "H" level, causing the output of the NAND circuit _G27 to go "L".
The strobe photography under signal S10, which is the output of the RS flip-flop circuit, is set to the "H" level, and an underexposure warning is displayed as described later. Since it takes approximately 6 ms from the time when the shutter control signal S17 is generated until the shutter trailing curtain moves within the photographic image frame, the determination of underexposure is also delayed until then.

Note that overexposure and underexposure warnings are displayed only during strobe photography using direct metering, depending on the photography mode determined by the CPU 50. In addition, the warning display for overexposure and underexposure is caused by the RS flip-flop circuit consisting of NAND circuits G ₂₃ and G ₂₄ and the NAND circuit, since the strobe charge gate signal T4 changes to "L" level after 2 seconds have elapsed after the strobe fires. The RS flip-flop circuits consisting of G ₂₅ and G ₂₆ are each reset and stopped when the strobe photography over signal S9 and the strobe photography under signal S10 are each inverted to the "L" level.

Also, after the strobe fires, if there is no overexposure or underexposure, the AND circuit G ₉₈
Since the first and third input terminals of G98 are at the "H" level, the AND circuit _G98 is
An "H" level strobe light emission appropriate signal S20 is output from the output end of the controller. As a result, CPU5
According to program 0, when flash photography is performed using direct metering, the appropriate exposure is displayed for 2 seconds.

FIG. 11 shows a detailed electrical circuit of the power hold circuit 67. This power hold circuit 67 supplies power to the magnet drive circuit 56 and the strobe control circuit 66 after the shutter release, and after the exposure is completed. is a circuit that automatically cuts off the power supply. From the positive pole of the power supply battery E ₁ there is an operating voltage supply line L ₁ , and from the negative pole there is a common earth line L ₀
are pulled out, and the ground line L ₀
is grounded. Between both lines L ₁ and L ₀ is a battery check switch SW ₅ and a resistor.
A series circuit of R ₃₈ and R ₃₉ is connected. The battery check switch SW ₅ is a self-reset switch that is closed in conjunction with the operation of the mode switching operation knob 21 corresponding to the "CHECK" indicator, and the switch SW ₅ and the resistor R ₃₈ are connected to each other. The connection point is connected to one input end of an AND circuit G ₃₈ (see FIG. 13). Also, the above resistor R ₃₈ and
The connection point with R ₃₉ is connected to the base of NPN transistor Q ₂₃ . The collector of transistor Q ₂₃ is connected to transistor Q ₃₄ through resistor R ₄₀
The emitter is connected to the base of , and the emitter is grounded. Also, the base of transistor Q ₂₃ is
It is connected to the collector of an NPN transistor Q ₂₄ , the emitter of which is grounded, and its _base connected to the collector of a PNP transistor Q ₂₅ through a resistor R ₄₁ . Transistor Q ₂₅ has its emitter connected to line L ₁ and its base connected to PNP transistors Q ₂₈ , Q ₂₉ ,
It is connected to the bases of Q ₃₀ , Q ₃₁ , Q ₃₂ and Q ₃₃ respectively, and each transistor Q ₂₅ , Q ₂₉ ,
Q ₃₀ , Q ₃₁ , Q ₃₂ and Q ₃₃ have their emitters connected to line L ₁ respectively, and transistor Q ₂₈
and constitutes a current mirror circuit.

Further, a series circuit including a release switch SW ₁ , a capacitor C ₆ , and resistors R ₄₄ and R ₄₃ is connected between the lines L ₁ and L ₀ . The release switch _SW1 is a switch that opens and closes in conjunction with the movable reflective mirror 31, and is closed when the mirror 31 is at the beginning of its ascent and opened at the end of its descent. The connection point between release switch _SW1 and capacitor _C6 is grounded through resistor _R42 . Also,
The connection point between resistors R ₄₄ and R ₄₃ is connected to the base of NPN transistor Q ₂₆ , whose emitter is grounded and whose collector is grounded _.
Connected to the emitter of NPN transistor _Q27 . Transistor Q ₂₇ has a resistor at its base
Transistor Q ₃₉ through R ₉₉ (see Figure 12)
is connected to the emitter, and the collector is NPN
connected to the collector of type transistor _Q35 . Transistor Q ₃₅ has a collector with resistor R ₄₅
It is also connected to the collector and base of the transistor _Q28 through the resistor Q28, the emitter is grounded, and the base is connected through the resistor _R46 to the connection point between the resistors ₄₈ and _R47 . One end of the resistor R ₄₈ is connected to the collector of the above transistor Q ₂₉ , and the resistor
The other end of R ₄₇ is grounded. Also, with resistance R ₄₈
The connection point with R ₄₇ is also connected to the collector of NPN transistor Q ₃₆ ,
The emitter of Q ₃₆ is grounded, and the base is connected to the NAND circuit G ₃₃ (see Figure 13) through the resistor R ₅₉ (see Figure 13).
(see figure) is connected to the output end of the The collector of the above transistor Q ₃₀ is connected through the resistor R ₄₉ to
It is connected to the base of transistor Q ₄₆ (see Figure 12). Also, the above transistor Q ₃₁
The collector of is grounded through a resistor R ₅₀ and also connected to the input terminal of a knot circuit G ₁₀₂ (see FIG. 13). Furthermore, the collector of the transistor Q ₃₂ is grounded through the resistor R ₅₁ and connected to the control signal input terminal of the latch circuit DF ₀ (see FIG. 9), so that the collector voltage of the transistor Q ₃₂ is Release signal S
It is now supplied as 0. Furthermore, the collector of the above transistor _Q33 is PNP
It is connected to the collector of type transistor Q ₃₄ and to the base of NPN type transistor Q ₃₇ through resistor R ₅₂ . The emitter of the transistor _Q37 is grounded, and the collector is connected to one end of the magnet drive circuit 56 and one end of the strobe control circuit 66, respectively. The other ends of the magnet drive circuit 56 and the strobe control circuit 66 are respectively connected to the line _L1 . Therefore, transistor _Q37 serves as a switching transistor that controls the power supply to magnet drive circuit 56 and strobe control circuit 66. In addition, the collector of the transistor Q ₃₇ is connected to the cathode of the light emitting diode D ₀ (see FIG. 13) for battery check indication and the resistor R ₅₈ (see FIG. 13).
(see figure) are also connected to one end of each. The above transistor _Q34 connects the emitter to line _L1
, connect the base to the transistor through the resistor R ₄₀
It is connected to the collector of Q ₂₃ and is forcibly turned on during the battery check operation so that the battery check is performed in the state of maximum current consumption that supplies power to the magnet drive circuit 56 and strobe control circuit 66. belongs to.

FIG. 12 shows a detailed electrical circuit of the trigger timing adjustment circuit 52. This trigger timing adjustment circuit 52 is a circuit for adjusting the photometry start timing in the head amplifier circuit 51. Trigger switch SW ₂ is a switch that opens in conjunction with the start of travel of the shutter front curtain and closes in conjunction with the completion of film winding. One end receives power supply voltage Vcc, and the other end receives power supply voltage Vcc. but
Connected to the base of NPN transistor _Q39 . Transistor Q ₃₉ has its collector connected to the collector of PNP transistor Q ₃₈ , and its emitter connected to the transistor through resistor R ₉₉ (see Figure 11).
It is connected to the base of Q ₇ (see Figure 11).
Transistor Q ₃₈ has the supply voltage Vcc on its emitter
is applied, and the base is a PNP type transistor.
They are connected to the bases of Q ₄₀ and Q ₄₈ , respectively.
A trigger timing delay capacitor _C7 is connected in parallel with the trigger switch _SW2 above.
One end of this capacitor C ₇ next to the base of the transistor Q ₃₉ is connected to the base of the PNP transistor Q ₄₁ and the semi-fixed resistor RV ₆ for the time constant that determines the trigger delay time together with the above capacitor C ₇ .
are connected to one end of each. The collector of transistor Q ₄₁ is grounded, and the emitter is connected to the base of PNP transistor Q ₄₂ .
The emitter of the transistor _Q42 is connected to the collector of the transistor _Q40 , and the power supply voltage Vcc is applied to the emitter of the transistor _Q40 . Also, the collector of transistor Q ₄₂ is
It is connected to the base of NPN transistor Q ₄₇ and to the collector of NPN transistor Q ₄₃ . The emitter of transistor Q ₄₃ is grounded, and the base is connected to the base and collector of NPN transistor Q ₄₄ . The emitter of transistor Q ₄₄ is grounded, and the collector is connected to PNP transistor Q ₄₉
connected to the collector. transistor
The emitter of _Q49 is connected to the collector of the transistor _Q40 , and the base is connected to the emitter of the PNP transistor _Q45 . The collector of transistor Q ₄₅ is grounded and the base is a resistor
Power supply voltage Vcc is applied through _R53 , and NPN type transistor is applied through resistor _R54 .
Connected to Q ₄₆ collector. The emitter of transistor Q ₄₆ is grounded and the base is resistor R ₄₉
(see FIG. 11) to the collector of transistor Q ₃₀ (see FIG. 11). Further, the collector of the transistor _Q46 is connected to the other end of the time constant semi-fixed resistor _RV6 , and is also connected to the collector and base of the transistor _Q48 through the resistor _R61 . Power supply voltage Vcc is applied to the emitter of transistor _Q48 , and transistor _Q48 forms a current mirror circuit with transistors _Q38 and _Q40 , respectively. The emitter of the transistor _Q47 is grounded, and the collector receives the power supply voltage Vcc through the resistor _R55 , and the collector is connected to the NAND circuit _G32.
(see FIG. 13) and the input end of the knot circuit _G101 , respectively. The above transistors _Q40 to _Q49 and resistors _R53 to _R55 ,
R ₆₁ constitutes a differential amplifier circuit, where the base of transistor Q ₄₁ is the non-inverting input terminal, the base of transistor Q 46 is the reflective input terminal, and the base of transistor Q ₄₆ is the reflective input terminal.
The collector of Q ₄₇ is the output terminal. The output terminal of the note circuit G ₁₀₁ , with the collector of the output transistor Q ₄₇ connected to the input terminal, is connected to the base of the transistor Q ₃ (see Fig. 8) through a resistor R ₁₅ (see Fig. 8). , a trigger signal S that inverts to "H" level after a predetermined elapsed time after the trigger switch SW ₂ is opened is applied to the same transistor Q ₃ .
1 (see Figure 18b).

FIG. 13 shows the battery check circuit 63.
and a detailed electric circuit of the power hold release circuit 64. First, power hold release circuit 6
The explanation will start from configuration 4. Power hold release circuit 6
4 is a circuit for releasing the power hold state of the power supply hold circuit 67. When releasing the power supply hold state, when the power supply voltage Vcc is below a specified voltage, the shutter is closed and a predetermined state is set. There are three ways to forcibly turn it off when time has elapsed and during long exposure, so the NAND circuit _G33 , which is the output end of the power hold release circuit 64, has three input ends. It is being The output terminal of the NAND circuit G ₃₂ is connected to the first input terminal, and one input terminal of the NAND circuit G ₃₂ is connected to the first input terminal.
The collector of the transistor Q ₄₇ (see FIG. 12) is connected to the other input terminal via the knot circuit G ₃₄ to the output terminal of the comparator A ₁₀ . When the power supply voltage Vcc is below the specified level, the output of the comparator _A10 goes to the "L" level, so the output of the NAND circuit _G32 goes to the "L" level, and the power supply hold is released. However, if the power supply hold is canceled due to a drop in the power supply voltage Vcc, if the power supply voltage Vcc drops during exposure and the power supply hold is released, the exposure error may increase or the trailing curtain holding magnet MG ₁ (first (see Figure 15) may become unstable, so it is designed to be performed only before the exposure operation is performed. That is,
The inverted signal of the logical product of the collector voltage (trigger signal) of the transistor Q ₄₇ (see FIG. 12) and the output of the not circuit G ₃₄ is used as one signal for releasing the power supply hold. Also, the above NAND circuit
_A delay circuit DL ₀ (first
5), a power hold release signal S12, which is a delayed signal of the exposure end signal S13, is applied. Furthermore, the third of the NAND circuit G ₃₃
The input terminal of is connected to the output terminal Q of the RS flip-flop circuit RSF ₂ (see FIG. 16), and is adapted to receive an autolimiter signal T2 which also serves as a power supply limiter signal. The output terminal of the NAND circuit _G33 is connected to the base of the transistor _Q36 (see FIG. 11) through a resistor _R59 .

On the other hand, the battery check circuit 63 is a circuit for detecting whether the power supply voltage Vcc is equal to or higher than a specified voltage. This circuit has a power supply voltage at one end.
A series circuit of resistors R ₅₆ , R ₅₇ and R ₅₈ to which Vcc is applied is provided, and the connection point between resistors R ₅₆ and R ₅₇ is connected to the non-inverting input terminal of comparator A ₁₀ .
The connection points of R ₅₇ and R ₅₈ are respectively connected to the non-inverting input terminal of comparator A ₁₁ . In addition, the inverting input terminals of both comparators A ₁₀ and A ₁₁ have
A reference voltage V ₁ is applied to each. The output terminal of comparator A ₁₀ is a 3-input NAND circuit G ₃₅
, the third input terminal of the three-input NAND circuit _G36 , and the input terminal of the knot circuit _G34 , respectively. Further, the output terminal of the comparator A ₁₁ is connected to the second input terminal of the NAND circuit G ₃₆ . The first input terminal of the NAND circuit G ₃₅ is connected to the timer circuit 68 shown in FIG.
A blinking periodic signal T8 consisting of a pulse signal of Hz is applied. Further, the output terminal of the AND circuit G ₃₈ is connected to the third input terminal of the NAND circuit G 35 and the first input terminal of the NAND circuit G ₃₆ , and one input terminal of the AND circuit _{G 38 is} connected to the battery. It is connected to one end of a check switch _SW5 (see FIG. 11), and the other input end is connected to the collector of a transistor _Q31 (see FIG. 11) via a knot circuit _G102 . The output terminals of the NAND circuits G ₃₅ and G ₃₆ are connected to one and the other input terminals of the NAND circuit G ₃₇ , respectively, and the output terminal of the NAND circuit G ₃₇ is connected to a light emitting diode D for battery check indication through a resistor R ₆₀ . connected to the anode of ₀ .
This light emitting diode _D0 is disposed so as to correspond to the battery check display light emitting window 23, and its cathode is connected to the collector of the transistor _Q37 (see FIG. 11).

Next, the operations of the power supply hold circuit 67, trigger timing adjustment circuit 52, power supply hold release circuit 64, and battery check circuit 63 shown in FIGS. 11 to 13 will be briefly described. Now, shutter release button 11 (1st,
2) is pressed, the release switch SW ₁ linked to this is closed, and the capacitor C ₆
and transistor Q ₂₆ is turned on through resistor R ₄₄ . At this point, trigger switch SW ₂ is closed, so transistor Q ₂₇ is on, transistor Q ₂₈ is turned on through resistor R ₄₅ , and transistors Q ₂₉ and Q ₃₅ are turned on.
Once the transistor _Q35 is turned on, the base current is supplied from the collector of the transistor _Q29 , so the power supply hold state is maintained. And when transistor Q ₂₈ turns on,
Since transistors Q ₂₉ to Q ₃₃ are all turned on,
Transistor _Q37 is also turned on, and power is supplied to magnet drive circuit 56 and strobe control circuit 66. On the other hand, the trigger timing adjustment circuit 52
Also, base current is supplied to transistor Q ₄₆ through transistor Q ₃₀ . Then, the movable reflection mirror 31 completes its ascent, the shutter front curtain starts running, and the trigger switch SW ₂
opens, the base potential of transistor Q ₄₁ gradually decreases, and capacitor C ₇ and semi-fixed resistor
After a delay time determined by the time constant of the delay circuit consisting of RV ₆ and the ratio of resistors R ₅₃ and R ₅₄ , the output transistor
_Q47 is turned on, and the output of the NOT circuit _G101 is inverted to the "H" level (see FIG. 18b). This “H”
The level signal is the resistance as the trigger signal S1.
Transistor Q ₃ through R ₁₅ (see Figure 18)
The transistor Q ₃ is turned on and the transistors Q ₅ and Q ₁ are turned off, making it possible to integrate the photocurrent by direct photometry. Next, install the trailing curtain holding magnet MG ₁ (see Figure 15).
is demagnetized and a predetermined delay time elapses after the rear shutter curtain starts running, the delay circuit
The “L” level power hold release signal S12 is output from DL ₀ (see Figure 15), and the NAND circuit is activated.
The output of _G33 becomes "H" level, transistor _Q36 is turned on, the base current of transistor _Q35 is cut off, and the power supply hold state is released. That is, when transistor Q ₃₅ is turned off, transistors Q ₂₈ , Q ₃₃ , and Q ₃₇ are turned off in sequence, and magnet drive circuit 56 and strobe control circuit 66 are turned off.
Power is cut off.

Furthermore, when the power supply voltage Vcc is below the specified voltage, the output of the comparator A ₁₀ is at the "L" level, and one input terminal of the NAND circuit G ₃₂ is normally at the "H" level, so the output of the NAND circuit G ₃₂ is at the "H" level. Inverted to “L” level. Therefore, transistor _Q36 is turned off, and the power hold state is released in the same way as described above. By the way, the release of the power supply hold state due to a drop in the power supply voltage Vcc is as follows:
If the power supply voltage Vcc drops during exposure, the exposure error will increase if the power supply hold is cut off, and the operation of the trailing curtain holding magnet MG ₁ (see Figure 15) may become unstable. In order to prevent this, this is not done during exposure. That is, during exposure, the collector voltage of the transistor _Q47 , which serves as a trigger signal, is at the "L" level, so the inverted output of the AND of this signal and the inverted signal of the output of the comparator _A10 is used to release the power hold. Nando circuit as one signal for G ₃₃
The input signal is input to the first input terminal of the . Therefore, the power supply hold due to a drop in the power supply voltage Vcc is released until the trigger switch SW ₂ is opened, but if the power supply hold is released during this time, the movable reflection mirror 31 is mechanically released. It is designed to lock at a position on the way up.

Furthermore, the power hold circuit 57 is used when photographing in a very dark place and resulting in a long exposure.
The power hold is forcibly cut off after a predetermined period of time has elapsed. This means that if the exposure time is several minutes, it is better to use the battery as a power source than to take pictures.
It is out of consideration that it would be kinder to prevent the wear and tear of E ₁ .
Therefore, the auto limiter signal T, which also serves as the power limiter signal, is connected to the third input terminal of the NAND circuit _G33 .
2 is input, and this signal T2
However, as shown in FIG. 18e, after a predetermined time (120 seconds) has elapsed since the trigger is released, it is inverted to the "L" level, and the power hold is cut off in the same manner as described above.

Note that a signal is supplied from the emitter of the transistor Q ₃₉ to the transistor Q ₂₇ through the resistor R ₉₉ , but this is because chattering occurs when the release switch SW ₁ is opened when the movable reflection mirror 31 is lowered. This is to prevent the power hold circuit 67 from entering the power hold state again by turning off the transistor _Q27 when the trigger switch _SW2 is opened.

On the other hand, when performing a battery check,
The photographing mode switching operation knob 21 (see FIG. 2) is made to correspond to the "CHECK" indicator. Then,
The battery check switch _SW5 is turned on, and one input terminal of the NAND circuit _G38 becomes "H" level. Now, when the power supply hold circuit 67 is not in the power supply hold state, that is, during normal operation other than during shutter release operation, the output of the NOT circuit G ₁₀₂ is at the "H" level, so the output of the NAND circuit G ₃₈ is at the "H" level. “It becomes a level. First, in the first case, under normal conditions when the power supply voltage Vcc is higher than the specified voltage, the outputs of comparators A ₁₀ and A ₁₁ are both at "H" level, so the output terminal of NAND circuit G ₃₅ receives a blinking periodic signal. T8 is output, and the output terminal of the NAND circuit _G36 becomes "L" level. Therefore,
The “L” level output of NAND circuit G ₃₆ is prioritized,
The output terminal of the NAND circuit _G37 becomes "H" level, and the light emitting diode for battery check indication is activated.
D ₀ becomes lit. Therefore, it is displayed that the power supply voltage Vcc is higher than the specified voltage. Next, the second
In this case, if the power supply voltage Vcc is above a certain specified voltage but lower than other specified voltages, that is,
Compared to the reference voltage V ₁ , the potential at the connection point between resistors R ₅₆ and R ₅₇ is high, but when the potential at the connection point between resistors R ₅₇ and R ₅₈ is low, the output of comparator A ₁₀ is “H”. Level, comparator A ₁₁ output is “L”
level, and the output of the NAND circuit _G36 becomes "H" level, while the blinking periodic signal T8 is output to the output terminal of the NAND circuit _G35 . Therefore, the blinking periodic signal T8 is output to the NAND circuit _G37 ,
The light emitting diode _D0 is in a state where it repeatedly blinks at about 10Hz. Therefore, a message indicating that the power supply voltage Vcc has decreased is displayed, prompting the user to replace the power supply battery _E1 . Furthermore, in a third case, when the power supply voltage Vcc drops below the other specified voltage mentioned above and the electric circuit of the camera 10 becomes inoperable, both the outputs of the comparators A ₁₀ and A ₁₁ become The output becomes "L" level, the outputs of NAND circuits G ₃₅ and G ₃₆ both become "H" level, and the output of NAND circuit G ₃₇ becomes "L" level. Therefore, the light emitting diode D ₀ continues to be off without turning on,
A message indicating that the power supply voltage Vcc is below the specified voltage is displayed.

Note that if the shooting mode switching operation knob 21 is operated and the battery check switch SW ₅ is closed during the shutter release operation, the output of the note circuit G ₁₀₂ becomes "L" level, so the NAND circuit G ₃₈ becomes the "L" level, and accordingly, the output of the NAND circuit _G37 becomes the "L" level, so that the battery check indication by the light emitting diode _D0 is not performed. Furthermore, during a battery check, the transistor Q ₃₄ is forcibly turned on through the transistor Q ₂₃ to forcibly energize the magnet drive circuit 56 and the strobe control circuit 66, so that the battery check is performed with the maximum current consumption. I have to.

FIG. 14 shows a detailed electric circuit of the strobe determination circuit 62. This strobe determination circuit 62 determines whether the strobe is powered on or not and whether charging is completed by determining the current level of a signal S15 input through one signal line from the strobe. This is a circuit for detection. The NPN transistor Q ₅₀ is a diode-connected transistor, and the power supply voltage Vcc is applied to the emitter, and the collector and base are connected to the strobe mounting shoe 24 or the strobe connection collector 25 (see Figures 1 and 2). ) is adapted to be connected to an electrical circuit of a strobe (not shown) through electrical contacts. A series circuit of resistors R ₆₇ and R ₆₅ is connected in parallel with this transistor Q ₅₀ .
In addition, the resistor R ₆₇ is connected to a PNP transistor Q ₅₁
are connected in parallel with the emitter as the power supply and the collector as the strobe. The collector of this transistor Q ₅₁ is also connected to the base of PNP type transistor Q ₅₂ , and the base is connected to the emitter of transistor Q ₅₂ and the PNP type transistor
They are connected to the bases of Q ₇₇ and Q ₅₆ , respectively.
The collector of the transistor _Q52 is grounded through a resistor _R68 , the power supply voltage Vcc is applied to the emitter of the transistor _Q77 , and the collector is grounded through resistors _R70 and _R69 in series.
The connection point of resistors R ₇₀ and R ₆₉ is connected to the base of NPN transistor Q ₅₃ , whose emitter is grounded and whose collector is connected to the resistor _.
Power supply voltage Vcc is applied through R ₇₁ and R ₇₂ in series. The connection point between resistors R ₇₁ and R ₇₂ is connected to the bases of PNP transistors Q ₅₄ and Q ₅₅ , respectively, and the power supply voltage Vcc is applied to the emitter of transistor Q ₅₄ , and the collector is connected to the resistor.
Grounded through R ₇₉ . Further, a signal line for transmitting the strobe power-on signal S14 is drawn out from the collector of the transistor _Q54 , and is connected to the input port I of the CPU 50 (see FIG. 7).
13. Above transistor Q ₅₅
is applied the power supply voltage Vcc to the emitter, and the collector is connected to the NPN type transistor through the resistor _R73 .
It is connected to the base and collector of Q ₅₇ and to the base of NPN transistor Q ₅₈ , respectively. The emitter of transistor _Q57 is grounded, the collector of transistor _Q58 is connected to the collector of transistor _Q56 , and the emitter is grounded through resistor _R74 . The transistor _Q56 has its emitter applied with the power supply voltage Vcc, its collector further grounded through a resistor _R75 , and connected to the base of an NPN transistor _Q59 through a resistor _R76 . The transistor _Q59 has its collector applied with the power supply voltage Vcc through the resistor _R77 , and has its collector grounded. Also, transistor Q ₅₉ is
The collector is connected to the input terminal of Not circuit G ₃₉ , and the output terminal of Not circuit G ₃₉ is connected to the AND circuit.
Connected to one input end of G ₄₀ . The other input terminal of the AND circuit _G40 is connected to the RS flip-flop circuit _RSF4 (see Fig. 16) via the NOT circuit _G41 .
It is connected to the inverted output terminal of the strobe charge gate signal T4, and is adapted to receive an inverted signal of the strobe charging gate signal T4. And the output terminal of AND circuit G ₄₀ is a resistor
It is connected to the base of an NPN transistor Q ₆₀ through R ₇₈ , the emitter of the transistor Q ₆₀ is grounded, and the collector is connected to the cathode of a light emitting diode D ₁ for indicating the completion of strobe charging. This light emitting diode _D1 is incorporated in the photographing information display device 39, and is designed to display a luminous "ⓓ" shape in the viewfinder to indicate that the strobe has been charged. The anode of the light emitting diode _D1 is connected to one end of the constant current circuit _CC3 , and the other end of the constant current circuit _CC3 is applied with the power supply voltage Vcc.

Next, the operation of the strobe determination circuit 62 configured as described above will be briefly described. First, when the power switch of the strobe (not shown) is turned on,
A current of about 10 μA flows toward the strobe as the strobe power signal S15. Then transistor Q ₅₂ turns on, and then transistor
The transistors Q ₅₁ , Q ₇₇ , Q ₅₃ , and Q ₅₄ are turned on in sequence. Therefore, the collector of transistor _Q54 becomes "H" level. Also, transistor
Q ₅₅ , Q ₅₆ , and Q ₅₈ are also turned on, but when the strobe power signal S15 is about 10 μA, the base current of transistor Q ₅₆ is small, and the collector potential is lower than that of the transistor.
Transistor Q ₅₉ remains off because it is not high enough to supply enough current to the base of Q ₅₉ .
Therefore, the output of the NOT circuit G ₃₉ becomes "L" level, the output of the AND circuit G ₄₀ also becomes "L" level, the transistor Q ₆₀ does not turn on, and the light emitting diode D ₁ for indicating completion of charging does not light up. . next,
When charging of the strobe is completed, a current of approximately 100 μA begins to flow toward the strobe as a strobe charging signal S15. Then, the transistor
_The collector potential of Q ₅₆ becomes high enough, and enough base current flows through transistor Q ₅₉ to turn it on. As a result, the collector potential of transistor _Q59 decreases, and the node circuit
The output of _G39 becomes "H" level. The strobe charge gate signal T4 is a signal that remains at the "H" level for approximately 2 seconds after the strobe fires, so the output of the AND circuit _G40 is at the "L" level for 2 seconds after the strobe fires. During the other periods, the output of the AND circuit _G40 is at the "H" level, and the transistor _Q60 is turned on. Therefore, light emitting diode
Current flows from the constant current circuit _CC3 to _D1 , causing the diode _D1 to emit light, indicating that the strobe is fully charged. The reason why the strobe charge completion display is not displayed for 2 seconds after the strobe fires is that the strobe is not detected after the strobe fires through the same signal line as the strobe power signal and strobe charging signal S15.
This is because an appropriate exposure signal that repeatedly turns on and off at 100 μA is sent, so it is necessary to disable the operation of the light emitting diode _D1 during this time. In addition,
The appropriate flash photography display is performed by blinking the liquid crystal display panel of the photography information display device 39, as will be described later.

FIG. 15 shows the selection circuit 55, magnet drive circuit 56 and strobe control circuit 66 shown in FIG.
shows a detailed electrical circuit. The first selection circuit 55 is configured to select whether the magnet drive circuit 56 should be controlled by a shutter control signal S17 based on direct photometry or by a shutter control signal S16 output from the CPU 50, depending on the shooting mode. It is a circuit. Nando circuit G ₄₈
The first input terminal of is connected to one end of auto switch SW ₄ (see Fig. 7), and a signal that becomes "H" level only in the same auto mode as input to input port I0 of CPU 50 is applied. It's becoming like that. The second input terminal of the NAND circuit G ₄₈ is connected to the output terminal of the NAND circuit ₃ (see FIG. 7) via the knot circuit G ₄₆ , and is connected to the output terminal of the NAND circuit 3 (see FIG. 7). An inverted signal of the signal that becomes "H" level is applied only in the same auto mode. Furthermore, the third input terminal of the NAND circuit G ₄₈ is connected to the output terminal of the NAND circuit G ₉ (see FIG. 7) via the knot circuit ₄₇ , and is connected to the output terminal of the NAND circuit G 9 (see FIG. 7). An inverted signal of the signal that becomes "H" level is applied only in the same spot mode. Therefore, in the NAND circuit _G48 , all inputs become "H" level only when the mode is auto mode, neither memory mode nor spot mode, that is, average direct auto mode is selected. The output becomes "L" level. One input terminal of the NAND circuit G ₅₁ is configured to receive an inverted signal of the signal applied to the first input terminal of the NAND circuit G ₄₈ via the knot circuit ₄₉ , and the other input terminal is connected to the input terminal of the NAND circuit G 51. The end is knot circuit ₅₀
via manual switch WS ₃ (see Figure 7)
It is connected to one end of the input port I1 of the CPU 50, and an inverted signal of the signal that becomes "H" level only in the same manual mode as that input to the input port I1 of the CPU 50 is input. Therefore, the output of the NAND circuit _G51 is at the "L" level only in the shooting mode that is neither the auto mode nor the manual mode, that is, the off mode. The output end of NAND circuit G ₄₈ is connected to one input end of NAND G ₅₂ , and the output end of NAND circuit G ₅₁ is connected to one input end of NAND circuit G ₅₂ .
is connected to the other input terminal of the NAND circuit 62, and also connected to one input terminal of the NAND circuit _G64 through the NOT circuit _G63 . The output terminal of the NAND circuit G ₅₂ is connected to the other input terminal of the AND circuit G ₇₀ as well as the NAND circuit G 52.
G ₆₆ and one input terminal of AND circuit G ₆₉ , respectively, and also connected to one input terminal of NAND circuit G ₅₄ and the other input terminal of NAND circuit G ₅₅ through NOT circuit G ₅₃ . . The output of NAND circuit _G54 becomes "H" level when the output of either NAND circuit _G48 or _G51 is "L" level. That is, it is determined whether the shooting mode is the average direct auto mode, the off mode, or another shooting mode, and the output of the NAND circuit _G52 becomes "H" level only in the average direct auto mode or the off mode. Consequently, in the off mode, only the maximum exposure time is regulated, and photography is performed using the same photometry method as in the average direct auto mode. Note that the output of this NAND circuit 5 is the bias switching signal S4.
The current is input to the operational amplifier A ₂ (see FIG. 8), and as described above, it also serves to switch the bias current of the operational amplifier A ₂ according to the shooting mode.

The other input terminal of the NAND circuit G ₅₄ is connected to the output terminal of the NAND circuit G ₂₈ (see FIG. 10),
Shutter control signal S17 by direct photometry
One input terminal of the NAND circuit G ₅₅ is connected to the output port O9 of the CPU 50 (see FIG. 7), and the memory,
A shutter control signal S16 in each of the manual and spot modes is input. The output terminal of the NAND circuit G ₅₄ is connected to the second input terminal of the 3-input NAND circuit G ₅₇ .
The output terminal of _G55 is connected to the third input terminal of NAND circuit _G57 . Also, the first of the NAND circuit G ₅₇
The input terminal of is connected to the output terminal Q of the RS flip-flop circuit RSF ₀ (see Fig. 16) via the knot circuit G ₅₆ .
connected to the trigger and approximately after the trigger opens.
An inverted signal of the high-speed limiter signal T0 (see FIG. 18c) which maintains the "H" level for 500 .mu.s is input. This high speed limiter signal T0 is a signal for determining the shortest shutter speed. That is, if the average direct auto mode or off mode is currently selected, the output of the NAND circuit _G54 will be at the "L" level only while the shutter control signal S17 by direct photometry is at the "H" level. On the other hand, the NAND circuit
Since the output of _G55 is at the "H" level regardless of the level of the shutter control signal S16 in manual mode, etc., the output of the NAND circuit _G57 is at the "H" level if the output of the NOT circuit _G56 is at the "H" level. , is regulated by the output of the NAND circuit _G54 , and becomes "H" level only when the shutter control signal S17 is "H" level. In other words, the shutter control signal S17 based on direct photometry is output to the output terminal of the NAND circuit _G57 . Similarly, in memory hold, manual mode, and spot mode, the shutter control signal S16 is output to the output terminal of the NAND circuit _G57 . Here, as shown in FIG. 18c, the high-speed limiter signal T0 maintains the "H" level for about 500 μs after the trigger is opened, so the output of the NAND circuit _G57 is output from the NAND circuits _G54 , G Regardless of the output of ₅₅ , it remains “H” during this time.
level, and the trailing curtain holding magnet MG ₁ will not be demagnetized. In other words, the shortest shutter time is limited to 1/2000 seconds by the signal T0.

One input terminal of the AND circuit G ₇₀ is connected to the collector of the transistor Q ₅₄ (see FIG. 14), and is configured to receive the strobe power-on signal S14. And the AND circuit
The output terminal of _G70 is connected to one input terminal of a NAND circuit _G60 and the other input terminal of a NAND circuit _G58 through a knot circuit _G59 . Nando circuit G ₅₈
One input terminal of is connected to the output terminal of the NAND circuit G ₅₇ , and the other input terminal of the NAND circuit G ₆₀ is connected to the output terminal Q of the RS flip-flop circuit RSF ₁ (see Fig. 16). The strobe synchronization time signal T3 is input.
The strobe synchronization time signal T3 is a signal that maintains the "H" level for 16 ms even after the trigger is opened, as shown in FIG. 18f. The above NAND circuit
The output end of _G58 is connected to one input end of NAND circuit _G61 , and the output end of NAND circuit _G60 is connected to the other input end of NAND circuit _G61 . If the strobe is currently in the average direct auto mode or off mode and the strobe power is not turned on or the strobe is not attached to the camera 10, the strobe power on signal S14 is "L".
Therefore, the same signal as the output signal of the NAND circuit _G57 is output to the output terminal of the NAND circuit _G61 . Also, when the strobe is attached and the power is turned on from this state, the slot power-on No. 4 S14 goes to "H" level, and the strobe synchronization seconds signal T3 is output to the output terminal of the NAND circuit _G61 . It becomes like this. Therefore, the shutter time is
It becomes 1/60 second of constant speed. Note that in a shooting mode other than the average direct auto mode or off mode, the output of the AND circuit _G70 is at the "L" level, and the strobe synchronization time signal T3 is no longer involved in shutter control. By the way, as long as the strobe is turned on, the shutter speed must be set to the strobe synchronization speed to fire the strobe.The reason why the shutter speed is set to the strobe synchronization speed and the strobe fires as long as the strobe is turned on is because conventional cameras have a high-speed shutter speed of about 1/60 seconds or more. At times, a method was used in which the strobe was not fired, but this method went against the photographer's intention, so this was done to correct this problem. In other words, with conventional cameras, there is almost no need to fire the strobe at high-speed shutter speeds when the subject is bright, so the strobe was not fired in order to save power consumption of the strobe. If this is done, it may be inconvenient because it may go against the photographer's drawing intention, so the shutter time is forcibly set to the strobe synchronization time to cause the strobe to emit light.

The output terminal of the NAND circuit _G61 is connected to the base of a magnet control transistor _Q66 of the magnet drive circuit 56 through a resistor _R91 . This magnet control transistor Q ₆₆
is made up of NPN transistors,
Its emitter is grounded, and its collector receives power supply voltage Vcc through the coil of trailing curtain holding magnet _MG1 . This power supply voltage
As described above, Vcc is applied only when the power supply hold circuit 67 (see FIG. 11) holds the power supply. Also, Nando circuit G ₆₁
The output terminal of is connected to the input port I12 of the CPU 50 (see FIG. 7), and the output of the same circuit _G61 is sent to the input port I12 as the exposure end signal S13.
I'm getting used to it. Furthermore, the output terminal of the NAND circuit G ₆₁ is connected to the second input terminal of the NAND circuit G ₃₃ (see Figure 13) through the delay circuit DL ₀ , and the output terminal of the NAND circuit G _{61 is connected to the second input terminal of the NAND circuit G 33} (see Figure ₁₃₎ . After being delayed for a predetermined time, the signal is input to the NAND circuit _G33 as the power hold release signal S12. The delay circuit DL ₀ was provided because the shutter drive circuit 56 and flash control circuit 66 are supplied with power through the power supply hold circuit ₆₇ (see Figure 11). This is to prevent the strobe control circuit 66 from operating normally if the power supply hold circuit 67 is directly released by the output exposure end signal S13.

As mentioned above, the output terminal of NAND circuit G ₅₁ is
One input end of the NAND circuit G ₆₂ and the knot circuit
It is also connected to one input end of the NAND circuit G ₆₄ through G ₆₃ . The other input terminal of the NAND circuit G ₆₂ is connected to the RS flip-flop circuit RSF ₂ (16th
(see figure) is connected to the output terminal Q of the same circuit.
Auto limiter signal T2 is input from _RSF2 . As shown in Figure 18e, this auto limiter signal T2 is a signal that maintains the "H" level for 120 seconds even after the trigger is released, and is a signal that regulates the maximum exposure time in auto mode. . The other input terminal of the NAND circuit G ₆₄ is connected to the RS flip-flop circuit RSF ₃ (16th
(see figure) is connected to the output terminal Q of the same circuit.
The off-limiter signal T1 is inputted from _RSF3 . This off-limiter T ₁ is
As shown in Figure 18d, after the trigger is released,
This signal maintains the "H" level for 24ms and is the signal that determines the shutter speed in off mode. The output end of NAND circuit G ₆₂ is AND circuit G ₆₅
The output terminal of the NAND circuit G ₆₄ is connected to the other input terminal of the AND circuit G ₆₅ . And the output terminal of AND circuit G ₆₅ is
It is connected to the base of an NPN transistor _Q63 through a resistor _R80 , the emitter of the transistor _Q63 is grounded, and the collector is connected to the base of the transistor _Q66 . Now, when the output of the NAND circuit G ₅₁ is at the "L" level, that is, in the off mode, the output of the NOT circuit G ₆₃ is at the "H" level, and the inverted signal of the off limiter signal 1 is at the output terminal of the AND circuit ₆₅ . Output. Therefore,
After 24ms have elapsed after the trigger is released, transistor Q ₆₃ turns on, transistor Q ₆₆ turns on regardless of the output of NAND circuit G ₆₁ , magnet MG ₁ is demagnetized, and the shutter is closed.
Also, when the mode is not off, the AND circuit G ₆₅
An inverted signal of the autolimiter signal T2 is outputted to the output terminal of the autolimiter signal T2. Therefore, after the trigger is released, approximately 2
After the minute has elapsed, transistor Q ₆₃ turns on, forcing the shutter to close in the same way.

Next, the strobe control circuit 66 will be described.
PNP transistor Q ₆₄ has a base resistor R ₈₅
through the RS flip-flop circuit RSF ₁ (first
6) and is connected to the output end detection Q of the sensor (see Fig. 6), and is adapted to receive the strobe synchronization time signal T3. The collector of this transistor _Q64 is grounded, and the emitter is connected to the base of a PNP transistor _Q65 through a resistor _R86 . The base of the transistor Q ₆₅ is a resistor
It is connected to the emitter of the same transistor _Q65 through _R87 , and this emitter is connected to the power supply voltage Vcc.
is applied. In addition, the collector of the transistor Q ₆₅ is grounded through a series circuit of resistors R ₈₈ and R ₈₉ , and the connection point of both resistors R ₈₈ and R ₈₉ is
Connected to the gate of thyristor SCR ₁ for strobe trigger via capacitor C ₈ . The gate of thyristor SCR ₁ is grounded through a resistor R ₉₀ , and the cathode is directly grounded.
Further, the annot of the thyristor SCR ₁ is connected to the electric circuit of the strobe through the electric contacts of the strobe mounting shoe 24 (see Fig. 2) or the connecting commentor 25 (see Fig. 1). When the thyristor SCR ₁ is fired, a strobe light emission signal S19 is transmitted to the strobe. Now, after attaching the flash to the camera 10 and charging it, press the shutter release button 11.
(See Figures 1 and 2) is pressed. Then,
After the shutter front curtain runs and the trigger is released, approximately
After 16ms has elapsed, the strobe synchronization time signal T3
becomes “L” level, so transistor Q ₆₄
turns on, transistor Q ₆₅ turns on, a pulse voltage is applied to the gate of thyristor SCR ₁ through capacitor C ₈ , and the thyristor
SCR ₁ is on. Then, a trigger current flows from the strobe as a strobe light emission signal S19 through the thyristor _SCR1 , and the strobe emits light.

On the other hand, one input terminal of the NAND circuit G ₆₈ is connected to the collector of the transistor Q ₅₄ (see FIG. 14) to input the strobe power-on signal S14, and the other input terminal is ,
It is connected to the output end of the knot circuit _G28 (see FIG. 10), and is adapted to input a shutter control signal S17 based on direct photometry. And the output terminal of NAND circuit G ₆₈ is an AND circuit
The other input terminal of the NAND circuit G ₆₆ is connected to the other input terminal of the NAND circuit G ₆₆ via the other input terminal of the NAND circuit G 69 and the other input terminal of the NAND circuit G ₆₆ . NAND circuit G ₆₆ and AND circuit
One input terminal of G ₆₉ is connected to the output terminal of NAND circuit G ₅₂ , respectively. The output end of the NAND circuit G ₆₆ is connected to a PNP type transistor through the resistor R ₈₁ .
Connected to the base of Q ₆₁ , the output terminal of AND circuit G ₆₉ is connected to the PNP type transistor through resistor R ₈₂
Connected to the base of Q ₆₂ . transistor
Power supply voltage Vcc is applied to the emitter of Q ₆₁ , and the collector is connected to the collector of transistor Q ₆₂ through a series circuit of resistors R ₈₃ and R ₈₄ . The emitter of transistor Q ₆₂ is grounded. And the connection point of the above resistors R ₈₃ and R ₈₄ is
It is connected to the electric circuit of the strobe through the electric contacts of the strobe mounting shoe 24 (see Fig. 2) or the connection connector 25 (see Fig. 1), and the strobe dimming signal S is sent to the strobe.
18. Currently, when in average direct auto mode or off mode,
Since the output of NAND circuit G ₅₂ is at the "H" level, the gates of NAND circuit G ₆₆ and AND circuit G ₆₉ are opened, and the output signal of NAND circuit G ₆₈ is delivered to the output terminal of AND circuit G ₆₉ . The output terminal of NAND circuit G ₆₆ receives the inverted signal of the output of NAND circuit G ₆₈ .
Each is output. When a strobe is attached to the camera 10 and flash photography is performed using direct metering, the strobe power-on signal S14 is at the "H" level, so the output terminal of the NAND circuit _G68 is
An inverted signal of the shutter control signal S17 during direct photometry is output. Now, assume that the shutter release button 11 (see FIGS. 1 and 2) is pressed in this state, the shutter front curtain runs, and exposure is started. While the exposure level does not reach an appropriate level, the shutter control signal S17 is at the "H" level, so the output of the NAND circuit _G66 is at the "L" level and the output of the AND circuit _G69 is also at the "L" level. Therefore, the transistor Q ₆₁ is turned on, the transistor Q ₆₂ is turned off, the connection point between the resistors R ₈₃ and R ₈₄ is electrically connected to the power supply through the resistor R ₈₃ , and the strobe dimming signal S18 is “ It becomes H” level. When the strobe fires and the amount of exposure light reaches the appropriate level,
Shutter control signal S17 is inverted to "L" level, transistor _Q61 is turned off, transistor _Q62 is turned on, and strobe light control signal S
18 becomes "L". As a result, a strobe light control circuit (not shown) is activated, and the strobe light emission is stopped. Note that when the camera 10 is neither in the average direct auto mode nor in the off mode, the output of the NAND circuit G ₅₂ is at the "L" level, the output of the NAND circuit G ₆₆ is at the "H" level, and the output of the AND circuit G ₆₉ is at the "L" level. The output becomes "L" level, transistors _Q61 and _Q62 are both turned off,
The strobe dimming signal S18 no longer exerts any influence on the dimming circuit of the strobe.

FIG. 16 shows a detailed electrical circuit of the timer circuit 68. This timer circuit 68 is
A circuit for creating various timer signals for controlling the camera 10 of the present invention, which is a clock pulse CK with a fundamental frequency of 32.768 KHz (see FIG. 18a).
27 cascade-connected T-type flip-flop circuits TF ₀ to _{TF 26} and a selection circuit that selects or combines the outputs of the T-type flip-flop circuits TF ₀ to _{TF 26} to create a desired timer signal. , and a reset circuit for initializing the timer circuit 68. The cascaded T-type flip-flop circuits TF ₀ to TF ₂₆ are
The output terminals Q ₀ to _{Q 26} of each T-type flip-flop circuit TF ₀ to TF ₂₆ form a binary counter.
A pulse signal of 2 ^{- (n+1)} × 32.768 KHz (where n is an arbitrary integer of 0≦n≦26 and corresponds to the subscript of the circuit TF) is output. On the other hand, the data input terminal D of the D-type flip-flop circuit _DF2 is a NAND circuit.
G ₃ (see Figure 7) is connected to the output end of the
The same memory mode detection signal as the signal input to the input port I6 of the CPU 50 is input.
A clock pulse CK having a fundamental frequency of 32.768 KHz is input to the clock input terminal CK of this D-type flip-flop circuit _DF2 . The inverting output terminal of the D-type flip-flop circuit DF ₂ is connected to one input terminal of the NAND circuit G ₇₉ , and the other input terminal of the NAND circuit G ₇₉ is connected to the input port I.
A memory mode detection signal input to 6 is input. The D-type flip-flop circuit DF ₂ and the NAND circuit G ₇₉ form a well-known synchronous differential circuit, and from the moment the data input terminal of the flip-flop circuit DF ₂ becomes "H" level, it is synchronized with the clock pulse CK. NAND circuit with negative pulse
Occurs at the output end of G ₇₉ . Further, the data input terminal D of the D-type flip-flop circuit DF ₃ is connected to the collector of the transistor Q ₃₂ (see FIG. 11), and is configured to receive the release signal S0, and the clock input terminal detection signal CK A clock pulse CK is applied to. The inverting output terminal of this flip-flop circuit DF ₃ is a NAND circuit.
Connected to the other input end of G ₈₀ , NAND circuit G ₈₀
The release signal S0 is applied to the other input terminal of the flip-flop circuit _DF3 and the NAND circuit _G80.
forms a synchronous differentiator circuit like the circuits DF ₂ and G ₇₉ above. Furthermore, the data input terminal D of the D-type flip-flop circuit _DF4 is connected to the not circuit _G90 .
It is connected to the output end of the knot circuit _G101 through the gate, and the inverted signal of the trigger signal S1 is input thereto, and the clock pulse CK is applied to the clock input end CK. The inverting input terminal of this flip-flop circuit _DF4 is a NAND circuit.
Connected to one input end of G ₈₁ , NAND circuit G ₈₁
An inverted signal of the trigger signal S1 is applied to the other input terminal of the flip-flop circuit _DF4 and a NAND circuit _G81 .
Like DF ₂ and G ₇₉ , it forms a synchronous differential circuit. The above three synchronous differentiating circuits are the timer circuit 6
This is a circuit for resetting 8 when the memory mode is selected, when the shutter is released (actually when the power supply hold circuit 67 is energized), and when exposure is started (trigger A reset pulse is generated in each case (when the signal goes to "L" level). The timer circuit 68 needs to be instructed as to the reference point from which to start operating the timer.
This is done by resetting the timer circuit 68 using the reset pulse. NAND circuit that outputs the reset pulse
The output terminals of G ₇₉ , G ₈₀ and G ₈₁ are connected to each input terminal of the 3-input AND circuit G ₈₂ ,
The output terminal of _G82 is connected to each reset input terminal of T-type flip-flop circuits _TF0 to _TF26 through a knot circuit _G91 . Further, the output terminal of the AND circuit G ₈₂ is connected to each reset input terminal R of the RS flip-flop circuits RSF ₀ to RSF ₃ , RSF ₆ , RSF ₇ forming the selection circuit, and one of the output terminals of the OR circuit ₈₄ It is also connected to the input terminal.

The inverting output terminal ₃ of the T-type flip-flop circuit TF ₃ is connected to the set input terminal of the RS flip-flop circuit RSF ₀ , and from the output terminal Q,
As shown in Figure 18c, even after the trigger signal S1 is inverted to the "H" level, it remains "H" for 0.5ms.
A high-speed limiter signal _T0 that maintains the level and then inverts to the "L" level is output. Also, RS flip-flop circuit
The output terminal of a NAND circuit _G83 is connected to the set input terminal S of RSF ₃ , the output terminal _Q8 of a T-type flip-flop circuit TF8 is connected to one input terminal of the NAND circuit _G83 , and the output terminal _Q8 of a T-type flip-flop circuit TF8 is connected to the other input terminal of the NAND circuit G83. An output terminal _Q7 of a T-type flip-flop circuit _TF7 is connected to the input terminal of the T-type flip-flop circuit TF7. Therefore, as shown in FIG. 18d, the output terminal Q of the RS flip-flop circuit _RSF3 is output even after the trigger signal S1 is inverted to the "H" level.
Off-limiter signal T1 maintains “H” level for 24ms and then inverts to “L” level.
is now being output. Furthermore, at the set input terminal S of the RS flip-flop circuit _RSF2 ,
Inverting output terminal ₂₁ of T-type flip-flop circuit TF ₂₁
is connected to the output terminal Q, and as shown in FIG.
Thereafter, the autolimiter signal _T2 , which is inverted to the "L" level, is output. Furthermore, a T-type flip-flop circuit _TF8 is connected to the set input terminal S of the RS flip-flop circuit _RSF1 .
An inverted output terminal ₈ is connected to the output terminal Q, and a trigger signal S1 is connected to the output terminal Q, as shown in FIG. 18f.
remains “H” for 16ms even after it reverses to “H” level.
A strobe synchronization time signal T3 which maintains the level and then inverts to the "L" level is output. The inverting output terminal of this RS flip-flop circuit _RSF1 is connected to the data input terminal D of the D-type flip-flop circuit _DF5 , and is also connected to one input terminal of the NAND circuit _G89 . A clock pulse CK is applied to the clock input terminal CK of the D-type flip-flop circuit _DF5 , and the inverted output terminal of the circuit _DF5 is connected to the other input terminal of the NAND circuit _G89 . The output terminal of the NAND circuit _G89 is connected to the set input terminal S of the RS flip-flop circuit _RSF4 , and the RS
Reset input terminal R of flip-flop circuit _RSF4
is connected to the output terminal of the OR circuit _G84 . The other input terminal of the OR circuit _G84 is connected to the inverting output terminal ₁₅ of the T-type flip-flop circuit _TF15 . Therefore, the RS flip-flop circuit
From the inverted output terminal of RSF ₄ , as shown in Fig. 18g, the strobe synchronization time signal _T3 is inverted to "L" level and at the same time changes to "H" level, and after about 2 seconds, " A strobe current gate signal _T4 returning to the L'' level is output. Also, RS flip-flop circuit
The set input terminal S of RSF ₆ has a 3-input NAND circuit.
The output end of G ₈₅ is connected, and the NAND circuit G ₈₅
A T-type flip-flop circuit is connected to each input terminal of the
Each output terminal Q ₈ , Q ₆ and TF ₈ , TF ₆ and TF ₅
Q ₅ are connected respectively. Therefore, as shown in FIG. 18h, the inverting output terminal of the RS flip-flop circuit _RSF6 becomes "H" 22ms after the trigger signal S1 is inverted to "H" level.
A strobe under limiter signal T6 whose level is inverted is output. Furthermore, the set input terminal S of the RS flip-flop circuit RSF ₇ is connected to the inverting output terminal ₂₆ of the T-type flip-flop circuit TF ₂₆ , so that the output terminal Q is connected to the set input terminal S of the RS flip-flop circuit RSF 7. The memory limiter signal T7, which is inverted to the "L" level, is output approximately 70 minutes after the trigger signal S1 is inverted to the "H" level. Furthermore, from the output terminal _Q11 of the T-type flip-flop circuit _TF11 ,
The point reduction period signal _T8 , which is close to about 10 Hz, is output.

FIG. 17 shows a detailed electric circuit of the DA conversion circuit 58. This D-A conversion circuit 58
is a successive approximation type A-D together with a comparator A ₁₂ (see FIG. 7) forming the second comparison circuit 59.
A conversion circuit is configured to convert the brightness value signal S6 or the analog calculation value (SV-AV) of the film sensitivity value SV and the aperture value AV into a digital signal, and the CPU 5
It serves to input 0. This DA converter circuit 58 is a known 8-bit ladder type DA converter circuit, and includes 16 analog switches _AS0 to _AS7 ,
AS ₁₀ to AS ₁₇ , eight knot circuits G ₁₅₀ to _{G 157} ,
It consists of 16 resistors _R149 to _R157 , _R160 to _R166 , and an operational amplifier _A21 . Of the analog switches AS ₀ to AS ₇ and AS ₁₀ to AS ₁₇ above, half of the analog switches AS ₀ to _{AS 7} have a reference voltage at their input terminals.
Vr ₁ is applied to each of them, and a reference voltage Vr ₂ higher than the reference voltage Vr 1 is applied to the input ends _of the remaining fractional analog switches AS ₁₀ to AS ₁₇ , respectively. In addition, the analog switch AS ₀ ~
One control input of AS ₇ and analog switch
The other control input terminal of AS ₁₀ to _{AS 17} has a UPU50
Each bit signal b ₀ to b ₇ is applied from the output port O6 of the analog switch AS ₀ to
Other control input of AS ₇ and analog switch
Inverted signals of the respective bit signals _b0 to _b7 are applied to one control input terminal of _AS10 to _AS17 through knot circuits _G150 to _G157 , respectively. Furthermore, the output terminals of analog switches AS ₀ to AS ₇ and the output terminals of analog switches AS ₁₀ to _{AS 17} are connected in pairs, respectively, and resistors R ₁₅₀ to
Each is connected to one end of R ₁₅₇ . Resistance R ₁₅₀
The other end of ~R ₁₅₇ is a resistor R ₁₄₉ connected in series,
Connected to each connection point of R ₁₆₀ to R ₁₆₆ . That is,
The other end of resistor R ₁₅₀ is connected to the connection point of resistors R ₁₄₉ and R ₁₆₀ ,
The other end of resistor R ₁₅₁ is connected to the connection point of resistors R ₁₆₀ and R ₁₆₁ ,
The other end of resistor R ₁₅₂ is connected to the connection point of resistors R ₁₆₁ and R ₁₆₂ ,
The other end of resistor R ₁₅₃ is connected to the connection point of resistors R ₁₆₂ and R ₁₆₃ ,
The other end of resistor R ₁₅₄ is connected to the connection point of resistors R ₁₆₃ and R ₁₆₄ ,
The other end of resistor R ₁₅₅ is connected to the connection point of resistors R ₁₆₄ and R ₁₆₅ ,
The other end of resistor R ₁₅₆ is connected to the connection point of resistors R ₁₆₅ and R ₁₆₆ ,
The other end of the resistor R ₁₅₇ is connected to the connection point between the resistor R ₁₆₆ and the non-inverting input terminal of the Pope amplifier A ₂₁ . resistance
The reference voltage Vr ₁ is applied to one end of R ₁₄₉ , and the resistance values of each resistor R ₁₄₉ to R ₁₅₇ are the same as each resistor R ₁₆₀ to R 157.
It is set to be twice the resistance value of _R166 . The operational amplifier A ₂₁ has its inverting input terminal connected to its output terminal to form a voltage follower circuit, and its output terminal is connected to the comparator A ₁₂ (seventh
(see figure) is connected to the inverting input terminal of the

The CPU 5 is connected to the output terminal of the operational amplifier A ₂₁ which is the output terminal of the D-A conversion circuit 58 configured in this way.
Depending on the value of each bit signal output from 0, V _D ′ _A = Vr ₁ + Vr ₂ − Vr ₁ /2 (b ₇ 2 ⁰ + b ₆ 2 ^-1 + b ₅ 2 ^-2 + b ₄
2 ^-3 ＋b ₃ 2 ^-4 ＋b ₂ 2 ^-5 ＋b ₁ 2 ^-6 ＋b ₀ 2 ^-7 ) The output voltage V _DA is obtained. Furthermore, this D-A
The conversion circuit 58 is already known, and
Since this is not related to the purpose of the present invention, a detailed explanation of its operation will be omitted. Furthermore, regarding the operation of the successive approximation type A-D converter circuit formed by the combination of the D-A converter circuit 58 and the comparator A ₁₂ ,
This will be explained in detail in the explanation of the subsequent flowchart.

19A and 19B respectively show the electrode structure of the liquid crystal display board forming the photographic information display device 39, FIG. 19A shows the pattern of segment electrodes for display, and FIG. 19B shows the segment electrode structure for display. The patterns of the back electrode facing the electrode with the liquid crystal layer in between are shown. This photographic information display device 39 adopts a 1/3 duty/1/3 bias driving method, as will be described in detail later, and the above-mentioned back electrode is connected to the first to third back electrodes.
It is divided into RE ₁ to RE ₃ . Further, the segment electrodes corresponding to the first to third back electrodes RE ₁ to _{RE 3} are connected as a set of three at most by one signal line, and as shown in FIG.
Each segment electrode connected by the same signal line corresponds only to different back electrodes RE ₁ to _{RE 3} . Therefore, the segment electrodes include a first segment electrode group corresponding to the first back electrode RE ₁ , a second segment electrode group corresponding to the second back electrode RE ₂ , and a third segment electrode group corresponding to the second back electrode RE ₃ . and a second segment electrode group corresponding to the second segment electrode group. The segment electrodes included in the first segment electrode group include horizontally long rectangular point display segment electrodes ("OVER" electrodes, "LONG"
(including those formed above the electrodes), and "±" electrodes for correction indication. Further, the segment electrodes included in the second segment electrode group include horizontally long rectangular bar display segment electrodes arranged in a line in a horizontal direction in the middle;
There are “OVER” electrodes, “LONG” electrodes, “MEMO” electrodes, and “SPOT” electrodes. Furthermore, the third segment electrode group includes shutter time electrodes of "1" to "2000", fixed point match indicator electrodes formed in circular and triangular shapes below the shutter time electrodes, and this fixed point match indicator electrode. Overexposure when shooting with strobe lights installed at the corresponding positions on the left and right sides of
"-" and "+" electrodes for underexposure display,
and “MANUAL”, “AUTO”, “HIGH”,
These are electrodes for displaying each mode of “SHDW”. A total of 39 signal lines connecting one to three segment electrodes are provided, and each signal line connects to a MOS field effect transistor _Q106 , which is the output end of a level conversion circuit (see Fig. 23), which will be described later. _Q107
is connected to the connection point of segment drive signal J0~
J38 is applied. On the other hand, the first to third back electrodes RE ₁ to _{RE 3} are connected to MOS field effect transistors Q ₁₀₀ , Q ₁₀₁ , which are output ends of a common signal output circuit (see FIG. 24), which will be described later.
They are connected to the connection points of Q ₁₀₂ , Q ₁₀₃ and Q ₁₀₄ , Q ₁₀₅ , respectively, and are applied with common signals H0 to H2. There is no signal line connected to "〓", but this mark is not displayed on the liquid crystal display, but is displayed by the light emitting diode D ₁ (see Figure 14) for indicating the completion of charging of the strobe. Therefore, there is no need to connect signal lines for liquid crystal display. Further, the segment electrodes, signal lines, and back electrodes RE ₁ to RE ₃ are made of transparent electrodes, and the photographic information display device 39 is formed in a light-transmitting type. Furthermore, hereinafter, the segment electrode or the display area of the liquid crystal that is colored corresponding to the segment electrode will be simply referred to as a segment.

FIG. 21 shows a detailed electrical circuit diagram of the liquid crystal drive circuit 61. This liquid crystal drive circuit 61
is a circuit that drives the liquid crystal display panel forming the photographic information display device 39 to produce color. JK flip-flop circuits JKF ₀ and JKF ₁ are such that the output terminal Q of the circuit JKF ₀ is connected to the input terminal J of the circuit JKF ₁ , the inverting output terminal of the circuit JKF ₁ is connected to the input terminal J of the circuit JKF ₀ , and the input terminal The power supply voltage Vcc is applied to K, and the clock pulse is applied to the clock input terminal T.
CK is applied to each circuit to form a known synchronous ternary counter, and each circuit JKF ₀ , JKF ₁
The outputs A0 and A1 are as shown in FIGS. 25b and 25c, respectively. Further, the JK flip-flop circuit JKF ₂ has an input terminal J connected to the output terminal Q of the above-mentioned JK flip-flop circuit JKF ₁ , and an input terminal K connected to the output terminal Q of the above-mentioned circuit JKF ₁ via a knot circuit G ₁₉₉ .
The clock pulse CK is applied to the clock input terminal T to form a D-type flip-flop circuit. This D-type flip-flop circuit delays the output A1 of the JK flip-flop circuit _JKF1 by one period of the clock pulse CK, and its output A2 is as shown in FIG. 25d. Furthermore, JK flip-flop circuit
In JKF ₃ , the power supply voltage Vcc is applied to the input terminals J and K, and the clock input terminal T is connected to the output terminal Q of the JK flip-flop circuit JKF ₂ .
It forms a binary counter, and its output A3
As shown in FIG. 25e, the output A2 of the circuit JKF ₂ is divided into 1/2.

The display RAM (DRAM) 85 is a memory that is directly accessed by the CPU 50 through an address bus and a data bus.
There is a one-to-one correspondence between each memory area and the display segment of the photographing information display device 39. Since the photographing information display device 39 is configured with 102 display segments, 102 memory areas SEG ₀ to SEG ₁₀₁ are secured in the DRAM 85, and these memory areas SEG ₀ to SEG 101 are secured in the DRAM 85.
The contents of SEG ₁₀₁ are outputted to signal synthesis circuit 100 from 102 output terminals.

The signal synthesis circuit 100 outputs 102 signals outputted from the output end of the DRAM 85 to 39 lines by time division in order to drive the photographic information display device 39 at 1/3 duty and 1/3 bias. Signal K
This is a circuit for outputting as 0 to K38. 1/
By adopting a driving method with 3 duty and 1/3 bias, the number of connection lines between the photographing information display device 39 and the liquid crystal drive circuit 61 is reduced.
As a part of the signal synthesis circuit 100 is shown in FIG. 22, in principle, one unit is four NAND circuits and one exclusive OR circuit, and a plurality of these circuits are provided. There is.
For example, one input terminal of the NAND circuit G ₂₀₀ is applied with the output A2 of the JK flip-flop circuit JKF ₂ , and the other input terminal is applied with a signal corresponding to the contents of the memory area SEG ₀ from the DRAM 85. There is. Furthermore, the output A1 of the JK flip-flop circuit JKF ₁ is applied to one input terminal of the NAND circuit G ₂₀₁ , and the other input terminal is
A signal corresponding to the contents of memory area SEG ₁ is applied from DRAM 85. Furthermore, the NAND circuit
The output A0 of the above JK flip-flop circuit JKF ₀ is applied to one input terminal of G ₂₀₂ , and the other input terminal is connected to the DRAM 85 or memory area SEG _2.
A signal corresponding to the content of is applied. The output end of each NAND circuit G ₂₀₀ , G ₂₀₁ , G ₂₀₂ is connected to each input end of a 3-input NAND circuit G ₂₀₉ , and the output end of the NAND circuit G ₂₀₉ is connected to one side of the exclusive OR circuit G ₂₁₂ . Connected to the input end. The other input terminal of the exclusive OR circuit G ₂₁₂ is connected to the output A of the JK flip-flop circuit JKF ₃ .
3 is applied, exclusive OR circuit
A signal K0 is output from the output input terminal of _G212 . This signal K0 is a signal that time-divides the signal output from the output end of the DRAM 85 into 1/3, as shown in FIG. 25i, for example. Similarly, NAND circuits G ₂₀₃ to _{G 205} , 3-input NAND circuit G ₂₁₀ and exclusive OR circuit
G ₂₁₃ allows DRAM85 memory area SEG ₃
~The signal corresponding to the contents of SEG ₅ is time-divided into 1/3 and output as signal K1, and the NAND circuit G ₂₀₆ ~
G ₂₀₈ , 3-input NAND circuit G ₂₁₁ and exclusive OR circuit G ₂₁₄ generate signals corresponding to the contents of memory areas SEG ₆ to _{SEG 8} of DRAM 85.
The signal is time-divided into ⅓ and output as a signal K2.
In this way, the signals corresponding to the contents of the 102 memory areas SEG ₀ to SEG ₁₀₁ of the DRAM 85 are
A total of 39 signals K0 to K38 are output. The signals K0 to K38 are converted into segment drive signals J0 to J38, respectively, through the level conversion circuit shown in FIG. FIG. 25j shows the waveform of signal J0 as an example of the segment drive signal. The above level conversion circuit is a knot circuit G ₂₂₅ ,
P-channel MOS field effect transistor
It consists of Q ₁₀₆ and an n-channel MOS field effect transistor Q ₁₀₇ . Knott Circuit G ₂₂₅
The above-mentioned signal Kn (n=0 to 38) is applied to the input terminal of the circuit _G225 , and the output terminal of the knot circuit G225 is connected to the gates of the transistors _Q106 and _Q107 , respectively. The source of transistor Q ₁₀₆ is a constant voltage
V ₀ 1 is applied, and the source of the transistor Q ₁₀₇ is at a constant potential of −V 0 . Also, the drains of transistors Q ₁₀₆ and Q ₁₀₇ are connected to each other,
From this connection point, the segment drive signal Jn (n=
0 to 38) are extracted. Such a level conversion circuit converts the segment drive signal J0
It goes without saying that there are as many as J38, that is, 39.

FIG. 24 shows a common signal output circuit in the liquid crystal drive circuit 61. This common signal output circuit consists of NAND circuits G ₂₁₅ , G ₂₂₂ to _{G 224} , NAND circuits G ₂₁₆ to G ₂₂₁ , P-channel MOS field effect transistors Q ₁₀₀ , Q ₁₀₂ , Q ₁₀₄ , and N-channel MOS field effect transistors Q 100 , Q 102 , Q 104 . effect transistor Q ₁₀₁ ,
It consists of Q ₁₀₃ , Q ₁₀₅ and resistors R ₂₀₀ to _{R 202} . The output A3 of the JK flip-flop circuit JKF ₃ is applied to one input terminal of the NAND circuit G ₂₁₆ , and the output A0 of the JK flip-flop circuit JKF ₀ is applied to the other input terminal. And the output end of NAND circuit G ₂₁₆ is P channel
Connected to the gate of a MOS field effect transistor _Q100 . In addition, one input terminal of the NAND circuit G ₂₁₇ is connected to the above output A through the NAND circuit G ₂₁₅ .
3 is applied, and the output A0 is applied to the other input terminal. The output terminal of the NAND circuit G ₂₁₇ is connected to an n-channel MCS type field effect transistor through the NAND circuit G ₂₂₂ .
Connected to the gate of Q ₁₀₁ . A constant voltage of +2V ₀ is applied to the source of the transistor Q ₁₀₀ , and a constant voltage of -2V ₀ is applied to the source of the transistor Q ₁₀₁ . And the transistor
The drains of Q ₁₀₀ and Q ₁₀₁ are connected to each other,
This connection point is grounded through a resistor R ₂₀₀ . The first common signal H0 is a transistor
It is designed to be taken out from the connection point of the drains of Q ₁₀₀ and Q ₁₀₁ . Also, in the same way as Matsutaku,
The circuit that outputs the second common signal H1 is composed of NAND circuits G ₂₁₈ and G ₂₁₉ , the knot circuit G ₂₂₃ , transistors Q ₁₀₂ and Q ₁₀₃ , and resistor R ₂₀₁ , and the circuit that outputs the third common signal H2 is , Nando circuit
G ₂₂₀ , G ₂₂₁ , knot circuit G ₂₂₄ , transistor
It consists of Q ₁₀₄ , Q ₁₀₅ and resistor R ₂₀₂ . The waveforms of the first to third common signals H0 to H2 are as shown in FIG. 25 f to h.

Next, the operation of the liquid crystal drive circuit 61 is explained in FIG.
This will be explained with reference to the time charts of ~m.
As an example, segments SEG ₀ , SEG ₁ , SEG ₂ (hereinafter referred to as DRAM85 memory air storage SEG ₀ to _{SEG 101)}
The display segment corresponding to is indicated by the same reference numeral as that of the memory area. ), we will explain the operation when segments SEG ₀ and SEG ₂ are colored and segment SEG ₁ is not colored. Since the segments SEG ₀ and SEG ₂ are now colored, the contents of the corresponding memory areas of the DRAM 85 are "1". On the other hand, the content of the memory area corresponding to segment SEG ₁ is "0".
Outputs A2, A1, A0 are stored in memory areas SEG ₀ ,
It serves as a gate signal for sequentially outputting signals corresponding to the contents of SEG ₁ and SEG ₂ to the output end of the NAND circuit G ₂₀₉ (see FIGS. 25b, c, and d). The output of NAND circuit G ₂₀₉ is output A3 (see Figure 25 e)
is exclusive-ORed and output as a signal K0 from the output terminal of the circuit _G212 (see FIG. 25j). Signal 0 is the common signal H0 to H2 (25th
(see Figures f, g, h) is at "H" level, if the output of NAND circuit G ₂₀₉ is "H" level, it becomes "L" level, and the output of NAND circuit G ₂₀₉ is "L" level. If the level is high, it becomes the "H" level.
Furthermore, during the period in which any of the common signals H0 to H2 is at the "L" level, the signal K0 becomes the "H" level if the output of the NAND circuit G ₂₀₉ is at the " _H "level; If it is at "L" level, it becomes "L" level. This creates a Nando circuit
When the output of G ₂₀₉ is at the "H" level, the potential difference between the segment drive signal J0 and the common signals H0 to H2, which will be described later, becomes _3V0 , so that the liquid crystal corresponding to the segment develops color. Further, if the output of the NAND circuit _G209 is at the "L" level, the potential difference between the segment drive signal J0 and the common signals H0 to H2 becomes _V0 , so that the liquid crystal corresponding to the segment does not develop color. Now, the contents of the memory area of DRAM85 corresponding to segments SEG ₀ and SEG ₂ are “1”.
Since the content of the memory area of DRAM 85 corresponding to segment SEG ₁ is "0", the signal K
The waveform of 0 is as shown in FIG. 25i. Therefore, the segment drive signal J0 after level conversion is
The result is as shown in FIG. 25j. Therefore, the potential difference H0 between the common signal H0 and the segment drive signal J0
~J0 becomes as shown in FIG. 25k, and segment SEG ₀ develops color at 1/3 duty. Further, the potential difference H1 to J0 between the common signal H1 and the segment drive signal J0 is always V ₀ as shown in FIG. 25l, and the segment SEG ₁ does not develop color. Further, the potential difference H2 to J0 between the common signal H2 and the segment drive signal J0 becomes as shown in FIG. 25m, and the segment SEG ₂ develops color at 1/3 duty. Other segment SEG ₃ ~
The whitening of SEG ₁₀₁ is controlled in exactly the same manner. Note that even if the segments are colored at 1/3 duty as described above, it goes without saying that to the human eye, the colors appear to be colored continuously.
Further, the subscripts of the memory areas SEG ₀ to _{SEG 101} are added for explanation, and are not directly related to the addresses in the memory areas SEG ₀ to SEG ₁₀₁ .

Here, the correspondence between the display segments and the addresses of the memory area of the DRAM 85 will be briefly explained. As a general rule, point display data directly specifies the address of the memory area of the DRAM 85. For example, the leftmost segment (high-speed seconds indicator) of the segment row for point display is
Assume that it corresponds to address 0 of the memory area of DRAM85. Each time a segment is moved to the right one by one, the address of the memory area corresponding to that segment increases by one address.
Now, assuming that the point display data is "4", by storing "1" in address 4 of the memory area of the DRAM 85, the fifth segment from the leftmost end of the point display segment string will be displayed in color. become. This address is specified by
The camera 10 of the present invention can be set arbitrarily.
Now, as you can see from the program described below, in the point display segment string, the leftmost segment corresponding to the upper part of the "OVER" segment is placed in the memory area at address C41, and the rightmost segment corresponding to the upper part of the "LONG" segment is placed in the memory area. Segment C40 (=C41
+35) is specified as the address. In addition, in the program described later, the point display data and bar display data are calculated using the same calculation formula.
If you display the address as it is specified, it will be duplicated. In the case of bar display, this problem is solved by adding a certain constant to the display data and shifting the address specification of the memory area of DRAM 85, but in the program, the addition of the constant is not specified explicitly. Ta.

FIG. 26 is a graph showing a method of counting shutter seconds when performing memory photography. In reality, this is done by software inside the CPU 50, and will be explained in detail later.
First, I will briefly explain the overview. Memory mode counts the actual exposure time taken using direct metering and controls exposure based on this. However, since the exposure amount is memorized, the aperture or film sensitivity cannot be changed during memory mode shooting. In this case, it is necessary to change the stored value accordingly so that the exposure amount remains constant. In this case, the aperture value and film sensitivity value are
In the camera 10 of the present invention, the information is logarithmically compressed with an accuracy of Least Significant Bit (LSB) 1/12Ev, so the actual exposure time is also converted to the aperture value and film sensitivity value to the same series of numerical values. There is a need to. The method for this is (1) After counting the actual exposure time using pulses of the same period,
How to convert to LSB1/12Ev Tv value with CPU50,
(2) Two methods: change the pulse period of the clock, which is the reference for counting, over time so that the counted value itself becomes a value equivalent to the time value of LSB1/12Ev (hereinafter referred to as Tv value). is possible. The camera 10 of the present invention employs the latter method.
In order to precisely change the actual exposure time to the Tv value, a large number of clock frequency controls are required. For this reason, the camera 10 of the present invention is controlled so that the clock cycle also doubles every time the exposure time doubles. FIG. 26 shows an ideal curve A for converting actual exposure time to Tv value and the camera 10 of the present invention.
According to the method adopted by the camera 10 of the present invention, the error from the ideal curve A is only about 0.08 Ev at most, including the quantization error. However, the camera can demonstrate sufficient accuracy.

The digital exposure information introduction circuit 60 shown in FIG. 5 is a circuit that inputs the manual shutter time and correction value CV into the CPU 50 as digital quantities, but it can be easily implemented using already well-known circuit means. Therefore, detailed explanation and illustrations will be omitted. In addition, the reference voltage circuit 6
Similarly, detailed explanation and illustration of 9 will be omitted.

The camera 10 of the present invention is configured as described above.

Next, before entering into a description of the operation of this camera 10, the photographing mode of the camera 10 of the present invention will be briefly outlined. First, the shooting modes of the camera 10 are auto mode and manual mode.
There are three basic shooting modes: off mode and off mode. The auto mode is a so-called automatic exposure shooting mode that automatically determines the shutter speed by metering the brightness of the subject, and can be selected by making the shooting mode switching operation knob 21 correspond to the "AUTO" index. be done. This auto mode is further divided into average direct auto mode, spot auto mode, and strobe auto mode.
Average direct auto mode is a shooting mode that automatically closes the shutter when the correct exposure is achieved by averaging the subject light reflected from the film surface and shutter curtain surface during exposure. The above memory command operation knob 13
The memory mode can be selected by making the index correspond to the "MEMORY" index.
When this memory mode is selected, the shutter speed at the time of shooting the first frame after selection is stored in the camera 10, and from then on the memory command operation knob 13
Unless the memory mode is cleared by making the index correspond to the ``CLEAR'' index, all frames will be shot at the same exposure level. In addition, the above-mentioned spot auto mode is a shooting mode in which spot photometry is performed on multiple subject parts before shooting, and the shutter is automatically operated to obtain the appropriate exposure using the average value of the brightness values of each subject part. By pressing the spot input button 14 in the auto mode, the spot auto mode is selected and at the same time the spot photometric value is input and stored. Note that the spot photometric value is the photometric value of the subject area reflected on a spot photometric indicator (not shown) provided in the viewfinder to optically correspond to the photovoltaic element PD ₂ for partial photometry. is input. In this spot mode, by pressing the highlight command button 15 or the shadow command button 16, it is possible to further select the highlight mode or the shadow mode. In highlight mode, the shutter speed is determined and exposure is controlled so that the exposure is lowered by 21/3 Ev from the maximum brightness spot photometer value among multiple spot photometer values. It will be done. In the case of the shadow mode, photography is performed with the shutter speed determined such that the exposure is higher by 21/3 Ev than the minimum luminance spot photometric value among the plurality of spot photometric values. Furthermore, the strobe auto mode is selected when a strobe is attached to the strobe mounting shoe 24 or connected to the connection connector 25 in the auto mode, and the strobe is turned on. mode and the shutter is strobe synchronized to 1/60
It is activated in seconds, and the flash automatically adjusts at the correct exposure.

The manual mode is a shooting mode in which the shutter is operated at the shutter speed set by the manual shutter speed setting ring 7, and the shooting mode switching operation knob 21 is set to correspond to the "MANUAL" index. selected by This manual mode is divided into a normal manual mode, a spot manual mode, and a strobe manual mode. but,
These three modes differ only in the manner of display on the photographic information display device 39, but are the same in that the shutter is operated at the manual shutter speed. Note that memory mode cannot be selected in manual mode, and highlight mode and shutter mode can be selected in spot manual mode.

The above-mentioned OFF mode is a shooting mode that is selected by making the shooting mode switching operation knob 21 correspond to the "OFF" index, and the subject light is measured using average direct metering, and the shutter speed is set to 1/4 second or higher. If it is shorter, the shutter will close at that shutter time, and if it is longer than 1/4 second, the shutter will be forcibly closed at 1/4 second.

Next, the operation of the camera 10 and the flow of the program in the CPU 50 will be outlined with reference to the flowchart in FIG. First, when the camera 10 is powered on, the CPU 50 and the interface are reset to the initial state, and then a branch is made to a predetermined program depending on the shooting mode of the camera 10. First, camera 10
is in direct auto mode, the judgment as to whether it is auto or not is YES (hereinafter, on the flowchart, the branching direction of YES is indicated by Y).
Then, the determination as to whether the strobe power is on or not is NO (hereinafter, the branching direction of NO is indicated by N in the flowchart), and the determination as to whether or not the spot mode is in the spot mode is NO, respectively. Enter the program for direct auto mode. It is assumed that the memory mode is not currently selected. In this program, it is first determined whether or not the mode has just been changed. If the mode has just been changed, the display in the finder, the interface, and the internal register of the CPU 50 are reset. Next, the average brightness value (hereinafter, the brightness value will be referred to as the Bv value) by open metering, (film sensitivity value -
aperture value) (hereinafter referred to as Sv-Av value)
and a correction value (hereinafter referred to as Cv value) are input in sequence, and thereafter it is determined whether or not memory hold is being performed. Memory mold refers to a state in which the actual exposure time has already been memorized using direct metering, and is different from the memory set state, which is the same memory mode but in which the memory mode is simply selected and the actual exposure time is not memorized. be done. If it is in the memory hold state, the average Bv value etc. used to calculate the Tv value is changed to the one already held, and then the Tv value is calculated. When the calculation of the Tv value is completed, this Tv value is displayed as a bar (see Fig. 45). Then, it is determined whether or not the shutter has been released. If the shutter has not been released, the process returns to the beginning of the flowchart through - and repeats the loop until the shutter is released. Therefore, the latest appropriate shutter speed (Tv value) is always displayed as a bar on the photographing information display device 39.
When the shutter is released, a loop is made to determine whether the trigger is open or not, and the camera waits until the exposure starts. When the trigger is opened, unless it is in memory mode, the shutter is released when the integral output from direct metering reaches a predetermined level. closes to end the exposure. Furthermore, if the mode is memory mode and not memory hold, the actual exposure time is counted at the same time. Furthermore, if it is in memory mode and memory hold is selected, the data has already been memorized.
The shutter speed is controlled based on the Tv value.
After the exposure is completed, the process returns to the beginning of the flowchart through -, and the display for the next photograph is repeated.

In addition, if the camera 10 is in spot auto mode, the determination as to whether or not it is in auto mode is YES, the determination as to whether the strobe power is on is NO, and the determination as to whether or not it is in spot mode is determined as YES. Exit each judgment with a yes and enter the program for spot auto mode. In this program, it is first determined whether or not there is a spot input, but since there is always a spot input when the spot mode is selected, first enter a program with spot input in the spot auto mode, and then , a judgment is made as to whether or not the mode has just been switched. If the mode has just been switched, the display in the viewfinder, the interface, and the CPU 50
The internal registers are reset. Next, the spot Bv value and Sv-Av value obtained by open metering are input in sequence, and after calculating the Tv value, this value is
The Tv value is stored and displayed in points (see Figure 48). Next, it is determined whether it is highlight mode or shadow mode, and if it is not in these modes, the Cv value is input, correction is taken into account, the simple average of the Tv value is calculated, and this is bar (see Figure 50). Here, in the point display of Tv value, Cv value is not added, but in bar display, this is taken into account.
This is because the point display basically displays the subject brightness, but in reality it displays the appropriate level of Tv value conversion based on the subject brightness at the time of spot input.On the other hand, the bar display displays the actual exposure time level. This is because this is displayed after taking into account the correction. After the bar of the average value is displayed, a determination is made as to whether or not the release has been performed. If the release has not been performed, the process returns to the mode determination program via - and again begins determining whether or not there is a spot input. In the second loop after spot input, the spot input state has been canceled in the first loop, so the program enters a program without spot input. Here, first, the Sv-Av value is input, the Tv value is calculated based on the plurality of stored spot Bv values, and the point display of each Tv value is changed. That is, since the storage by the spot input operation is at least the storage of the exposure amount, the input points are changed so that the exposure amount remains constant. Next, it is determined whether the mode is highlight mode or shadow mode, and after entering the Cv value that must be in these modes,
A simple average of the Tv values is calculated with correction taken into account, and this average value is displayed as a bar (see Figure 50). continue,
Input the spot Bv value currently being metered, convert this Bv value to a Tv value that gives a correct exposure, and display the point. This point display is performed by point subtraction display, and is distinguished from the Tv value based on the Bv value that has already been input. Next, it is determined whether or not it is a memory hold, and if it is a memory hold, it is judged whether or not it is a release, and if not, it is determined whether or not it is a highlight mode or not, and whether it is a shadow mode or not. enter into the judgment. If the mode is neither highlight mode nor shadow mode, the determination as to whether or not it is release mode is skipped.

Next, we will discuss the case where the spot auto mode is in the highlight mode or the shadow mode. Now, spot input operation is performed and Tv
Suppose that the point display of the value has finished. Next, if the mode is the highlight mode or the shadow mode, the bar display is not changed, and the program branches again to the mode discrimination program based on the determination of the shutter release. Then, when it comes to determining spot input again,
Now enter the program without spot input,
The point display is shifted so that the exposure amount is constant, and then a highlight mode or shadow mode is determined. now,
Since the mode is highlight mode or shadow mode, the bar display is not shifted, and after point display of the current photometric value is performed, if the mode is not memory hold, it is then determined whether or not the mode is highlight mode. If it is in highlight mode, it will exceed the highest brightness value of the multiple brightness values stored by the spot input operation by 21/3Ev.
Display the Tv value as a bar (see Figure 52). When displaying this bar, in order for the photographer to clearly know based on which metering point the 21/3Ev over is a trap, the tip of the bar display is set at the Tv corresponding to the highest brightness value. Extends to the value (51st
(See figure 52), and then stops over 21/3Ev from that point (see Figure 52). On the other hand, if
In the shadow mode, the Tv value that is 22/3 Ev below the lowest luminance value among the plurality of luminance values stored by the spot input operation is displayed as a bar (see FIG. 56). Even in this case, the tip of the bar display once returns to the Tv value corresponding to the lowest luminance value (see FIG. 55), and then stops at 22/3 Ev below from that point (see FIG. 56).

Then, in spot auto mode, when the shutter is released, it loops to determine whether the trigger has opened or not and waits until the exposure starts, and when the trigger opens, the bar set on the timer counter Exposure time is measured based on exposure time information corresponding to display information. Then, when the value of this timer counter reaches a predetermined value,
The shutter closes and the exposure ends. After this,
- to return to the mode discrimination program again.

Next, the case where the direct auto mode is set and the memory mode is set will be explained. Assume that there is no memory hold.
Then, the judgment is YES if it is in auto mode, the judgment is NO if the strobe power is on, the judgment is NO if it is direct auto and memory hold, and the judgment is if it is in spot mode. Exit each with NO and enter the direct auto mode program. Before the release, the Tv value bar is displayed in exactly the same way as in the normal direct auto mode (see FIG. 57). When the shutter is released, after waiting until the trigger opens, the memory hold judgment is passed to NO, and at the same time the actual exposure time in direct auto mode is counted.
Make changes to the apex value. After this, when the exposure is completed, the program branches again to the mode determination program. Here, if the memory mode is not released, the memory hold state is automatically entered.
In addition, when the memory hold state is entered, the bar display and the "MRMO" display are displayed in decreasing numbers at a low speed (see FIG. 58). This proactively indicates to the photographer that the camera is in the memory mode shooting state, thereby reducing the risk of shooting in a different mode. Next, if the judgment that the mode is direct auto mode and the memory hold state is YES, the process enters the step of inputting the Sv-Av value and the Cv value without inputting a new average Bv value. Here, the reason why you do not input a new average Bv value is that the memory hold is for storing the exposure amount, so the Bv value has already been input and stored.
This is because only information on the Sv-Av value and Cv value needs to be input. After inputting the Cv value, it is determined whether or not it is memory hold. Since memory hold is currently being performed, the current Sv-Av value and Cv are calculated from the Sv-Av value and Cv value at the time of memory hold by direct photometry. When the value changes, the bar display is changed accordingly.
This is because the memory hold does not store the exposure time, but the amount of exposure.
Next, when the shutter is released, since it is a memory hold, exposure control is performed based on memory shooting information using a timer counter set to a value corresponding to the bar display information. In other words, photography is performed at the same level of exposure as the direct metering photography before memory hold.
Note that the bar display will shift depending on the Cv value, so
Exposure can be corrected, and strictly speaking it cannot be called exposure memory, but if the bar display does not change in the viewfinder display or actual exposure when correction is applied, it may be mistaken as a malfunction of the camera 10. Because of this, we have made it possible to make corrections even in memory mode.

Next, we will discuss memory photography in spot auto mode. In this case, the spot input operation is disabled and the program branches directly to the flow without spot input in spot auto mode. Furthermore, bar display of highlight-based Tv values and bar display of shadow-based Tv values are not performed. The rest of the program flow is almost the same as that described for the spot auto mode above. In this memory hold state in spot mode, the "MRMO" display, input point display, and bar display flash at a slow speed, and the point display of the current metering value flashes at a faster normal speed. Note that exposure control is performed solely based on bar display data.

Next, strobe photography in auto mode will be explained. When you turn on the flash in auto mode, exposure is automatically controlled using direct metering. First, the program determines whether or not it is in auto mode with a yes, and exits with a yes in determining whether or not the strobe power is on, and enters the flow for the strobe auto mode. First, it is determined whether or not the mode has just been switched. If it is, the average Bv value, Sv
−Av value and Cv value are each input. Next, the Tv value is apex-calculated from the average Bv value, Sv-Av value, and Cv value. Here, the display in the viewfinder during strobe photography includes the strobe synchronization time "60" and a fixed point index (see FIG. 68). That is, the deviation from the exposure level of shutter speed 1/60 second is displayed in points. Next, it is determined whether the strobe photography is overexposed or underexposed, and whether overexposed, underexposed, or appropriate is displayed. This display is carried out for only 2 seconds after the strobe light is emitted, and if the exposure is overexposed, the "±" mark will blink, and if the exposure is underexposure, the "-" mark will blink (see FIGS. 70 and 71).
If neither of these is the case, it means that the exposure is appropriate, and the fixed point indicator "▲" blinks (see Figure 73). In addition, during normal operation other than 2 seconds after the strobe light is emitted, the fixed point indicator "▲" is simply displayed continuously.
Next, it determines whether the release is released or not, and if it is not released, it returns to the mode determination program again, and if it is released, it loops with the trigger open determination and waits until exposure starts. . Then, when the trigger opens, integration by direct photometry starts, and when the shutter is fully open, the strobe is fired. Exposure control and strobe control using direct photometry are performed using hardware as described above.

In the mode determination program, if it is not auto mode, it is next determined whether it is manual mode or not, and if it is not manual mode, it is off mode, so the off mode flow branch to. In the off mode, all displays in the viewfinder are erased to prevent power consumption, and the mode is returned to the mode determination program through -. When the shutter is released, exposure control is performed by direct photometry within a limited range of maximum exposure time, as described above. This exposure control
This is done not by the CPU 50 program but by hardware.

Next, if the manual mode has been selected, it is then determined whether or not the strobe is powered on. If the strobe is not currently powered on, it is next determined whether or not it is in the spot mode, and if it is not in the spot mode, the program branches to the normal manual mode flow. Here, first, a determination is made as to whether or not the mode has just been switched, and if it is immediately after,
Initial settings for variables and display are performed.
Next, input the manual data corresponding to the manual setting seconds and display the manual shutter seconds. FIG. 61 shows a state in which the shutter time is set to 1/60 second. Next, the average Bv value, Sv-Av value, and Cv value are each input in sequence, and the amount of deviation from the standard exposure level (hereinafter referred to as deviation) from the above manual data, average Bv value, Sv-Av value, and Cv value.
is calculated and displayed as a bar (Fig. 61).
Next, it is determined whether the release has been performed or not.
If the shutter release has not been released, the program returns to mode determination, and if the shutter release has been released, the trigger waits in a loop for determining whether the trigger is open or not until exposure starts.
Then, when the trigger is opened, based on the manual data set in the timer counter,
The exposure time is counted, and when the value of the timer counter reaches a predetermined value, the exposure is ended and the program branches again to the mode determination program.

If the spot mode is selected in the spot mode determination described above, it is the spot manual mode, so the flow branches to the spot manual mode. Here, it is first determined whether or not a spot input operation has been performed, but since spot inputs are always performed at the same time in the first program flow after selecting the spot mode, the next step is to determine whether or not the spot input operation has been performed immediately after the mode is switched. A determination is made. Immediately after mode switching, variables, displays, and interfaces are reset. Next, manual data corresponding to the manual setting seconds are inputted, and the manual shutter seconds are displayed (see the display of "125" in FIG. 63). Next, the spot Bv value and Sv-Av value are input in sequence, and the deviation from the standard exposure level is calculated and stored from the above manual data, Bv value, and Sv-Av value, and this is displayed as a point (point display). (See Figure 63). Next, it is determined whether the mode is highlight mode or shadow mode, and if it is either mode, it is immediately determined whether or not to release the camera.
If you are not in either mode, enter the Cv value and
The deviation of the simple average value of the stored spot input values from the standard exposure level is calculated and displayed as a bar (see FIG. 63). Next, it is determined whether or not the camera is released. If it has not been released, the process returns to the mode determination program.
When the spot input determination is reached again, unless the spot mode is canceled during this time, the flow branches to the next flow without spot input. Here, first, input the manual data and display the manual shutter seconds. Next, after entering the Sv−Av value, Sv−Av
The point display is changed so that the exposure amount remains constant according to the amount of change in the value. Next, it is determined whether the mode is highlight mode or shadow mode, and if it is not either, after inputting the Cv value, the exposure amount becomes constant according to the amount of change in Sv-Av value and Cv value. Change the bar display as shown below.
Here, the Cv value is not taken into account in the point display,
The Cv value is taken into consideration in the bar display. this is,
As mentioned in the explanation of auto mode,
Point display is basically a display of subject brightness, but in reality it displays the deviation from the standard exposure level based on the subject brightness at the time of spot input. On the other hand, since the bar display is an indicator of the actual exposure level, the Cv value is taken into account. Next, after inputting the spot Bv value, the deviation from the standard exposure level between this Bv value and the Sv-Av value is displayed in points. Since this display is a display of the current photometry point, the display is blinking to distinguish it from the already input point (see FIG. 63). Even in highlight mode,
If it is not the shadow mode, then a judgment is made as to whether or not the camera is released, and if it is not released, the process returns to the mode determination program again. FIG. 64 shows a state in which the deviation of the simple average value of input points is displayed as a bar, and FIG. 65 shows a state in which correction is input.

Next, a case will be described in which the highlight mode or shadow mode is selected in the spot manual mode. At present, the spot mode is selected, but when no spot input operation is performed, the point display for spot input is changed as described above, and then it is determined whether the mode is the highlight mode or the shadow mode. now,
If it is in highlight mode, the bar display cannot be changed for the simple average of the spot input values, and as described above, after the current metering point is displayed blinking, it is determined whether or not it is in highlight mode. Let's do it. Since we are currently in highlight mode, a bar is displayed that is 21/3Ev minus the maximum brightness value of the multi-point input point. (See Figure 66). In this case, in order to inform the photographer which spot input point is the 21/3 Ev minus is a trap, the tip of the bar display will temporarily extend to the maximum brightness value, and then the multi-point input Change the bar display to 21/3Ev minus side from the maximum brightness value of the point. Next, it is determined whether or not the camera has been released, and if the camera has not been released, the program branches again to the mode determination program.

Next, a case where the shadow mode is selected will be described. The blinking display of the current metering point is the same as in highlight mode, so
I will explain the program after that. now,
Since it is in the shadow mode, a bar is displayed that is 22/3 Ev more than the lowest luminance value of the multi-point input point (see Fig. 67). In this case, the tip of the bar display temporarily retreats to the lowest luminance value, and then the bar display extends 22/3 Ev plus more than the lowest luminance value. Next, it is determined whether or not the camera has been released, and if the camera has not been released, the program returns to the mode determination program again.

In spot mode, when the release is released, it is next determined whether or not the trigger is open, and if the trigger is open, the exposure time is measured based on the manual data set in the timer counter, and the timer counter is set to the specified value. End the exposure when the value is reached. After the exposure is completed, the program returns to mode determination.

Next, a case where the strobe is powered on in manual mode will be described. Now, when the strobe power is turned on and manual strobe photography is performed, it is first determined whether or not the mode has just been switched, and if so, the display is reset. This corresponds to the "MANU" display and the fixed point index display shown in FIG. 73. Next, after inputting manual data, the shutter seconds are displayed. FIG. 73 shows a state where 1/3 second is set as the manual shutter time. Subsequently, the average Bv value, Sv-Av value, and Cv value are input in this order, and the deviation from the standard exposure level is calculated from these values and displayed in points (see Figure 73). Next, it is determined whether the camera is released or not, and if the camera is not released, the program branches to a mode determination program. Note that in auto mode or off mode, in flash photography, the shutter time is all strobe synchronization time, but in manual photography, the shutter is controlled according to the manually set shutter time.

Next, the operation of the camera 10 of the present invention will be explained along with the flow of the program in the CPU 50 with reference to detailed flowcharts shown in FIGS. 28 to 44. First, the power is turned on as shown in FIG. This corresponds to storing a battery having an electromotive force and capacity equal to or higher than the specified voltage in the battery storage chamber of the camera 10. Next, clear the display. This corresponds to setting all the contents of the DRAM 85 to '0'. Also, reset the interface. Here, output ports O0~
A positive pulse is output to O3, and a flip-flop circuit for spot mode detection (G ₇ , G ₉ ), a flip-flop circuit for spot input detection (G ₁₁ , G ₁₂ ), a flip-flop circuit for highlight mode detection (G ₁₅ , G _{16 )} ) and the flip-flop circuits for shadow mode detection (G ₁₉ , G ₂₁ ). As a result, each input port I2 to I5 becomes '0'. Next, reset the variables. Here, first, flag M10
Set the content (M10) to '1'. This flag M1
0 is the memory hold detection flag,
(M10) = 0 indicates memory hold status. Next, the off mode constant C22 is stored in the photographing mode detection flag M13. This shooting mode detection flag M13 is set with a constant according to each shooting mode, and the same shooting mode detection flag M1
Paired with 2, it is used to determine whether or not the shooting mode has just been changed. Subsequently, '0' is stored in the highlight input immediately detection flag M17. The immediately after highlight input detection flag M17 is a flag for determining whether or not the highlight input has just occurred. Next, '0' is stored in the shadow input detection flag M18. This shadow input detection flag M18 is a flag for detecting whether or not a shadow input has occurred immediately. As mentioned above, when using highlight reference shooting or shadow reference shooting, immediately after that mode is selected, the tip of the bar extends to the highest or lowest brightness value of the input point, and then reaches the predetermined exposure level. Bar display is set. Therefore, once the highlight mode or shadow mode is selected, when shifting the bar display for a spot input point input thereafter, the bar display is only changed to a predetermined exposure level, and the maximum brightness is set. The operation of resetting the bar display to the value or the lowest brightness value is not performed. Therefore, it is necessary to determine whether or not a highlight input or a shadow input has just been made. Highlight input detection flag M
17. The detection flag M18 immediately after shadow input is
This is a flag for this detection. Subsequently, '1' is stored in the blinking display flag M22. This flashing display flag M22 is a flag for performing a flashing display, and by reversing the sign of this flag M22, the display can be turned on or off, and the flashing display can be performed. There is.

After the initial setting after power-on is performed in this way, it is then determined whether the input port I0 is '1' or not, thereby determining whether or not the mode is auto mode. Now, I0=1, that is,
Assuming auto mode is selected, then
It is determined whether the input port I13 is '1'. Input port I13 becomes I13=1 when the strobe is powered on, but now the strobe is not powered on and I13 is set to 1.
Suppose that =0. Then, it is next detected whether or not the memory mode detection input port I6 is '1'. This input port I6 becomes I6=1 in the memory mode. Assume that the memory mode is not currently selected and I6=0. Next, the memory hold detection flag M1
Set the content of 0 to '1'. This is done to reset the contents of flag M10 since the memory is not currently in the hold state. continue,
The “MEMO” display is cleared. this is,
DRAM85 corresponding to “MEMO” segment
This is done by setting the contents of the memory area to '0'. Next, non-memory constant C26 is stored in memory mode detection flag M11. This non-memory constant C26 is a constant C20 to be described later.
It is a constant with a different value from C24, C30, and C31. Next, it is determined whether the contents of the flag M11 (M11) are the same as the average direct auto mode constant C21. As mentioned above, there are two types of memory modes: average direct auto memory, which controls exposure using direct metering in auto mode, and spot auto memory, which controls exposure using spot metering in auto mode. In the case of average direct auto memory mode, memory mode detection flag M
11 is the average direct auto mode constant C21
is stored, and in the case of spot auto memory mode, the memory mode detection flag M
11 stores a spot auto mode constant C20. Now, since neither is the case, next, input port I2 for spot mode detection is set to '1'.
It is determined whether or not. When in spot mode, I2 = 1, but if it is not in spot mode, the shooting mode will be average direct auto mode, and the program will be set to average direct auto mode as shown in Fig. 29 through -. branch into the flow. Here, first,
The average direct auto mode constant C21 is stored in the shooting mode detection flag M12. Next, it is determined whether the content of the photographing mode detection flag M13 (M13) is the off mode constant C22. This flag M13 is set to constant C22 when the variables are reset immediately after the power is turned on, so if this is the first program flow immediately after the power is turned on, the variables will be reset next. . If (M13) = C22, then it is determined whether the contents (M12) and (M13) of the shooting mode detection flags M12 and M13 are equal to each other, and (M13) = ( M12), when
Since this is just after changing from another shooting mode to the average direct auto mode, the variables are reset next. When (M13) = (M12),
Since this is the flow of the program from the first time onwards after switching to the average direct auto mode, there is no need to reset variables and reset the display, and these resets are not performed. Assume that this is the first program flow after changing to the average direct auto mode. At this time, first, the bar display start point is initialized as a variable reset. This is done by storing the address of the memory area of the DRAM 85 corresponding to the rightmost end of the bar display segment shown in FIG. 19a in the bar display start address storage area M14. In the bar display immediately after changing the mode, the segment display starts from the rightmost segment, actively notifying the photographer that shooting in the new mode has started, so it is necessary to specify the starting point for this purpose. This is because there is. Next, the display is reset. Here, '1' is stored in the memory areas of the DRAM 85 corresponding to the "AUTO" segment and each segment of "LONG", "1 to 2000", and "OVER" shown in FIG. All areas are set to '0'.

Next, the contents (M12) of the photographing mode detection flag M12 are transferred to the photographing mode detection flag M13, and the photographing mode is stored. Therefore, in the program flow from the second time onward, (M13) = (M12), and variable reset and display reset are not performed. Next, the contents of the memory hold detection flag M10 (M10) are
A determination is made as to whether it is '0' or not. Currently, the content of flag M10 (M10) is '1' because it is not in the memory hold state, so (M10) =
Exit the content of 0 with no (N), then average Bv
The average Bv value BV1 input from the input port I7 is stored in the value storage area M0.

Here, a description will be given of how the average Bv value of the analog signal output from the head amplifier circuit 51 is converted into a digital value. First, the CPU 50 sets the output port O4 to '1' to specify that it is an average Bv value input. Next, set the output port O5 to '1' to specify that the average Bv value is input. By the way, the contents of the A-D converted analog signal S8 and the output ports O4 and O5
The relationship between signals S3 and S7 output from
When the signals S3 and S7 are '1' and '1', the signal S8 is the average Bv value, and when the signals S3 and S7 are '1' and '0', the spot Br value, '
When it is 0' or '1', it is the Sv-Av value, and when it is '0' or '0', signal input is prohibited. Now, set the signals S3 and S7 to '1',
Since it is set to '1', the analog signal S8 to be A-D converted
is the average Bv value. Before the AD conversion is started, all the inputs of the DA conversion circuit 58 shown in FIG. 17 are '0'. At the start of A-D conversion, only the most significant bit _b7 is set to '1', and then the output voltage V _DA of the D-A converter circuit 58 and the A-
The voltage V _AG of the D-converted analog signal S8 is compared. Now, if V _AG ≧ V _DA , the output of comparator A12 becomes '1'. Next, if the A-D conversion signal input port I7 is '1', the CPU 50 leaves the most significant bit _b7 at '1', and
- Set '1' to the most significant bit of the register that stores the D conversion result. If V _AG < V _DA ,
Set the most significant bit _b7 to '0' and set the most significant bit of the register that stores the A-D conversion result to '0'.
Set to 0'. By repeating the above operations from _b7 to _b0 , a digital value corresponding to the average Bv value is finally stored in the register that stores the A/D conversion result. Next, the digital value corresponding to this average Bv value is temporarily stored in the accumulator (ACC) 7.
9 and stored at address M0. In addition, A- of the spot Bv value and Sv-Av value, which will be explained later.
D conversion is performed in exactly the same manner.

Returning to FIG. 29 again, when the average Bv value is stored in the average Bv value storage area M0, it is then determined again whether (M10) = 0 or not, and since there is no memory hold state, Sv - Av Value storage area M1
Store the Sv−Av value SV−AV in . Then, it is determined that (M10) = 0 again, and since it is not in the memory hold state, the Cv value CV is input from the input port I9.
is stored in the Cv value storage area M2. and,
Determine whether (M2) = 0 or not, and if there is no correction input, (M2) = 0, so '±'
The display of the segment is erased, and when there is a correction input, since (M2)≠0, the '±' segment is displayed. Next, it is determined again whether or not memory hold is being performed by determining (M10)=0. Since it is not currently memory hold, the calculation of the Tv value is then started. First, the average Bv value (M0)
After adding the Sv-Av value (M1), the added value is 1/4. This means that the Bv value and Sv−Av value are LSB1/1
This is because while it is stored with a resolution of 2Ev, it is displayed in units of 1/3Ev. Next, add the Cv value (M2). Since the Cv value is input with a resolution of LSB1/3Ev, there is no need for correction. Next, after level correction is performed by adding a constant C2, this calculation result value is stored in the bar display data storage area M3. Next, while there are 34 bar display segments and the range that can be displayed is only 11≠1/13Ev, the calculation result value stored in area M3 can be approximately 0 to 20Ev, so
It is necessary to judge whether it is within the range that can be displayed. Therefore, next, in order to convert the calculation result value (M3) into display data, a data conversion subroutine f{(M3)} is executed.

The subroutine f{(M3)} is a function program for converting the value (M3) into display data, and is specifically shown in a flowchart as shown in FIG. Next, this flowchart will be explained.

Constant C41 corresponds to the “OVER” segment
This is a constant indicating the address of the memory area of the DRAM 85. When (M3)≦C41, all the Tv values stored in the bar display data storage area M3 are in the over area, so the contents of area M3 are
Make it. Now, if (M3)≦C41, then,
Compare the contents of area M3 (M3) and constant C40. Constant C40 corresponds to “LONG” segment
This is a constant indicating the address of the memory area of the DRAM 85. When (M3)≧C40, all Tv values stored in area 3 are in the under area, so
Set the contents of area M3 (M3) to C40. if,
If C41<(M3)<C40, it means that the Tv value is within the area where a bar can be displayed, and the subroutine f{(M3)} is ended. After this, the subroutine f{(M3)} returns to the original program.

Returning again to the average direct auto mode program in FIG. 29, subroutine f {(M3)}
When this is completed, a next predetermined time delay instruction (interval instruction) is executed, and then a determination is made as to whether the release signal input port I10 is '1'. Here, the role of the interval command is particularly important in memory photography, so we will discuss it in the explanation. Above input port I
10 indicates that the camera has been released by setting it to '1', but if the camera has not been released yet, then a bar is displayed based on the bar display data (M3). This bar display is performed in the bar display subroutine shown in FIG. Since the bar display methods vary depending on each shooting mode, please refer to the bar display subroutine program below.
This will be explained after the explanation of the entire program is finished, and until then, only the mode of bar display will be explained. Now, when C41<(M3)<C40, the fourth
A display as shown in Figure 5 is displayed. In this case, in the first program flow immediately after the mode change, the bar display changes color sequentially starting from the rightmost segment, and in Figure 45, the shutter second time is 1/15.
It stops at the position corresponding to the “15” segment indicating seconds. In the second and subsequent program flows immediately after the mode change, the bar display starts from the tip of the previous bar display and stops at a predetermined display position. If (M3) = C41, the bar display will extend to the leftmost end, as shown in Figure 46.
Display the “OVER” segment blinking. Also,
When (M3)=C40, as shown in Figure 47,
No bar is displayed, and only the "LONG" segment is displayed blinking.

Next, when the shutter is released during the average direct auto mode program flow, the judgment of I10 = 1 passes through as YES, and then the memory mode detection input port I6 becomes '1'.
A determination is made as to whether or not this is the case. Input port I
6 indicates the memory mode with '1', but it is assumed that the memory mode is not selected now, so
The determination is passed as NO, and then the exposure end signal input port I12 is determined. Input port I12 is
This is a port to which the exposure end signal S13 is input, and is set to '1' until the trailing curtain holding magnet MG1 is demagnetized.
Therefore, the flow of the program is I until the end of exposure.
12=1 loop and input port I12 is '
When the value changes to 0' and the exposure is completed, the determination I12=1 is passed as NO. Then, an interval instruction for delay is executed. This interval instruction, for example, stores a numerical value in a register, executes a subtraction instruction by '1', and ends execution when the subtraction instruction reaches a predetermined value. It is necessary to perform photometry after the movable reflection mirror 31 has descended and the photometry optical system has stabilized, but the mirror 31 must be started after the exposure end signal S13, which is the degaussing signal of the trailing curtain holding magnet MG1, reaches the 'L' level.
It took several tens of seconds for the camera to completely descend and the photometric optical system to stabilize.
ms, so an interval instruction is required. When this interval instruction ends, then
Positive pulses are output to output ports O0 and O1, respectively. This is because when shooting in the spot auto mode or spot manual mode is completed, the mode is automatically switched to the average shooting mode. next,
- to return to the mode discrimination program shown in FIG.

Next, the flow of the program in spot auto mode will be explained. When the camera 10 is in auto mode and the spot input button 14 (see FIG. 2) is pressed, the spot input spot SW ₈ (see FIG. 7) is closed, and the spot mode detection input port I2 of the CPU 50 and The input ports I3 for spot input detection each become '1'. Therefore, in the auto mode, the spot auto mode has been selected and the spot input has been made. This spot auto mode is still an auto mode like the above-mentioned average direct auto mode, so in the mode discrimination program shown in Fig. 28, the above-mentioned average direct auto mode branches through the judgment of I2 = 1. This time, the determination is passed as YES, and it is then determined whether the content of the photographing mode detection flag M13 (M13) is equal to the spot manual mode constant C24. This determination is
This is necessary because the following cases occur due to the configuration of the electric circuit of the camera 10. The manual mode includes a normal manual mode and a spot manual mode. In the spot manual mode, the spot mode detection input port I2 is set to '1'.
From this state, auto switch SW ₄
If you close the system and change to auto mode, you will be changing directly from spot manual mode to spot auto mode. Generally, when shooting in spot mode, the frequency of shooting is relatively small compared to the overall shooting frequency, and unless special spot operations are performed, it is appropriate to use average direct auto mode or normal manual mode. Therefore, in the camera 10 of the present invention, when switching from manual mode to auto mode, the mode is switched to average direct auto mode, and when switching from auto mode to manual mode, it is switched to normal manual mode. Immediately after changing from spot manual mode to auto mode, the shooting mode detection flag M13 is set to the spot manual mode constant at the beginning of the spot auto mode program (see Figure 35), which will be described later.
Since it is set to C24, at this time, a pulse of '1' is sent to the output ports O0 and O1, and the spot mode detection flip-flop circuit ( _G7 , _G9 )
and the spot input detection flip-flop circuits (G ₁₁ , G ₁₂ ) are reset, and the input ports I2,
I3 is set to '0'. If it is not immediately after the change from the spot manual mode to the auto mode, then a determination is made that (M10)=0. now,
Since it is not in the memory mode state, the content (M10) of the memory hold detection flag M10 is '1', and this judgment is passed as NO. Next, I
A determination of 3=1 is made. Now, since the input port I3 for spot input detection is set to '1', that is, there is a spot input, the program goes through the flowchart shown in Fig. 30 in spot auto mode with spot input. Branch into chat. Here, first, the spot Bv value BV2 is stored in the Bv value storage area M0.
Spot as a digital value after A-D conversion
The method for storing the Bv value BV2 in the area M0 is as described in the explanation for storing the average Bv value BV1. Next, it is determined whether the spot Bv value (M0) is smaller than a certain set value C1, and if (M0)≧C1, the constant C1 is transferred to the area M0. Generally, there is a limit to the brightness of a subject that can be measured by a photometry circuit, and weak light is particularly problematic. This is because when the brightness of the object decreases, the photocurrent decreases, and errors due to leakage current, noise, and loss of linearity of the logarithmic compression diode increase. Therefore, although the spot Bv value (M0) is originally a large value indicating low brightness, it becomes a small value, and when exposure control is performed based on this value, there is a risk that a large error will occur. Therefore,
When the spot Bv value (M0) is equal to or higher than a certain photometric limit value C1, the spot Bv value (M0) is fixed at that limit value. Next, the spot auto mode constant C20 is stored in the photographing mode detection flag M12 to memorize the photographing mode. Next, in the same way as in the average direct auto mode above, determine whether the power has been turned on or the mode has been changed using (M13) = C22 and (M13) = (M12).
If applicable, variable reset, display reset, and interface reset are performed. It should be noted that the determination as to whether or not the contents of the photographing mode detection flag 13 (M13) described above is equal to the spot manual mode constant C24 is as follows.
It goes without saying that you can do what you do here. The above variables, that is, internal registers, are reset. Here, the overlap detection flag M is first reset.
Set the content of 5 to '1'. In spot mode, the calculation result of the current photometry point is displayed in a blinking manner at high speed, so if the display of the current photometry point and the spot input point overlap, the display of the current photometry point will be changed. Give priority to flashing display. The overlap detection flag M5 is a detection flag for this purpose. This will be detailed later. Next, highlight input detection flag M6
Set the content to '1'. Also, the content of the shadow input detection flag M7 is set to '1'. Both detection flags M6 and M7 are '1', indicating that the mode is not highlight or shadow mode. Subsequently, the address of the start segment of the bar display is stored in the bar display start address storage area M14. As described above, the start segment of the bar display immediately after the mode change is the rightmost segment. In addition, the spot input data number storage area M
Set the contents of 15 to '0'. Area M15 is for counting and storing the number of spot input data. Next, initialize the display. Here, as shown in Figure 48,
Each segment of "SPOT", "LONG", "OVER", "AUTO" and "1" to "2000" is displayed. Since these displays are essential in the spot auto mode, these displays are made immediately after changing the mode. Next, initialize the interface. Here, a pulse of '1' is output to the output ports O2 and O3, and the flip-flop circuit for highlight mode detection ( _G15 ,
G ₁₆ ) and the flip-flop circuit for shadow mode detection (G ₁₉ , G ₂₁ ) are reset. Further, it outputs '1' to the output port O9, and puts the shutter control signal S16 into the energized standby state.

Next, the spot auto mode constant C20 stored in the photographing mode detection flag M12 is transferred to the photographing mode detection flag M13. This will prevent initial settings from being performed from the next program flow. Subsequently, the contents of the spot input data number storage area M15 are incremented by one. Next, the spot Bv value BV2 stored in the Bv value storage area M0 is stored in the MBN register.
Transfer to street address. Here, N in the MBN address means an address corresponding to the contents of area M15. Next, in the Sv-Av value storage area M1
Store the Sv-Av value (SV-AV). continue,
Add the spot Bv value (M0) and the Sv-Av value (M1), reduce the result to 1/4, add constant C2, and store it in the MTN address of the register. Here, N in the MTN address means an address corresponding to the contents of area M15. Furthermore, the meaning of the above calculation formula is as described in the explanation of the average direct auto mode. next,
The subroutine f{(MTN)} (see FIG. 43) is executed using the contents of the MTN address as a variable, and the calculation result is converted into display data and stored again at the MTN address. Next, the Tv of the spot input point
The value (MTN) is displayed in points (see Figure 48). At this stage, the bar display and the blinking display of the current photometry point have not yet been made. Subsequently, a positive pulse is output to the output port O1. In the spot mode, two flip-flop circuits operate: a flip-flop circuit for spot mode detection (G ₇ , G ₉ ) and a flip-flop circuit for spot input detection (G ₁₁ , G ₁₂ ). It is necessary to reset the detection flip-flop circuits (G ₁₁ , G ₁₂ ) and wait for the spot input state again. This is why a positive pulse is output to the output port O1. Next, it is determined whether the content (M6) of the highlight input detection flag M6 is '-1', and it is determined whether the content (M7) of the shadow input detection flag M7 is '-1'. Do this. If (M6)=-1 or (M7)=-1, the mode is highlight mode or shadow mode, so bar display based on the average of spot input data is not performed. Now, if it is neither highlight mode nor shadow mode, and (M6)≠-1 and (M7)≠-1,
Next, a bar display program based on the average of the spot input data is entered. Here, first, the additive average value of the spot Bv values (MBn) (n = 1 to N) obtained by the spot input operation ≠
(MBn)/N is determined and stored in the bar display data storage area M3. Next, the correction value Cv value
Store the CV in the CV value storage area M2. Then, it is determined whether or not a correction operation has been performed by determining whether the correction value (M2) is '0' or not. If there is a correction, a "±" segment is displayed. (see Fig. 50), and if there is no correction, the display of the "±" segment is erased (see Fig. 48). Next, the sum of the average value of the spot Bv values (M3), the Sv-Av value (M1), the value 4 (M2) which is four times the Cv value, and the constant C3,
Store in shutter second storage area M8. Here, the reason why the Cv value (M2) is quadrupled and added is to equalize the weight of the LSB. That is,
LSB of Bv value (M3) and Sv−Av value (M1) is 1/12Ev
Since the LSB of Cv value (M2) is 1/3Ev, multiplying Cv value (M2) by 4, Bv value (M3),
This is to match the weight with the Sv-Av value (M1). Therefore, the contents of area M8 (M8) serve as shutter speed information for exposure control, and after release, a value corresponding to the contents (M8) is set in the timer counter to perform exposure control. This will be detailed later. next,
After adding the Sv−Av value (M1) and the additive average value of the spot Bv value (M3) and dividing it to 1/4, the Cv value (M2) is calculated.
and a constant C2, and store the result in the bar display data storage area M3. Next, subroutine f{(M3)} is executed using the contents of area M3 (M3) as a variable.
After converting the content (M3) to the Tv value for bar display, execute the subroutine for bar display. The Tv value (M3) is displayed as a bar (see Figure 48). Here, if the spot input is the first input, the bar display starts from displaying the rightmost segment, and if it is the second or subsequent input, the bar display starts from the segment at the tip of the previous bar display to the segment at the desired position. Moving. If the Tv value (M3) after bar display data conversion is equal to constant C41, the bar display extends to the leftmost segment and at the same time, as shown in FIG.
Display the “OVER” segment blinking. Also,
The Tv value (M3) after bar display data conversion is a constant
When equal to C40, the bar display disappears,
The “LONG” segment will be displayed blinking. Note that details of the bar display will be described later.

The bar display ends or the above (M6) = -
1 or (M7)=-1, if the result is YES, then it is determined whether the shutter has been released or not based on the determination I10=1. When the release is not released, the input port I10 is '0', so the determination I10=1 is passed through as NO, and the program returns to the mode determination program of FIG. 28 through -. Also, when the shutter is released, the 29th
Enter the program for exposure control in the figure. This program will be described later.

Next, even in the same spot auto mode,
The flow of the program when no spot input is performed, that is, when I2=1 and I3=0 will be explained. In this case, in the mode discrimination program shown in FIG. 28, the program exits from the determination of I2=1 with YES, exits the determination of I3=1 with NO, and branches to the program shown in FIG. 31 through -. Here, first, the Sv-Av value (SV-AV) is stored in the Sv-Av value storage area M1. Next, the Cv value CV is input into the Cv value storage area M2. Since we are not currently in the spot input state, it goes without saying that the spot Bv value will not be input. Next, (M2)
= 0, and if there is a correction, the “earth” segment is displayed (see Figure 50), and if there is no correction, the “earth” segment is erased (see Figure 48).
(see figure). Next, all display of spot input data (MTn) (n=1 to N) for display is erased.
This is because the point display of spot input data is a point display of the Tv value obtained from the subject brightness (spot Bv value) immediately after the spot input operation and the Sv - Av value at each time point.
This is because it is necessary to change the point display according to changes in the −Av value. The spot Bv value from each spot input is stored in each register MBn (n
It was mentioned above that the data are stored in the numbers 1 to 1 (=1 to N).
Next, the Tv value for the spot Bv value stored in register MBn (n = 1 to N) is calculated by 1/4 {(M1)
+(MBn)}+C2 (n=1 to N), and each
Store in each register MTn corresponding to the spot Bv value stored at address MBn. and,
Execute the subroutine f {(MTn)} for the contents of each register MTn (MTn), and calculate the Tv value (MTn).
(n=1 to N) are each converted into display data. Next, Tv value (MTn) after display data conversion
(n=1 to N) are each displayed as a point. Next, it is determined whether the content (M6) of the highlight input detection flag M6 is '-1' and the content (M7) of the shadow input detection flag M7 is '-1'.
It is determined whether or not. If (M6)=-
1 or (M7) = -1, it is highlight mode or shadow mode, so bar display based on the average of spot input data described below is not performed, and spot Bv value input (M0← Jump to step BV2). now,
If neither the highlight mode nor the shadow mode is selected, a bar display program based on the average of the spot input data is entered. First, the spot Bv value (MBn) input as a spot
Calculate the additive average value _N 〓 ⁿ⁼¹ (MBn)/N of (n=1 to N) and store it in the bar display data storage area M3.
Store in. Next, add average value of spot Bv value (M3), Sv-Av value (M1), 4 times Cv value 4
(M2) and constant C3, and store in the shutter seconds storage area M8. The contents of this area M8 (M8) are exposure control data as described above. Hereinafter, detailed explanations of the meanings of the arithmetic expressions that have already been explained will be omitted.
Next, by 1/4 {((M1) + (M3)} + (M2) + C2,
Find the Tv value and store it in the bar display data storage area M3. Next, subroutine f
After converting the contents of area M3 (M3) into display data by executing {(M3)}, a bar is displayed by executing the bar display subroutine.

Next, a program is entered to display the current photometry point blinking. Here, we will explain the calculation of the display data of the current photometry point, the process of giving priority to the display mode of the current photometry point when the blinking display of the current photometry point overlaps with the spot input point, and the process of giving priority to the blinking display of the current photometry point. A process is performed in which the current photometry point is displayed blinking at regular intervals. First, the display data calculation for the current photometry point will be described. at first,
Store the spot Bv value BV2 in the Bv value storage area M0. Next, after calculating the Tv value by 1/4 {((M0) + (M1)} + C2, this is stored in the point display data storage area M4.Next, by executing the subroutine f{(M4)} , after changing the contents of area M4 (M4) to display data, store it in area M4 again.When the display of the current metering point that is currently displayed as a point is updated, the old point display must be deleted. In other words, it is necessary to set the contents of the address of the DRAM85 memory area corresponding to that point display to '0'.However, the display of the current photometry point and the display of the spot input point overlapped, but the current photometry point If the display position has changed due to an update,
The old current metering point must remain displayed as a spot input point. The next step is to create a program for this process. First, the contents of overlap detection flag M5 (M5)
is '1' or not, and if (M5)≠1 and there is an overlap, the display data (M4) of the current metering point that is about to be displayed and the display of the current metering point that is currently displayed. It is determined whether the data (M5) are equal or not. if,
When the data (M4) and (M5) are not equal, the display data (M5) of the current photometry point currently displayed is not equal to any of the multiple spot input point data (MTn) (n = 1 to N). Make this determination. If there is an equal value, display the data (M5) as a point,
If there is no match, clear the data (M5) display to update to a new display. Also,
If the above determination (M5)=1 is YES, it means that the first current photometry point is displayed, so there is no need to update it. Next, M5
Transfer the new current photometry point display data (M4) to the address. Next, by determining I10≠1,
It is determined whether the release is released or not, and the I10
When =1, the program branches to the exposure control program shown in FIG. 29 through -. Also,
When I10≠1, the release is not released, so
Next, a program is entered to display the current photometry point blinking. First, display blinking period storage area M23
Store the display blinking period constant C50. Next, the process moves to subroutine WAIT3 for flashing display shown in FIG. 41. In this subroutine WAIT3, first, flag M22 for blinking display is set.
The program jumps to subroutine WAIT2 shown in FIG. 40, which performs inversion of , and counts the blinking period, and a delay program is executed. this subroutine
The flashing cycle of the display is determined by WAIT2 and the program execution time in spot auto mode. First, in the subroutine WAIT2, the contents of the display blinking cycle storage area M23 are decremented one by one and stored in the area M23 again. Next, it is determined whether the content (M23) of area M23 is '0' or not, and if (M23)≠0, the content (M23) is changed again.
Decrement. Then, when (M23)=0, the determination is YES, and then the sign of the blinking display flag M22 is inverted, and then the process returns. By executing this subroutine WAIT2,
A predetermined delay time is obtained. this subroutine
After executing WAIT2, in subroutine WAIT3,
It is determined whether the flag M22 is ``1'' or not. If YES, the display data (M5) of the current photometry point is displayed as a point, and if NO, the display of data (M5) is cleared. In the next program flow, flag M22 is inverted in subroutine WAIT2, so the displayed point is erased or the erased point is displayed. In this way, the display state is reversed every time the program runs, and the current photometry point is displayed blinking. Then, when the data (M5) is displayed or cleared, the process of subroutine WAIT3 ends and returns. Here, displaying data (M5) means storing '1' at address (M5) in the memory area of DRAM85.
Clearing means storing '0' in address (M5) of the DRAM85 memory area.

Next, the program shown in FIG. 31 enters the processing program for the highlight mode and shadow mode shown in FIG. 32 through -. First, by determining (M10)=0, it is determined whether or not the memory is in the memory hold state. Since it is not currently a memory hold ((M10)=1), the determination is passed as NO, and then, based on the determination of I4=1, it is determined whether or not there is a highlight input. Currently, there is no highlight input and I4 = 0, so
Next, by determining I5=1, it is determined whether or not there is a shadow input. Since there is no shadow input and I5=0, the highlight input detection flag M6 and the shadow input detection flag M7 are subsequently detected. In highlight or shadow mode, if the highlight input or shadow input is input an even number of times, the mode will be canceled, and when the mode is switched from highlight to shadow or from shadow to highlight, the mode will be canceled when the mode is switched from highlight to shadow or from shadow to highlight. A method is adopted that allows switching to a different mode. The highlight input detection flag M6 and the shadow input detection flag M7 are necessary for this purpose. Now, since it is neither highlight mode nor shadow mode, and (M6)=1 and (M7)=1, next, it is determined whether or not the camera is released by determining I10=1. If the camera has not been released, the program returns to the mode discrimination program shown in FIG. 28 through -. If the release has been released, the program branches to the exposure control program shown in FIG. 29 through -.

Next, the exposure control program shown in FIG. 29 will be explained. First, set the contents of the shutter seconds storage area M8 (M8) to the timer counter. Here, Tv value (M8) is LSB1/12Ev
Since the accuracy is , it is necessary to perform the following approximate conversion on the Tv value (M8) and set it in the timer counter. Now, the contents of area M8
When the Tv value is expressed in decimal notation, it can be expressed as Tv=12(12X+Y+1/12Z)...(1) (where X, Y, and Z are integers). Therefore, the exposure time T is: T=(1/f)2 ^(Tv/12) =(1/f)2 ^12X+Y+1/12Z ...(2
) (where f is the frequency of the clock pulse CK), which approximately becomes T=(1/f)(1+Z/12)·2 ^12X+Y (3). Therefore, when setting the Tv value (M8) in the timer counter, first divide the Tv value (M8) by 1/12 to find the decimal point (here, 4 bits). Next, the lowest bit of the timer counter is set to ``1'', and then the four bits below the decimal point are loaded, shifting the timer counter one bit at a time from the lowest to the highest.
Therefore, the 5th bit from the least significant bit is always '
1' is loaded, and the lower 4 bits are loaded with the 4 bits below the decimal point. next,
These 5 bits are further shifted to the upper side by 12X+Y-4 bits. As a result, the Tv value (M8) is loaded so as to satisfy the above equation (3), and the setting of the timer counter is completed. next,
Based on the determination that I11=0, the system waits until the trigger opens, and when the trigger opens, the input port I11 becomes '1', so the timer counter is then subtracted at a cycle of 1/f to measure the exposure time. Then, when the content of the timer counter becomes '0', the exposure must be finished, so the output port O9
Outputs '0' to end the exposure. Then, after executing the interval instruction, through -
Returning again to the mode sorting program shown in FIG. Execution of the interval command is performed using the shutter control signal S.
16 is output and the trailing curtain holding magnet MG ₁ is demagnetized, it takes several tens of milliseconds for the movable reflection mirror 31 to descend and become capable of photometry again.
This is done to create this time.

Next, the flow of the program when the highlight mode is selected in the spot auto mode will be explained. Now, in the spot auto mode, if there is no spot input but I3 = 0, in this case, in the mode discrimination program shown in Fig. 28, the judgment of I3 = 1 is passed as NO, and the input shown in Fig. 31 is passed through -. Branch to a program for no spot input in spot auto mode. Below, descriptions of programs common to the normal spot auto mode will be omitted. It is now assumed that the flow of the program is progressing and that the display of the spot input points has been changed. That is, in the flow of FIG. 31, it is assumed that the step of displaying points of data (MTn) (n=1 to N) has been completed. Next, (M6)=-1,
Based on the determination of (M7) = -1, it is determined whether there is a highlight input or not, and whether there is a shadow input, but at this stage, (M6) = 1,
Since (M7)=1, the normal spot auto mode program is executed and the bar display data (M3) is displayed as a bar. As the program progresses further, the program shown in FIG. 32 is entered through -. Here, first (M10) = 0
Based on the determination, it is determined whether or not memory hold is in effect, but since it is not currently in the memory hold state, the determination is passed as NO, and next, the level of the highlight mode detection input port I4 is detected. Since the highlight is currently being input and I4=1, the decision I4=1 is passed with a yes, and then '1' is stored in the highlight input detection flag M17. This flag M17 is a flag for detecting whether this is the first program execution after selecting the highlight mode. Next, in order to reset the highlight input detection flip-flop circuits G ₁₅ and G ₁₆ , a positive pulse is output to the output port O2. Subsequently, the contents of the highlight input detection flag M6 are inverted. Now, when (M6) = -1, the highlight mode is activated, and when (M6) = -1, the highlight mode is canceled. That is, when the highlight input detection flip-flop circuits G ₁₅ and G ₁₆ are set an even number of times, (M6) = 1, the highlight mode is canceled, and when the flip-flop circuits G 15 and G 16 are set an odd number of times, (M6)
=-1, and highlight mode is selected.
Assume that the highlight mode is selected with (M6)=-1. Next, the "HIGH" segment is displayed (see FIG. 51). Next, the spot Bv value MBn (n=1 to N) that was input as a spot
The minimum value MIN (MBn) (n=1 to N) is found and stored in the shutter seconds storage area M8.
Next, it is determined whether the content of the highlight input detection flag M17 (M17) is '1' or not.
If (M17) = 1, that is, if this is the first program flow after switching to highlight mode,
As mentioned above, the bar display first shows the minimum value MIN.
It is necessary to extend to the spot input point corresponding to (MBn) (Figure 51). Next, a program for this processing will be explained. First, 1/4
Calculate the Tv value using {(M1)+(M8)}+C5 and store it in the bar display data storage area M3. Here, (M1) is the Sv-Av value, (M8) is the minimum value of spot Bv values input as spots, and C5 is a constant. Next, set the Tv value (M3) to subroutine f
After converting to display data by executing {(M3)}, the Tv value (M3) is displayed as a bar. continue,
Execute interval instruction. This interval command is executed after displaying the bar of the above Tv value (M3) indicating the maximum brightness value (M8), and then
It serves to create a waiting time until the bar display of the shutter seconds over 21/3Ev is executed. If this interval command is not executed, the bar display will reach 21/3Ev immediately after reaching its maximum brightness value.
This is to prevent the transition to the over display, which makes it difficult to confirm the display. If (M17)=-1, the bar display of the maximum luminance value is not performed and the process moves to the execution of the next instruction. Subsequently, a bar display of 21/3 Ev over is performed from point display of spot input data corresponding to the highest luminance value. First, 1/4 {(M1) + (M8)} +
Calculate the Tv value using (M2)+C5+7 and store it in area M3. Here, the number to be added'
7' corresponds to 21/3Ev. Further, a correction value (M2) is added to this calculation. Then, by executing subroutine f{(M3)}, data (M3)
After converting to display data, area M3 is
The data (M3) is displayed as a bar (see Figure 52). Then (M1) + 4 (M2) +
(M8) + C6 to find the exposure time in highlight mode and store this in the shutter seconds storage area.
Store on M8. Here, (M1) is Sv−Av value,
(M2) is the Cv value, (M8) is the highest brightness Bv value, and C6 is a constant. The above is an explanation of the case where (M6) = -1 in the determination of highlight mode detection flag M6. However, if (M6) = 1, the display of the "HIGH" segment is erased. It will be done. Next, set the highlight input detection flag M17 to '0', switch to highlight mode, and set 1.
A flag M17 is set to indicate that the program flow has ended. Next, the shadow input detection flag M7 is set to '1' and the flag M7 is reset. Thereafter, it is determined whether or not the shutter release is to be performed based on the determination of I10=1, and the program is branched to a predetermined flowchart through - or -, as in the case of the normal spot auto mode. .

Next, a case where the shadow mode is selected in the spot auto mode will be explained. A detailed explanation of the same program flow as the normal spot auto mode and highlight mode will be omitted. In the flowchart of Figure 32, in the case of shadow mode, (M10) = 0
and I4=1, respectively, with a no, and I5=
Go to judgment 1. If there is a shadow input, I5 = 1
Therefore, next, '1' is stored in the shadow input detection flag M18. This flag M18
is a flag for detecting whether or not this is the first program flow after changing to the shadow mode, and '1' indicates that it is the first time. Next, a positive pulse is output to the output port O3 to reset the shadow mode detection flip-flop circuits G ₁₉ and G ₂₁ . This results in I5=0. Subsequently, the sign of the shadow input detection flag M7 is inverted. This is to ensure that the shadow mode is cleared when the shadow mode is selected consecutively an even number of times, as in the case of the highlight mode. In resetting the variables in FIG. 30, (M7)=1 is set, so in the first program flow, (M7)=-1, and the next determination of (M7)=1 will be NO. Therefore, the "SHDW" segment is displayed first (see FIG. 55). Subsequently, the minimum brightness value MAX (MBn) (n=1 to N) that has been spot-input is determined.
Here, the larger the data (MBn), the more
Since the brightness value is small, it corresponds to the lowest brightness value of the maximum value of data (MBn). The obtained minimum luminance value MAX (MBn) is stored in the shutter time storage area M8. Next, by determining (M18) = 1, it is determined whether this is the first program flow after changing the shadow mode, and since (M18) = 1 for the first program flow,
Next, bar display data corresponding to the minimum luminance value MAX (MBn) is calculated. This is 1/4
It is determined by {(M1)+(M8)}+C5 and stored in the bar display data storage area M3. Here, (M1) is the Sv−Av value, and (M8) is the minimum brightness value.
MAX (MBn) and (M2) are Cv values, and C5 is a constant.
Next, by executing the subroutine f{(M3)}, the data (M3) is converted into bar display data, and then the bar display corresponding to the lowest luminance value MAX (MBn) is performed (see Figure 55). ). Next, an interval instruction is executed, and the purpose of this instruction is the same as described in the explanation of highlight mode. In this way, after switching to shadow mode, 1
In the program flow for the second time, the bar display is once returned to the position corresponding to the spot point display corresponding to the lowest luminance value. In the flow of the program from the second time onward, this display is not necessary, so in this case, the determination of (M18)=1 is passed as NO and the program branches directly to the next program.

Next, a program is executed to display a bar 22/3Ev below the lowest luminance value. Here, first, the calculation of the Tv value corresponding to 22/3Ev below the lowest luminance value is 1/4 {(M1) + (M8)} +
(M2)+C5-8, and the result is stored in the bar display data storage area M3. Here, (M1) is the Sv−Av value, and (M8) is the minimum brightness value.
MAX (MBn) and (M2) are Cv values, and C5 is a constant.
Further, '8' to be subtracted corresponds to 22/3Ev.
Next, after converting the data (M3) into bar display data by executing the subroutine f{(M3)},
The data (M3) is displayed as a bar (see Figure 56). Subsequently, exposure time information in the shadow mode is obtained using (M1)+(M8)+4(M2)+C6, and this is stored in the shutter time storage area M8. On the other hand, in the determination of (M7) = 1 above,
When the shadow input detection flag M7 is '1', the shadow mode is released, so "SHDW"
The display of the segment is erased, and the bar display corresponding to the above-mentioned lowest luminance value and the bar display 22/3Ev below this value are not performed. Subsequently, '0' is stored in the shadow input detection flag M18.
As a result, in subsequent shadow mode programs, the contents of flag M18 (M18)
The bar corresponding to the lowest luminance value is not displayed. In addition, the highlight mode detection flag M6 is reset to "1", and then it is determined whether or not the shutter release is performed by determining I10 = 1.
Branch to the respective program through - or -.

In the highlight and shadow modes above, in the second and subsequent program flows, I4=
0, I5=0. At this time, I4=
1 and I5=1 are passed as no, and then (M6)=-1 and (M7)=-1 are judged.
When (M6)=-1, the highlight mode is selected, so the highlight mode program is executed. Also, (M7)=
When the value is -1, the shadow mode is selected, so the program is executed in the shadow mode. If neither is the case, the process directly skips to the determination of I10=1. Then, by determining I10=1,
A determination is made as to whether or not it is a shutter release, and the program branches to the respective program through - or -.

Next, we will discuss the memory mode. As already mentioned, there are two types of memory modes: direct auto memory mode and spot auto memory mode. First, I will explain the direct auto memory mode.
Now, in the flow of the mode determination program shown in FIG. 28, after the strobe power is turned on when I13=1 in the auto mode, the level of the memory mode detection input port I6 is determined. Since this input port I6 becomes I6=1 when the memory switch _SW6 is closed and the memory mode is selected, the determination I6=1 is passed as YES, and then the memory hold detection flag M10 is determined. This flag M10 is set in the memory set state.
This flag is set to "1" and becomes "0" during memory hold. Now, if the memory is set, (M10)=1, so next, the area M21 for storing the apex value of the actual exposure time is initialized to "0". Next, the "MEMO" segment is displayed (see FIG. 57). Subsequently, the memory mode detection flag M11 is determined. This flag M11 is an area for storing mode constants for the photographing mode in the memory mode, ie, direct auto memory mode or spot auto memory mode. Since the constant C26 is currently stored in the flag M11 in the normal auto mode program, (M11)≠C21 and (M11)≠C20.
Here, C21 is the average direct auto mode constant and C20 is the spot auto mode constant. Therefore, next, the level of input port I2 is determined. Now, since I2 = 0 in the average direct auto memory mode, the 29th
Branch to the average direct auto mode program in the figure. Here, first, the average direct auto mode constant is set in the shooting mode detection flag M12.
C21 is stored. Hereinafter, only the parts specific to the memory mode will be explained, and the explanation of the parts common to the average direct auto mode will be omitted. In the memory set state, there is no difference from average direct auto mode except that "MEMO" is displayed until release. Now, if the shutter is released, the judgment of I10 = 1 is passed with a yes, and the judgment of I6 = 1 is passed with a yes, and the judgment of (M10) = 0 is reached. Since we are now in the memory set state, we pass through the determination of (M10)=0 as NO, and then detect whether the trigger is open or not by determining I11=0. When the trigger opens, the I11 = 0 judgment passes with a yes,
Counts the actual exposure time. In this case, exposure control is based on average direct metering. The actual exposure time is counted by executing the actual exposure time counting subroutine shown in FIG. 42. Next, the program of this subroutine will be explained. The outline of the method for counting the actual exposure time has already been explained using FIG. This is done by doubling the period. By doing this, the final count value itself is LSB1/12
It is a value equivalent to the apex value with a weight of Ev.
In this subroutine, first, a constant C60 is stored in the reference pulse period storage area M32, and a constant C60 is stored in the reference pulse count storage area M32.
is initially set to “0”. Next, the reference pulse period (M32) is stored in area M31. and,
While decrementing the contents of area M31 (M31) by 1, store this in area M31,
The decrement is repeated until the content of area M31 becomes "0" as a result of the determination that (M31)=0.
When the content of area M31 becomes “0”, (M31)=
0 judgment with YES, and then the actual exposure time apex calculation value storage area M21 and the reference pulse count number storage area M30 are each set to 1.
Increment by Next, the level of the exposure end signal input port I12 is detected. If the exposure has not been completed, I12=1 passes through the determination of I12=0, and then (M30)=12 is determined. This determination is to determine whether 12 pulses have been counted. If the count is less than 12, the program returns to store the reference pulse period (M32) in area M31 again. and,
This loop is repeated 12 times and when (M30) = 12, the reference pulse period (M32) is reset to twice the count number storage area M3.
0 to "0" and returns to the program that stores the reference pulse period (M32) in area M31 again. The above program is repeated until the exposure by direct metering is completed, and when the exposure is completed, the I12 = 0 judgment is passed as YES and the process returns.
Return to the program shown in FIG. By the way, Area M
21 stores a value equivalent to the apex calculation value of the exposure time. Next, in order to indicate that the actual exposure time by average direct auto shooting has been held in memory, "0" is stored in the memory hold detection flag M10, and after executing the interval command, the mode determination shown in FIG. 28 is made through -. Return to the program.

1 in the memory hold state that follows
In the second program, as in the memory set, after passing through the determination of I6=1 in FIG. 28 as a yes, the program enters the determination of (M10)=0. This time, since M10=0 for memory hold, this judgment is passed with a yes, and the contents of the shooting mode detection flag M12 (M12) are stored in the memory hold detection flag M11. Now Flag M12
Since the average direct auto mode constant C12 is stored in , the constant is stored in flag M11.
C21 is set. Next, the shutter control signal output port O9 is set to "1", and the shutter control signal S16 is set to the "H" level. Next, (M11)
= C21 is judged, but as mentioned above, flag M
Since the content of 11 is constant C21, this judgment is passed with a yes, and through - the step of transferring the content of the shooting mode detection flag M12 to the shooting mode detection flag M13 in the average direct auto mode program of FIG. Branch into. Currently, M10 is in memory hold state.
= 0, the following judgment of (M10) = 0 is YES, and the Sv-Av value (SV-AV) is stored in area M19, and the Cv value is stored in area M20.
CV is stored. Next, the Cv value is input based on the judgment of (M2) = 0, and if (M2)≠0, “±”
Display the segment, otherwise erase the display of the “±” segment. Next, the judgment of (M10) = 0 is passed again with YES, and first, the Sv-Av value (M1) input at the time of memory set is
and the Sv-Av value (M19) input during memory hold, and store this in area M19. Next, the
Cv value (M2) and input during memory hold
Find the difference from the Cv value (M20) and convert this to area M20
Store in. Next, (M21) + (M19) + 4
(M20)+C40 calculates the exposure time in direct auto memory mode and stores it in the shutter seconds storage area M8. Here, the meaning of this expression will be explained. As mentioned above, (M21) is the apex calculation value of the actual exposure time by direct photometry. This value is the Bv value,
It is a value that includes Sv−Av value and Cv value, and therefore,
(M21) + (M19) + 4 (M20) + C40 is a calculation formula that ensures that even if you change the aperture or film sensitivity, the exposure level will be the same as when shooting with direct metering in the memory set state. Furthermore, by adding 4 (M20), it is possible to correct the memory hold, and the reason for this is already mentioned. Next, 1/4 {(M0) +
(M1)}+(M2)+C2 for bar display
Performs calculation of Tv value. Here, (M0) is the average Bv value immediately before the shutter is released in the memory set state, and does not change as long as the memory is held. Next, subroutine f
By executing {(M3)}, the calculated value (M3)
is converted into bar display data, and then bar display is performed. In this bar display, the entire bar display blinks (see FIG. 58). next,
The interval instruction to be executed is especially necessary when setting the memory, and its purpose will be described here. The level of the input port I10 is set to "1" when the release signal S0 is input in synchronization with the shutter release, but in reality,
I10 is set to 1 during the upward transition of the movable reflection mirror 31. Display photometry is performed using reflected light from the mirror, so if the input average Bv value (M0) is during this mirror rising transition, the display data during memory hold and the memory The actual exposure time data due to hold does not match. Therefore, the Bv value held immediately before release must be the value immediately before the mirror rises. Roughly speaking, the program consists of entering the average Bv value → determining the release → average Bv
This involves repeated memorization of value data, but
This problem can be solved by making the time from the input of the average Bv value to the release determination longer than the time from when the mirror 31 starts rising until the level of the input port I10 becomes "1". Execution of interval instructions is required for this purpose. next,
When the camera is released in the average direct auto memory mode, the determination of I10=1 is passed as YES, and then the level of input port I6 is determined. Now, in memory mode, I6 = 1, so next we enter the judgment of (M10) = 0, and since it is a memory hold, we exit this judgment with YES, and then the contents of the shutter seconds storage area M8 (M8).
Set the timer counter. The method of setting this timer counter has already been described. In addition, regarding the following programs,
Since it has already been explained, detailed explanation will be omitted here.

Next, the spot auto memory mode will be explained. Spot auto mode is originally a memory metering mode, and exposure is only performed based on the metering value entered manually, so in principle, spot auto memory mode prevents new metering values from being input. Just make it . First, in the memory set state,
There is no difference in flow from the spot auto mode except that "MEMO" is displayed. “MEMO” above
The display is performed in the same manner as in the case of direct auto memory, so a description thereof will be omitted. In addition, since the spot auto mode constant C20 is set in the memory mode detection flag M11, the determination of (M11)=C20 in the mode discrimination program of FIG. Branches to a program without spot input in the spot auto mode shown below. That is, in the spot auto memory mode, spot inputs are ignored. Also, no highlight input or shadow input is detected. That is, in the program shown in FIG. 32, by leaving the determination (M10)=0 as YES, the determinations I4=1 and I5=1 are ignored. Furthermore, the bar display blinks. Everything other than what has been mentioned above is the same as in spot auto mode. Note that the bar display will be explained in detail later.

Next, the case where the strobe is turned on in auto mode will be described. When the strobe power is turned on, the strobe power-on signal S14 goes to "H" level, so that the input port I1
3 becomes "1". Therefore, in the mode discrimination program shown in FIG. 28, the determination I13=1 is passed as YES, and the process branches to the strobe auto mode program shown in FIG. 33 through -. Here, first, a positive pulse is output to the output ports O0 to O3 to reset each corresponding flip-flop circuit of the interface. Next, transfer “1” to the memory hold detection flag M10,
The flag M10 is reset. Subsequently, the flash auto mode constant C30 is stored in the photographing mode detection flag M12. Next, (M31)=
C22 and (M13) = (M12) are determined, and it is determined whether the power has just been turned on or not, and whether the mode has just been switched. If it is, the display is reset. (See Figure 68). In this display reset, the "AUTO" segment, the fixed point indicator, and the "60" segment of the strobe synchronization time are displayed, respectively. This is because in the strobe auto mode, the deviation of the photometric value with respect to the strobe synchronization time of 1/60 seconds is displayed as a point in the bar display segment column. Next, Bv value storage area M0
The average Bv value BV1 is stored in the Sv-Av value storage area M1.
The Sv-Av value (SV-AV) is stored in the Cv value storage area M.
Store the Cv value CV in 2. continue,
When there is a correction due to the determination of (M2) = 0,
The "±" segment is displayed, and when there is no correction, the display of the "±" segment is erased. Next, by 1/4 {(M0) + (M1)} + (M2) + C100,
Find the deviation of the photometric value with respect to the shutter time of 1/60 second, and store it in the point display data storage area M.
Store in 4. Next, subroutine g {(M4)}
After the data (M4) is converted into display data by execution, this is displayed as a point in the segment column for bar display (see Fig. 68). here,
g{(M4)} is a subroutine for setting data outside the display data range to a limit value, and can be considered to be different from the above subroutine f{(M3)} only in limit set values C40 and C41. Therefore, the detailed flowchart of this subroutine g {(M4)} is as follows:
Illustrations and explanations will be omitted. Next, the display blinking period constant C35 is stored in the display blinking period storage area M23.
Store. This constant C35 is a constant for determining the cycle of blinking indications such as underexposure, overexposure, and appropriate exposure after auto flash photography. Next, the program moves to subroutine WAIT1 (see FIG. 39), and its execution begins. First, jump to subroutine WAIT2, create an interval according to constant C35, and then
The blinking display flag M22 is inverted and the process returns to subroutine WAIT1. Next, Flag M
22 is “1” or not, (M22)=
When the value is 1, a level determination and display program for displaying over, under, or proper is executed. First, input port I14 is “1”
If I14=1, it means overexposure, so a "+" segment is displayed (see FIG. 70) and the process returns. Further, when I14≠1, it is determined whether the input port I15 is "1". If I15=1, the exposure is underexposed, so display a "-" segment (see Figure 71) and then return; if I15≠1, the strobe is appropriate, so display the "▲" segment. and return. Then, in the next program flow, the sign of flag M22 is inverted in subroutine WAIT2, so (M22)=-
1, and the display of the "-" and "+" segments is erased. Furthermore, when I16=1, I16
If =1 is determined, the "▲" display is erased and the process returns. Above input ports I14, I15, I
16 is "1" only for about 2 seconds after the strobe fires, so during this time, depending on the flow of the program, it will be "-", "+", ", depending on the underexposure, overexposure, or appropriate exposure. The “▲” display blinks. Further, at times other than 2 seconds after the strobe light is emitted, only "▲" is displayed continuously. Subroutine WAIT1
When the program returns to the program shown in FIG. 33 after execution of , it is then determined whether or not the shutter release has been performed by determining I10=1. If it has not been released, the program returns directly to the mode determination program shown in FIG. Waiting for the trigger to be released due to a judgment of 0, the second
Return to the mode discrimination program shown in Figure 8.

Next, we will discuss manual mode. Now, if the manual mode is selected by setting the photographing mode switching operation knob 21 to the "MANUL" index, the manual switch _SW3 is closed and the input port I1 becomes "1". Therefore, in the mode discrimination program shown in FIG. 28, the determination of I0=1 is passed as NO, the determination of I1=1 is passed as YES, and the determination of I13=1 is entered.
Assuming that the strobe power is not turned on, I13=0, and then the level of the spot mode detection input port I2 is judged. Now, the spot mode is not selected either, and if the normal manual mode is selected, I2=0, so the program branches to the flowchart for the normal manual mode shown in FIG. 34 through -. Here, first, output port O9 is set to “1”.
Output. As a result, the trailing curtain holding magnet _MG1 is energized, and the trailing curtain enters the hold waiting state. Next, the normal manual mode constant C23 is stored in the photographing mode detection flag M12. Next, by determining (M13) = C22 and (M13) = (M12), it is determined whether the power has just been turned on or the mode has just been changed, and if the power has just been turned on or the mode has just been changed, the variables are reset and Reset the display. First, when resetting variables,
The address of the bar display start point is set in the bar display start address storage area M14. Next, in resetting the display, "MANU" and fixed point indicators (including "+" and "-" displays) are displayed (see FIG. 61). Subsequently, the content (M12) of the photographing mode detection flag M12 is transferred to the photographing mode detection flag M13. Next, the average Bv value BV1,
Store the Sv-Av value (SV-AV) and the Cv value CV, respectively.

Next, it is determined that (M2) = 0, and if a correction has been input, “±” is displayed (62nd
(see figure), “±” when no correction is input
Clear the display. Next, clear the manual setting seconds (M8) display. Note that this display may be cleared immediately before updating the display of the manual setting time (M8), which will be described later. Next, input the manually set seconds in binary code into area M8. Manually set seconds have a weight of LSB1Ev, so for the purpose of converting to a value of LSB1/3Ev for the following display,
Triple the contents (M8) and store it in area M8 again. Next, display the manually set seconds (M8). FIG. 61 shows a case where the manually set time is set to 1/60 second. In other words, DRAM corresponding to segments "1" to "2000" for displaying each shutter time.
There is a one-to-one correspondence between the address of the memory area 85 and the manually set seconds. Next, the standard exposure level (1/60 second shutter speed in Figure 61)
Calculation 1/ to obtain bar display data of deviation from
4 Perform {(M0)+(M1)}+(M2)-(M8)+C8,
Store this in area M3. Here, (M0)
is the average Bv value, (M1) is the Sv−Av value, (M2) is the Cv
The value (M8) is the manually set seconds, and C8 is a constant. Subsequently, subroutine h {(M3)} is executed to convert the calculated value (M3) into display data. Here, the subroutine h {(M3)} is a subroutine for limiting the deviation from the standard exposure level to within the display data range when it is outside the display data range, and the subroutine f {(M3)}
It can be considered that only the limit setting values C40 and C41 are different. Therefore, this subroutine h
The detailed flowchart of {(M3)} will be omitted from illustration and explanation. This subroutine h {(M3)} fixes the data (M3) to the limit value when the deviation (M3) from the standard exposure level is larger than a certain value, and fixes the data (M3) to the limit value when the deviation is smaller than the certain value. (M3)
to be fixed. That is, the bar display is performed within the range corresponding to the "+" and "-" segments shown in FIG. 61. Next, the presence or absence of the shutter release is determined by determining I10=1,
When the shutter release is not released, the deviation (M3)
After displaying the bar, the program returns to the mode determination program shown in FIG. 28 through -. When the shutter is released, the exposure control program shown in FIG. 29 is entered through -. Here, the timer counter is first set, and the value set in the counter is the manually set time stored in area M8. In this case, Z in the above equation (3) becomes "0", and the timer counter is set by the same calculation as in exposure control during spot auto. The flow of the program below is the same as in spot auto, so the explanation is omitted here.

Next, the case where spot input is performed in manual mode will be explained. When the spot input switch _SW8 is turned on in the manual mode and a spot input is performed, the spot mode detection input port I2 becomes "1".
Therefore, in the mode discrimination program shown in FIG. 28, the decision I2=1 branched toward the normal manual mode becomes YES, and then the decision (M13)=C20 is made. Now (M13)
=C20 indicates that the previous shooting mode was the spot auto mode, so in this case, a positive pulse is output to the output ports O0 and O1, and the flip-flop circuit for spot mode detection is activated.
G ₇ , G ₉ and spot input detection flip-flop circuits G ₁₁ , G ₁₂ are reset. As explained in the description of the spot auto mode, this is to prevent the camera from switching to the spot manual mode if the manual mode is directly selected from the spot auto mode. That is, when changing between the basic shooting modes between auto mode and manual mode, the simple auto mode or manual mode is always selected to prevent the camera from switching to spot mode after the change. After the positive pulses are output to the output ports O0 and O1, the mode is returned to the beginning of the mode discrimination program through -, and the mode discrimination is performed again. On the other hand, if the previous photographing mode was not the spot manual mode, the determination of (M13)=C20 is passed as NO, and the level of the input port I3 is then determined.
When the spot input switch SW ₈ is closed, the spot manual mode is selected and at the same time the flip-flop circuits G ₁₁ and G ₁₂ for spot input detection are also set, so that I3=1, and the spot input signal shown in FIG. Branch to a program with spot input in manual mode. Here, first, spot Bv is placed in the Bv value storage area M0.
Store the value BV2. Next, the spot manual mode constant is set in the shooting mode detection flag M12.
Store C24. Next, by determining (M13) = C22 and (M13) = (M12), whether it is immediately after the power is turned on or
It is determined whether the mode has just been switched, and if the power has been turned on or the mode has just been switched, the variables, display, and interface are reset. First, in resetting the display, "1" is stored in the overlap detection flag M5, highlight input detection flag M6, and shadow input detection flag M7, respectively. Next, the address of the start segment of the bar display is stored in the bar display start address storage area M14. Also, the spot input data number storage area M16 is reset by storing "0". Next, when resetting the display, “MANU”,
"SPOT" and fixed point indicators (including "+" and "-" displays) are displayed (see FIG. 63). Next, when resetting the interface,
Outputs positive pulses to output ports O2 and O3, flip-flop circuit for detecting highlight input G ₁₅ ,
_G16 and the flip-flop circuits _G19 and _G21 for detecting shadow input are reset.

Next, the content (M12) of the photographing mode detection flag M12 is transferred to the photographing mode detection flag M13. As a result, in the next flow of the same program, (M13) = (M12), so the variable,
Display and interface resets are not performed. Next, the spot input data number storage area M16 is incremented by one. Next, register MBN and area M1 with spot Bv.
Store the value (M0) and the Sv-Av value (SV-AV). Here, N of register MBN is a value corresponding to the number of spot inputs, that is, a value corresponding to the contents (M16) of area M16, and is "1" at the first spot input. Therefore, spot Bv values resulting from multiple spot inputs are stored in separate registers. Next, clear the manual setting seconds (M8) display. Next, the manual setting seconds data (I8) set in the input port I8 is stored in the area M8. Next, manually set seconds (M8)
Multiply the weight by 3, convert the weight, and store it in area M8 again. Then, the contents of area (M8) are displayed. FIG. 63 shows a case where the manually set time is set to 1/125 second.
Next, calculate the deviation 1/4 from the standard exposure level (1/125 second shutter speed in Figure 63).
Perform {(MBN)+(M1)}-(M8)+C8 and store this in register MTN. Here, N in register MTN is a value corresponding to the number of spot inputs, similar to N in register MBN.
Next, execute subroutine h {(MTN)},
After converting the deviation (MTN) to display data,
This is displayed as a point (see Figure 63).

Next, a bar is displayed based on the additive average value of the spot input values, but if (M6) = -1 or (M7) = -1 in highlight mode or shadow mode, the addition described below is performed. Jump directly to the program for canceling the spot input state (O1←〓) without calculating the average value. Right now, I'm not in highlight mode or shadow mode,
Since (M6) = 1 and (M7) = 1, next, the spot Bv value (MBn) that has been input so far (n = 1 to
The average value _N 〓 ⁿ⁼¹ (MBn)/N of N) is calculated and stored in area M3. Next, area M
2, store the Cv value CV, and if (M2)≠0, display “±” (see Figure 65), (M2) =
If it is 0, the "±" display is erased. Next, calculate the deviation of the exposure level obtained by the additive average value (M3) from the standard exposure level 1/4 {(M1) +
(M3+M2)}-(M8)+C8 and store this in area M3. Next, subroutine h
Execute {(M3)} to convert the calculated value (M3) to bar display data. Next, output port O1
A positive pulse is output to reset the spot input detection flip-flop circuits G ₁₁ and G ₁₂ to release the spot input state. Next, I10
Based on the judgment of =1, it is determined whether the shutter release is present or not, and if it is not released, the deviation (M3) is determined.
After displaying the bar (see Figure 64), -
The process returns to the mode discrimination program shown in FIG. If the camera has been released, the program branches to the exposure control program shown in FIG. 29 through -. Here, the manual setting time (M8) is set in the timer counter, and exposure control is performed based on this value. Then, after completing the execution of the program already mentioned, the 28th
Return to the mode determination program shown in the figure.

Next, assuming that the spot mode is not canceled and there is no spot input in the program flow from the second time onwards after selecting the spot mode, the I
2=1, I3=0, so in the mode discrimination program shown in FIG. 28, the judgment of I2=1 is YES, the judgment of I3=1 is NO, and through -, the spot manual mode shown in FIG. 36 is selected. Branches to a program without spot input. Here, first, in areas M1 and M2, Sv-
Input the Av value (SV-AV) and Cv value (CV) respectively. Next, make a determination that (M2) = 0,
If there is a correction, "±" is displayed, and if there is no correction, the "±" display is erased. Next, erase the manual setting seconds (M8) display. Next, after storing the manually set seconds data (I8) in area M8, the contents of area M8 (M8) are tripled and stored in area M8 again. Next, the manual setting seconds (M8) is displayed (see Figure 63). Subsequently, in order to change the spot input point display in accordance with the change in the Sv-Av value, the display of all spot input points (MTn) (n=1 to N) is temporarily erased. Next, calculate the deviation from the standard exposure level using each spot Bv value (MBn) (n = 1 to N) input as a spot 1/4 {(MBn) +
(M1)}-(M8)+C8 (n=1 to N) and store these in registers MTn (n=1 to N), respectively. Next, each deviation (MTn) (n=1~
By executing subroutine h{(MTn)} for N), these are converted into display data,
Store again in register MTn (n=1 to N). Next, each display data (MTn) (n=1~
Point display for each deviation is performed based on N). That is, the point display of the spot input is always changed so that the exposure level is constant. Next, by determining (M6) = -1 and (M7) = -1, it is determined whether the mode is highlight mode or shadow mode. If it is highlight mode or shadow mode, input the spot Bv value (M0←
Jump to BV2) program. If neither the highlight mode nor the shadow mode is selected, a program is then entered to display a bar for the standard exposure level including the Cv value for the average value of the spot Bv values input as spots. First, the spot Bv value (MBn) input as a spot
The additive average value _N 〓 ^{n=1 (MBn)/N of (n=1 to} N) is determined and stored in area M3. Then 1/4
{(M1) + (M3)} + (M2) - (M8) + C8 calculates the deviation of the standard exposure level from the average value of the spot Bv values input as spots,
Store this in area M3. Then the deviation (M3)
is converted into display data by executing subroutine h {(M3)}, and then the deviation (M3) is displayed as a bar.

Next, the spot Bv value BV2 is stored in area M0. This is done automatically without any spot input operation, and is the Bv value for displaying the deviation of the current photometry point. continue,
1/ between the previously input Sv-Av value (M1), manual setting seconds data (M8), and constant
4 Perform the calculation {(M0) + (M1)} - (M8) + C8,
Store this in area M4. Next, subroutine h {(M4)} is executed to convert the deviation (M4) into display data. Next, a program is executed to detect an overlap between the point display of the deviation of the current photometry point and the point display of the deviation based on the spot input. The point display of the deviation of the current photometry point and the point display of the deviation due to spot input use the same segment column for point display, as in the spot auto mode. When changing the point display, if it overlaps with the point display of deviation by spot input, that display must remain; if it does not overlap, it must be erased. The following program detects this overlap. First, it is determined that (M5) = 1, and if the overlap detection flag M5 is "1", this is the first program flow after changing to spot mode, so the deviation of the current photometry point is still displayed. There is no need to worry about overlapping. Therefore, jump directly to the program for transferring point display data (M4) to flag M5,
Store data (M4) in flag M5.
Thus, in the second and subsequent program flows, the display data of the deviation of the current photometry point determined in the previous program flow is stored in the flag M5. Therefore,
In the program flow from the second time onward, (M5) = 1
Pass the judgment with a no, and then enter the judgment of (M4) = (M5). When (M4) = (M5), it means that there is no change in the display of the deviation of the current photometry point, so a program for direct data transfer (M5←(M4)) is entered. Also, when (M4)≠(M5), it means that the display of the deviation of the current photometry point has changed, so next, the display data (M5) of the deviation of the current photometry point that is currently displayed will be changed according to the spot input. It is sequentially determined whether it is equal to any one of the deviation point display data (MTn) (n=1 to N). And if,
If (MTn) = (M5), display the data (M5) as a point, and (MTn) = (M5).
If there is no such thing, the data (M5) point display will be cleared. Subsequently, the new deviation (M4) of the current photometry point is transferred to flag M5.
Next, by determining I10=1, it is determined whether or not the shutter has been released. If the shutter has not been released, in order to display the deviation (M5) of the current photometry point in a blinking manner, the display blinking period constant C50 is transferred to the display blinking period storage area M23, and then the subroutine shown in Fig. 41 is executed. Execute WAIT3. The program flow of subroutine WAIT3 and the purpose of the blinking operation were described in detail in the spot auto mode, so they will not be repeated here. On the other hand, if the shutter is not released,
- jump to the exposure control program shown in FIG. 29, and after executing this program, -
The process returns to the mode determination program shown in FIG. 28.

When the execution of the above subroutine WAIT3 is completed, the program then executes the 37th subroutine through -.
Go to the flowchart for highlight mode or shadow mode as shown in the figure. Here, first, it is determined whether or not it is a highlight input by determining I4=1. Assuming that no highlight input has been made, I4=0, so the determination is passed as no, and next, based on the determination I5=1, it is determined whether or not it is a shadow input. Now, assuming that there is no shadow input, I5=0, so the determination is passed as no, and then it is determined whether the highlight input detection flag M6 is "-1". If (M6)≠-1, then it is determined whether the shadow input detection flag M7 is "-1". In highlight input or shadow input, input port I4 or I5 is set to "1", but this is immediately reset to "0" during the first program flow in highlight mode or shadow mode. Put it away.
Therefore, the highlight mode state or shadow mode state is stored and held in an internal flag called a highlight input detection flag M6 or a shadow input detection flag M7. Therefore, flags M6 and M7 are discriminated here. Now, if it is neither highlight mode nor shadow mode, (M6) = 1, (M7) =
1 and directly executes I10 without passing through the highlight mode and shadow mode processing programs.
=1 is reached, and it is determined whether or not the shutter is released. Assuming it is not released,
Since I10=0, through -, the 28th
Return to the mode determination program shown in the figure. Further, if it is assumed that the shutter release has been released, I10=1, so the program branches to the exposure control program shown in FIG. 29 through -. Here, manual setting seconds data (M8) is set in the timer counter, and exposure control is performed according to the contents of this timer counter. After the exposure is complete,
- to return to the mode discrimination program shown in FIG.

Next, the flow of the program when the highlight mode is selected in the spot manual mode will be explained. Assume that the program has progressed and the point display of the deviation of the current photometry point has been completed, reaching the point shown in FIG. 37. Then I4
=1, the level of input port I4 for detecting highlight input is determined. Assuming that this is the first program flow after selecting the highlight mode, I4 = 1, so the judgment is YES and "1" is stored in the highlight input detection flag M17. Ru. This flag M17 is a flag for detecting whether or not this is the first program flow after the highlight mode is selected. When this flag is "1", it means that this is the first program flow. shows. Next, a positive pulse is output from the output port O2, and the highlight input detection flip-flop circuits G ₁₅ and G ₁₆ are reset. continue,
The sign of the highlight input detection flag M6 is inverted. Now, after closing the shadow switch SW ₁₀ or without closing the highlight switch
If SW ₉ is closed an odd number of times, the flag M6 becomes "-1", the determination of (M6)=1 is passed as NO, and "HIGH" is then displayed. Also, if highlight switch SW ₉ is closed an even number of times, flag M6 becomes "1", and (M6) =
After the determination in step 1 is passed with a yes, the "HIGH" display is subsequently erased. After erasing this "HIGH" display, the program jumps to a program for resetting the highlight input immediately detection flag M17 (M17←0), which will be described later. Suppose now that highlight switch SW ₉ has been closed an odd number of times and a "HIGH" display is made. Next, spot input value (MBn) (n=1~
Find the highest brightness value MIN (MBn) of N),
This is stored in the brightness value storage area M9. next,
By determining (M17) = 1, it is determined whether or not this is the first program flow after selecting the highlight mode. When (M17) = 1, it is the first program flow, so the spot As described in the auto mode, first, a bar display of the deviation from the standard exposure level corresponding to the maximum brightness value MIN (MBn) is performed. For this reason, 1/4
{(M1)+(M9)}-(M8)+C9, MIN
The deviation from the standard exposure level corresponding to (MBn) is calculated and stored in area M3.
Then, the deviation (M3) is sent to subroutine h{(M3)}
After converting to bar display data by executing , this is displayed as a bar.

After that, the interval command is executed, and then 1/4 {(M1) + (M9)} + (M2) - (M8) + C9 + 7 corresponds to the maximum brightness value MIN (MBn) to 21/3 Ev minus side. The deviation from the standard exposure level is calculated and the result is stored in area M3.
Here, "7" added to the arithmetic expression is data corresponding to 21/3Ev. Next, execute the subroutine h {(M3)} to convert the deviation (M3) into display data, and then display it as a bar (66th
(see figure). Subsequently, the immediately after highlight input detection flag M17 is reset to "0". Next, the shadow input detection flag is reset to "1".
Then, it is determined whether or not the release has been performed by determining I10=1. If the release has not been performed, the program returns to the mode determination program shown in FIG. 28 through -, and if the release has been performed,
- returns to the exposure control program in FIG. After completing the exposure control program,
- to return to the mode discrimination program shown in FIG. In the flow of the program from the second time onwards in highlight mode, I4 = 0, so the judgment of I4 = 1 is passed as NO, and the program with "HIGH" display is passed through the judgment of (M6) = -1. Due to the determination of (M17) = 1, the deviation bar from the standard exposure level corresponding to the maximum brightness value MIN (MBn) is not displayed, and the maximum brightness value
Only the bar display of the deviation from the standard exposure level corresponding to 21/3 Ev minus MIN (MBn) is performed.

Next, the flow of the program when the shadow mode is selected in the spot manual mode will be described. It is now assumed that the flow of the program has progressed to the point display of the deviation of the current photometry point and has reached the point shown in FIG. 37. Then I4
= 1 judgment is passed with no, and I5 = 1 judgment,
A determination is made as to whether or not it is a shadow input.
Assuming that this is the first program flow after selecting the shadow mode, I5=1, so the determination is YES and "1" is stored in the shadow input detection flag M18. This flag M18 is a flag for detecting whether or not this is the first program flow after the shadow mode is selected. When this flag is "1", it indicates that this is the first program flow. . Next, a positive pulse is output to the output port O3 to reset the shadow input detection flip-flop circuits G ₁₉ and G ₂₁ . Subsequently, the sign of the shadow input detection flag M7 is inverted. Now, after or without closing highlight switch SW ₉ , switch the shadow switch.
If SW ₁₀ is closed an odd number of times, flag M7
becomes "-1", the determination of (M7)=1 is passed as no, and "SHDW" is then displayed (see FIG. 67). Also, Shadow Switch SW ₁₀
If the flag M7 is closed an even number of times, the flag M7 becomes "1", the determination of (M7)=1 is passed as YES, and the "SHDW" display is subsequently erased.
After erasing the "SHDW" display, the program jumps to a program for resetting the shadow input detection flag M18 (M18←0), which will be described later. Right now, shadow switch SW ₁₀ has been closed an odd number of times.
Assume that “SHDW” is displayed. Next, find the minimum brightness value MAX (MBn) among the spot input values (MBn) (n = 1 to N), and use the same method as in the highlight mode to calculate the minimum brightness value MAX.
A bar display of the deviation from the standard exposure level corresponding to (MBn) is performed. Also, the lowest brightness value
A bar display of the deviation from the standard exposure level corresponding to 22/3Ev plus more than MAX (MBn) is performed. In the flow of the program from the second time onward in shadow mode, since I5=0, the program with "SHDW" display is entered through the judgment of (M7) = -1, and the judgment of (M18) = 1. Therefore, the bar of the deviation from the standard exposure level corresponding to the minimum brightness value MAX (MBn) is not displayed, but only the bar of the deviation from the standard exposure level corresponding to 22/3Ev plus beyond the minimum brightness value MAX (MBn) is displayed. will be carried out.

Here, to summarize the program flow of the highlight mode or shadow mode in the spot manual mode described above, first, in mode selection, if the highlight command button 15 is pressed an odd number of times in succession, the highlight mode is selected. If the shadow command button 16 is pressed an odd number of times in succession, the shadow mode is selected. If pressed an even number of times in succession, any mode will be canceled. In addition, in the first flow after selecting the highlight mode, after displaying a bar of the deviation from the standard exposure level corresponding to the maximum brightness value of the spot input value, 22 /
Displays a bar of deviation from the standard exposure level corresponding to 3Ev minus side. In the second and subsequent consecutive flows, only the bar display of the deviation from the standard exposure level corresponding to 21/3Ev minus the maximum brightness value of the spot input value is performed.
In addition, in the first flow after selecting the shadow mode, after displaying a bar of the deviation from the standard exposure level corresponding to the lowest brightness value of the spot input value, 22 /
Displays a bar of deviation from the standard exposure level corresponding to 3Ev plus side. In the second and subsequent consecutive flows, only the bar display of the deviation from the standard exposure level corresponding to 22/3Ev plus more than the lowest luminance value of the spot input value is performed. When the highlight mode or shadow mode program finishes executing, it is then determined whether the shutter has been released. If the release has not been released, the process returns to the mode determination program.
If the shutter release has been released, the manual setting seconds (M8) is set in the timer counter, exposure control is performed according to the contents of the timer counter, and then the program returns to the mode discrimination program.

Next, a strobe photography program in manual mode will be explained. When the strobe is attached in manual mode and the strobe power is turned on, the input port I13 becomes "1". Therefore, in the mode discrimination program shown in FIG. 28, the determination of I13=1 becomes YES, and the program branches to the strobe manual mode program shown in FIG. 38 through -. Here, first, positive pulses are output to output ports O0 to O3, and flip-flop circuits G ₇ , G ₉ , G ₁₁ for spot mode detection, spot input detection, highlight input detection, and shadow input detection are output. , G ₁₂ , G ₁₅ ,
Reset G ₁₆ , G ₁₉ and G ₂₁ respectively. Next, the strobe manual mode constant C31 is stored in the photographing mode detection flag M12. Next, by determining (M13) = C22 and (M13) = (M12), it is determined whether the power has just been turned on or the mode has just been changed, and if the power has just been turned on or the mode has just been changed, the display is reset. Let's do it. In resetting this display, as shown in Fig. 73,
Displays “MANU” and fixed point indicators excluding “+” and “-”. It should be noted that the display of "〓" indicates the completion of strobe charging, and it was already mentioned in the electric circuit that this is displayed by light emission from the light emitting diode _D1 . If the power is not immediately turned on or the mode is not immediately changed, the display for the next manual setting seconds (M8) will be erased immediately without resetting the above display. Next, enter the manual setting seconds data (I8) in area M8. Next, triple the data (M8) and store it in area M8 again. Then, this manual setting seconds data (M8) is displayed. FIG. 73 shows a case where the manually set time is set to 1/30 second. Then, in each area M0, M1 and M2,
Average Bv value BV1, Sv−Av value (SV−AV) and
Enter the Cv value CV respectively. Then 1/4 {(M0)
+(M1)}+(M2)-(M8)+C8 to calculate the deviation from the standard exposure level, and then store this result in area M4. Next, by executing the subroutine h{(M4)}, the deviation (M4) is converted into bar display data, and then this is displayed as a point in the bar display segment column (see FIG. 73). Next, by determining I10=1, it is determined whether or not the camera is released. If it is not released, the program returns to the mode determination program shown in FIG. 28 through -, and if it is released, -
Through this, the program branches to the exposure control program shown in FIG. In the exposure control program,
Exposure is controlled based on the manual setting seconds (M8), and then the program returns to mode discrimination.

Next, the flow of the program in off mode will be explained. In off mode, it is neither auto mode nor manual mode, so I0≠1,
I1≠1, and in the mode determination program shown in FIG. 28, the determinations of I0=1 and I1=1 are passed as NO. Therefore, next, the entire display is erased, and then the shooting mode detection flag M
12, an off mode constant C22 is stored. Next, the memory hold detection flag M10 is reset to "1", and positive pulses are output to the output ports O0 to O3, respectively, for spot mode detection, spot input detection, highlight input detection, and shadow input detection. Each flip-flop circuit for G ₇ , G ₉ , G ₁₁ , G ₁₂ , G ₁₅ , G ₁₆ and
G ₁₉ and G ₂₁ are each reset. and,
Thereafter, the program returns to the beginning of the mode discrimination program through - and repeats the loop. All shutter control is performed by hardware using electrical circuits.

Next, a subroutine program for bar display shown in FIG. 44 will be explained. In this program, first, the level of input port I6 is determined. If the memory mode is selected, I6=1, and then M10=0 is determined. In memory mode,
When (M10)=1, memory is set, and when (M10)=0, memory is held. Assuming that the memory is currently set, "MEMO" will be displayed next. Next, by determining (M3) = C40,
It is determined whether the display data (M3) is underexposed data, and if yes, the start address (C40-1) is stored in the bar display start address storage area M14, and "LONG" is displayed. Return after doing so. If (M3)≠C40 and there is no underexposure, then constant C55 is stored in the start address storage area M14. Here, the constant C55 is a constant larger by 1 than the address of the bar display start point. By the way, the addresses of the DRAM 85 memory area corresponding to the bar display segment column and the "OVER" and "LONG" segments are as follows: If the "OVER" segment is set to address X, the leftmost segment corresponds to address X+1. The number increases by one as you move to the right. Therefore, the rightmost segment corresponds to address X+34, and the "LONG" segment corresponds to address X+35. The addresses of the memory areas of the DRAM 85 corresponding to the segment columns for point display are also the same, and if the segment corresponding to "OVER" is designated as address Y, then as you move to the right,
The address of the memory area of DRAM85 corresponding to the segment also increases by one address, and the address of the DRAM85 memory area corresponding to the rightmost "LONG"
The location of the memory area is address Y+35. After the constant C55 is stored in the area M14, 1 is subtracted from the address (M14), and the result is stored in the area M14 again. continue,
“1” is stored in the memory area at address (M14) of the DRAM 85. As a result, DRAM85
The segments that make up the bar display corresponding to the memory area at address (M14) are colored. next,
Based on the determination of (M14)=C41, it is determined whether the address (M14) is the address of the memory area of the DRAM 85 corresponding to the "OVER" segment,
If (M14)≠C41, then (M14) = (M3)
Based on this determination, it is determined whether or not the bar display has ended. When the bar display ends, the program returns, and when the bar display does not end, the address subtraction program (M14) ← (M14) - 1)
Return to , and colorize the next segment corresponding to the address (M14). On the other hand, if (M14) = C41, then the bar will be displayed up to the leftmost segment, so next, store the sum of the constant C41 in area M14 and display "OVER". Return later. To summarize the flow of the above program, the bar display is the bar display data (M3)
Colors will develop sequentially, starting from the right side, up to the segment corresponding to . However, since this program is executed instantaneously, the human eye perceives it as if the entire bar display were displayed at once.

Next, in the case of memory hold, M10=0
The determination becomes YES, and subsequently, the display blinking period constant C80 is stored in the display blinking period storage area M23. Next, the subroutine shown in FIG.
WAIT2 is executed, a predetermined delay time is created, and the blinking display flag M22 is inverted. Next, by determining (M22) = 1, it is determined whether it is a coloring cycle or an erasing cycle,
If it is the coloring cycle, the program starts running after the "MEMO" display above. If it is the erasing cycle, the "MEMO" display and the entire bar display are instantly erased, and then the process returns. In the next program flow of the bar display subroutine, the sign of flag M22 is reversed, so the erased “MEMO” display and bar display are colored, or the colored “MEMO” display and bar display are erased. By repeating this, “MEMO” and the entire bar display will become constant during memory hold.
It will be displayed blinking at the cycle determined by C80.

On the other hand, when not in memory mode, I6=0
Therefore, the judgment of I6=1 passes as no, and then,
By determining (M3)<(M14), it is determined whether the data to be displayed (M3) is smaller than the previously displayed data (M14). Assuming that the program flow is for the first bar display after changing the mode, area M14 has DRAM 85 corresponding to the bar display start segment in the initial setting.
The address of the memory area is stored. Therefore, normally (M3)<(M14), and "LONG" is then displayed. Next, 1 is subtracted from the address (M14), and the result is returned to the area.
Stored in M14. Subsequently, "1" is stored in the memory area at address (M14) of the DRAM 85, and as a result, the rightmost segment of the bar display segment row is colored. Next, after executing the interval command, bar display is performed up to the leftmost segment by the determination of (M14)=C41, and it is determined whether or not the "OVER" segment has been displayed. Here constant C41 is “OVER”
Indicates the address of the memory area of DRAM 85 corresponding to the segment. When (M14)≠C41, then it is determined whether or not the bar display has ended by determining (M14)=(M3). (M14)≠
(M3), subtract "1" from address (M14) again and store the result in area M14. Below, run the same program as mentioned above, (M14) =
When C41 is reached, "OVER" has been displayed, so the address (C14+1) of the memory area of the DRAM 85 corresponding to the bar display start segment for the next bar display is stored in area M14. At this time, it goes without saying that the bar display extends to the leftmost segment. Also, when (M4)≠C41, if (M14) = (M3), the bar display ends and the program goes directly to the following program. Here, to summarize the aspect of the bar display, in the first bar display after mode switching, the bar display starts from the rightmost segment and sequentially extends one segment at a time to a predetermined position.
The interval command is a delay command so that the movement of the bar display can be confirmed. In the next bar display, the bar display will start moving from the tip of the currently displayed bar display. Next, by determining (M3) = C41, it is determined whether the display data (M3) corresponds to overexposure, and if yes, the following program is executed to make the “OVER” display blink. Execute. First, the blinking period constant C70 is stored in the display blinking period storage area M23. Next, the subroutine WAIT2 shown in FIG. 40 is executed to create a predetermined delay time and to invert the sign of the blinking display flag M22. Subsequently, the contents of the flag M22 are determined, and when (M22)=1, "OVER" is displayed, and when M22≠1, the "OVER" display is cleared. The sign of flag M22 is inverted every time the program runs, so
The “OVER” display will blink. Also,
When (M3)≠C41, "OVER" is simply displayed continuously. After the above-mentioned "OVER" is displayed or erased, the program returns.

Next, the flow of the program when (M3)<(M14) is not satisfied will be explained. If (M3) < (M14), then it is determined whether the data to be displayed (M3) is larger than the previously displayed data (M14) by determining (M3) > (M14). Ru. If (M3)>(M14) is not satisfied, the data to be displayed is the same as the data displayed last time, so the process returns directly. Also, (M3)>
In the case of (M14), first, "0" is stored in the memory area at address (M14) of the DRAM 85, and the tip segment of the bar display is erased. Then, after executing the interval instruction, then,
(M14) = Based on the determination of C40, it is determined whether the rightmost segment of the bar display has been erased or not.
If (M14) = C40, DRAM 8 corresponding to the start segment of the next bar display is placed in area M14.
Store the memory area address 5 (C40-1) and exit to the subsequent program. Also, (M14)
If ≠C40, add "1" to the address (M14), store it in area M14, and update the address (M14). Next, by determining (M14) = (M3), it is determined whether the tip of the bar display has reached the position corresponding to the data (M3), and if (M14)≠(M3), it is determined again. Store "0" in the memory area at address (M14) of DRAM 85 and repeat the program described above. By executing the interval command, a predetermined delay time is created, and the display of the segments constituting the bar display is sequentially erased from the left end at a visible speed, and the predetermined bar display is performed. Next, by determining (M3) = C40, it is determined whether the display data (M3) corresponds to underexposure, and if it is underexposed, the “LONG” display will blink, otherwise “LONG” The display remains displayed continuously. This program is the same as that for overexposure, so detailed explanation thereof will be omitted. To summarize the bar display mode, area M14
corresponds to the segment at the tip of the bar display.
The address of the memory area of DRAM 85 is stored, and the bar display moves from its tip unless the mode is changed. Immediately after changing the mode, area M14 is initialized and bar display starts from the rightmost segment.

As described above, according to the present invention, the conventional problems mentioned at the beginning of the specification can be solved, various shooting modes can be selected with a simple operation, and the intention of the photographer can be fully reflected. It is possible to provide a camera that is extremely convenient to use.

[Brief explanation of drawings]

FIG. 1 is a front view of a camera showing an embodiment of the present invention, FIG. 2 is a plan view of the camera shown in FIG. 4 is a front view of the photometric light receiving device installed in the optical system shown in FIG. 3 above, and FIG. 5 is a side view of the main parts showing the optical system shown in FIG. FIG. 6 is a block diagram showing an outline of the configuration of the electric circuit installed in the camera shown in FIG. 6, and FIG. 7 is an electrical circuit diagram showing the interface around the microcomputer shown in FIG. 6 above, FIG. 8 is an electrical circuit diagram of the head amplifier circuit shown in FIG. 5 above, and FIG. 5 is an electric circuit diagram of the analog exposure information introduction circuit and the second selection circuit shown in FIG. 5, and FIG. 10 is an electric circuit diagram of the strobe over-under judgment circuit and the first comparison circuit shown in FIG. , FIG. 11 is an electric circuit diagram of the power supply hold circuit shown in FIG. 5, and FIG. 12 is an electric circuit diagram of the power supply hold circuit shown in FIG.
FIG. 13 is an electric circuit diagram of the trigger timing adjustment circuit shown in FIG. 5, FIG. 13 is an electric circuit diagram of the battery check circuit and power hold release circuit shown in FIG. 5, and FIG. Electrical circuit diagram of the strobe determination circuit shown in the figure, No. 15
16 is an electric circuit diagram of the first selection circuit, magnet drive circuit and strobe control circuit shown in FIG. 5 above, and FIG. 16 is an electric circuit diagram of the timer circuit shown in FIG. 5 above. Figure 17 is an electric circuit diagram of the D-A conversion circuit shown in Figure 5 above, and Figure 18
Figures a to i are time charts showing the waveforms of various timer signals output from the timer circuit shown in Fig.
FIG. 20 is a plan view showing the display segment electrodes and back electrodes of the liquid crystal display board forming the main body of the photographic information display device 39 shown in the figure.
FIGS. 19A and 19B are main part plan views showing the correspondence between the display segment electrodes and the back electrodes, and FIG. 21 is an electric circuit diagram of the liquid crystal drive circuit shown in FIG. FIG. 22 is an electrical circuit diagram of a main part showing the signal synthesis circuit shown in FIG. 21 above, and FIG. 23 is an electrical circuit diagram of a main part of a level conversion circuit to which the electrical circuit shown in FIG. 22 above is connected. , 24th
The figure is an electrical circuit diagram of the common signal output circuit in the liquid crystal drive circuit shown in Figure 6 above, and Figure 25a.
~m is a time chart showing the output waveforms of various signals in the liquid crystal drive circuit shown in FIGS. 21 to 24 above, and FIG. 26 is a diagram showing a method of counting shutter seconds in memory mode photography;
27 is a flowchart showing an overview of the program in the microcomputer shown in FIG. 6, and FIG. 28 is a flowchart showing details of the mode discrimination program in the flowchart shown in FIG. Figure 29 shows the second
A flowchart showing in detail the program of the average direct auto shooting mode in the flowchart shown in FIG. A detailed flowchart, FIG. 31, is a detailed flowchart for the spot auto shooting mode without spot input in the flowchart shown in FIG. A flowchart, FIG. 33, showing in detail the program for the highlight standard photography mode and the shadow standard photography mode, which is executed following the flowchart for the automatic photography mode without spot input, is shown in FIG. 27 above. 34 is a flowchart showing in detail the program for the strobe auto shooting mode in the flowchart shown above, and FIG. 35 is a flowchart showing the program for the normal manual shooting mode in detail in the flowchart shown in FIG. The figure shows the second
A detailed flowchart in the case of spot input in the spot manual shooting mode in the flowchart shown in FIG. 7, and FIG.
The detailed flowchart in the flowchart shown in Fig. 7 when spot input is not performed in the spot manual shooting mode is shown in Fig. 37.
FIG. 38 is a flowchart showing in detail the program for the highlight standard photography mode and the shadow standard photography mode, which is executed following the flowchart for the spot manual photography mode without spot input shown in FIG. 6. , above No. 27
39 is a flowchart showing in detail the program of the strobe manual shooting mode in the flowchart shown in the figure, and FIG. 39 is a subroutine executed in the flowchart shown in FIG. 33 above.
FIG. 40, a flowchart showing a detailed program of WAIT1, is a subroutine executed in the subroutine WAIT1 shown in FIG. 39 above, subroutine WAIT3 shown in FIG. 41 below, and the bar display subroutine shown in FIG.
FIG. 41 is a flowchart showing a detailed program of WAIT2, and FIG. 42 is a flowchart showing a detailed program of subroutine WAIT3, which is executed in the flowcharts shown in FIGS. 31 and 36 above. 43 is a flowchart showing a detailed program of a subroutine for counting actual exposure time executed in the flowchart shown in FIG. 29 above, and FIG. FIG. 44 is a flowchart showing a detailed program of the subroutine f{(M3)} executed in the second
Flowcharts showing detailed programs of subroutines for bar display executed in the flowcharts shown in FIGS. 8 to 38, and FIGS. 45 to 47 show the photographing information display device in the average direct auto shooting mode Fig. 45 shows the display mode of the Tv value when the bar is displayed within the display range, and Fig. 46 shows the case where the Tv value bar display exceeds the display range.
FIG. 47 shows the case where the bar display of the Tv value is below the display range, and FIGS. 48 to 50 each show the display mode of the shooting information display device in the spot auto shooting mode, Figure 48 shows the case where the bar display of the average Tv value is within the display range, and Figure 49 shows the case where the bar display of the average Tv value exceeds the display range.
Fig. 50 shows the case where correction has been added, and Figs. 51 to 54 each show the display mode of the shooting information display device when the highlight reference shooting mode is selected in the spot auto shooting mode. Fig. 51 shows the bar display of the average Tv value once extended to the position corresponding to the highest luminance value, and Fig. 52 shows the average Tv value from the state shown in Fig. 51.
The state in which the bar display of the Tv value has moved to the negative side by 21/3Ev, and Figure 53 shows the state in which the bar display of the average Tv value has been shifted by changing the Sv-Av value from the state shown in Figure 52. , Fig. 54 shows the state after correction has been added to the state shown in Fig. 53, and Fig. 55 and Fig. 56 show the shooting information display when the shadow reference shooting mode is selected in the spot auto shooting mode. Each display mode of the device is shown, and Fig. 55 shows a state in which the bar display of the average Tv value has temporarily returned to the position corresponding to the lowest luminance value;
Figure 56 shows the average Tv from the state shown in Figure 55.
Figures 57 to 59 respectively show the state in which the value bar display has moved to the positive side by 22/3Ev.
The figures show the display mode of the shooting information display device in the direct auto memory shooting mode. Fig. 57 shows the memory set state, Fig. 58 shows the memory hold state, and Fig. 59 shows the memory hold correction state. FIG. 60 shows the display mode of the shooting information display device in the spot auto memory shooting mode, and FIGS. 61 and 62 show the display mode of the shooting information display device in the normal manual shooting mode. 61 shows a state in which the bar display of deviation from the standard exposure level is displayed, and FIG. 62 shows a state in which the bar display of deviation from the standard exposure level has been corrected. 63 to 65 respectively show the display mode of the photographing information display device in the spot manual photographing mode, and FIG. 63 shows a bar display of the average of deviations from the standard exposure level. , FIG. 64 shows a state where a new spot input has been performed from the state shown in FIG. 63,
Fig. 65 shows the state shown in Fig. 64 after correction has been added, and Fig. 66 shows the display of the shooting information display device when the highlight reference shooting mode is selected in the spot manual shooting mode. FIG. 67 is a diagram showing the display mode of the photographing information display device when the shadow reference photographing mode is selected in the spot manual photographing mode;
FIGS. 68 to 72 respectively show the display mode of the shooting information display device in the flash auto shooting mode. FIG. , after the correction has been made from the state shown in Fig. 68, Fig. 70 shows the overexposed state after taking the picture, Fig. 71 shows the underexposed state after taking the picture, and Fig. 72 shows the after taken picture. FIG. 73, which shows the appropriate exposure state, is a diagram showing the display mode of the photographing information display device in the strobe manual photographing mode. 5...Aperture value setting ring, 7...Manual shutter speed setting ring, 10...Camera, 11...Shutter release button, 13...Memory command operation knob, 14...Spot input button, 15... Highlight command button, 16...Shadow command button, 18...Film sensitivity setting dial, 21...Operation knob for shooting mode switching, 22...Operation knob for exposure compensation, 3
9... Shooting information display device (shooting information display section), 4
1... Light receiving device for photometry, 50... Microcomputer (CPU), BV1... Brightness value by average photometry, BV2... Brightness value by spot photometry, CV...
...Correction value, D ₁ ...Light emitting diode for charging completion indication, H0~H2...Common signal, J0~J38...
…Segment drive signal, PD ₁ …Photovoltaic power element for average photometry, PD ₂ …Photovoltaic element for spot photometry, RE ₀ ~ _{RE 2} … Back electrode, SEG ₁ ~ _{SEG 101} …
...Segment (display area), SV-AV...Calculated value between film sensitivity value and aperture value, SW ₁ ...Release switch, SW ₂ ...Trigger switch, SW ₃ ...
Manual switch, SW ₄ ...Auto switch,
SW ₅ ……Battery check switch, SW ₆ ……
Memory switch, SW ₇ ...Clear switch,
SW ₈ : Spot input switch, SW ₉ : Highlight switch, SW ₁₀ : Shadow switch.

Claims (1)

[Scope of Claims] 1. A photometer for measuring subject brightness, an aperture value output means for outputting a preset aperture value, a film sensitivity value output means for outputting a film sensitivity value, and a flash photography mode selected. and a flash synchronization time setting means for setting the shutter speed to a constant flash synchronization time when the flash photography mode is selected.
An operation that calculates the exposure level from the strobe synchronization time, the photometered brightness value, the preset aperture value, and the film sensitivity value, and calculates the amount of deviation between this exposure level and the standard exposure level. A camera comprising: a display means for displaying the amount of deviation between the exposure level and a standard exposure level.