JPH0474427U - - Google Patents
Info
- Publication number
- JPH0474427U JPH0474427U JP11791390U JP11791390U JPH0474427U JP H0474427 U JPH0474427 U JP H0474427U JP 11791390 U JP11791390 U JP 11791390U JP 11791390 U JP11791390 U JP 11791390U JP H0474427 U JPH0474427 U JP H0474427U
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- plane
- rectangular parallelepiped
- terminal electrodes
- opposing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11791390U JPH0474427U (en:Method) | 1990-11-07 | 1990-11-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11791390U JPH0474427U (en:Method) | 1990-11-07 | 1990-11-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0474427U true JPH0474427U (en:Method) | 1992-06-30 |
Family
ID=31865809
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11791390U Pending JPH0474427U (en:Method) | 1990-11-07 | 1990-11-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0474427U (en:Method) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998025298A1 (fr) * | 1996-12-04 | 1998-06-11 | Seiko Epson Corporation | Dispositif a semiconducteur, procede de fabrication dudit dispositif, plaquette de circuit et materiel electronique |
| JP2005217445A (ja) * | 1996-12-04 | 2005-08-11 | Seiko Epson Corp | 半導体装置の製造方法 |
-
1990
- 1990-11-07 JP JP11791390U patent/JPH0474427U/ja active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998025298A1 (fr) * | 1996-12-04 | 1998-06-11 | Seiko Epson Corporation | Dispositif a semiconducteur, procede de fabrication dudit dispositif, plaquette de circuit et materiel electronique |
| US6608389B1 (en) | 1996-12-04 | 2003-08-19 | Seiko Epson Corporation | Semiconductor device with stress relieving layer comprising circuit board and electronic instrument |
| JP2005217445A (ja) * | 1996-12-04 | 2005-08-11 | Seiko Epson Corp | 半導体装置の製造方法 |
| US8384213B2 (en) | 1996-12-04 | 2013-02-26 | Seiko Epson Corporation | Semiconductor device, circuit board, and electronic instrument |