JPH0473257U - - Google Patents
Info
- Publication number
- JPH0473257U JPH0473257U JP11401490U JP11401490U JPH0473257U JP H0473257 U JPH0473257 U JP H0473257U JP 11401490 U JP11401490 U JP 11401490U JP 11401490 U JP11401490 U JP 11401490U JP H0473257 U JPH0473257 U JP H0473257U
- Authority
- JP
- Japan
- Prior art keywords
- electronic device
- data
- check
- verification
- verification check
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012795 verification Methods 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 5
Description
第1図はこの考案の機能ブロツク図、第2図〜
第9図は実施例を示し、第2図はPOSシステム
のシステム構成図、第3図はPOSシステムを構
成するPOSターミナルのブロツク構成図、第4
図はタイマ規定時間を求めるフローチヤート、第
5図はマスタECRの制定動作を示したフローチ
ヤート、第6図はスレーブECRにおいて電源オ
ンに伴つて実行されるフローチヤート、第7図は
マスタECRの全体動作を示したフローチヤート
、第8図はスレーブECRの全体動作を示したフ
ローチヤート、第9図は1ブロツク分のデータ指
定を示した図である。
11……CPU、12……ROM、15……印
字部、18……印字制御部、20……RAM、2
0−1……PLUフアイル、20−2……部門フ
アイル、M……マスタECR(M)、S1……ス
レーブECR(S1)、Sn……スレーブECR
(Sn)。
Figure 1 is a functional block diagram of this invention, Figure 2~
Fig. 9 shows an embodiment, Fig. 2 is a system configuration diagram of a POS system, Fig. 3 is a block diagram of a POS terminal constituting the POS system, and Fig. 4 is a block diagram of a POS terminal constituting the POS system.
The figure is a flowchart for determining the timer specified time, Figure 5 is a flowchart showing the establishment operation of the master ECR, Figure 6 is a flowchart executed when the power is turned on in the slave ECR, and Figure 7 is a flowchart of the master ECR. FIG. 8 is a flowchart showing the overall operation of the slave ECR, and FIG. 9 is a diagram showing data specification for one block. 11... CPU, 12... ROM, 15... Printing section, 18... Printing control section, 20... RAM, 2
0-1...PLU file, 20-2...Department file, M...Master ECR (M), S1...Slave ECR (S1), Sn...Slave ECR
(Sn).
Claims (1)
うデータ処理装置において、 所定の電子機器は自己が保有しているフアイル
と同一のフアイルが他の電子機器にも保有されて
いるか否かをチエツクする為のベリフアイチエツ
ク用のデータを送信する送信手段を有し、 前記ベリフアイチエツク用のデータを受信した
電子機器は当該データに基づいてベリフアイチエ
ツクを行つてそのチエツク結果を返送する返送手
段を有し、 前記チエツク結果を受けた電子機器は当該チエ
ツク結果を出力する出力手段を有することを特徴
とするデータ処理装置。[Scope of Claim for Utility Model Registration] In a data processing device that transmits and receives data to and from multiple electronic devices, a given electronic device must have the same file that it owns in another electronic device. The electronic device has a transmitting means for transmitting verification check data for checking whether or not the verification check is performed, and the electronic device that receives the verification check data performs a verification check based on the data. What is claimed is: 1. A data processing device comprising: a return means for returning a check result; and an electronic device that has received the check result has an output means for outputting the check result.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11401490U JPH0473257U (en) | 1990-11-01 | 1990-11-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11401490U JPH0473257U (en) | 1990-11-01 | 1990-11-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0473257U true JPH0473257U (en) | 1992-06-26 |
Family
ID=31861652
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11401490U Pending JPH0473257U (en) | 1990-11-01 | 1990-11-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0473257U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54152937A (en) * | 1978-05-24 | 1979-12-01 | Omron Tateisi Electronics Co | Set data change system of terminal device |
JPH0229891A (en) * | 1988-07-20 | 1990-01-31 | Tokyo Electric Co Ltd | Pos system |
JPH02112064A (en) * | 1988-10-21 | 1990-04-24 | Tokyo Electric Co Ltd | Pos system |
-
1990
- 1990-11-01 JP JP11401490U patent/JPH0473257U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54152937A (en) * | 1978-05-24 | 1979-12-01 | Omron Tateisi Electronics Co | Set data change system of terminal device |
JPH0229891A (en) * | 1988-07-20 | 1990-01-31 | Tokyo Electric Co Ltd | Pos system |
JPH02112064A (en) * | 1988-10-21 | 1990-04-24 | Tokyo Electric Co Ltd | Pos system |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA2189773A1 (en) | File transfer mechanism | |
JPH0473257U (en) | ||
EP0817038A3 (en) | Node to node interrupt mechanism in a multi-processor system | |
JPS6312287U (en) | ||
JPH0420157U (en) | ||
JPS6352330U (en) | ||
JPH0432723U (en) | ||
JPS62209644A (en) | Program loading system | |
JPH0255318U (en) | ||
JPS59142839U (en) | Program copy protection device | |
JPS6271755U (en) | ||
JPS62186540U (en) | ||
JPH0350202U (en) | ||
JPH01127034U (en) | ||
JPS623185U (en) | ||
JPS6266329U (en) | ||
JPH03124243U (en) | ||
JPS643231U (en) | ||
JPH0280854U (en) | ||
JPS63135439U (en) | ||
JPS6327988U (en) | ||
JPH01142070U (en) | ||
JPH0358052U (en) | ||
JPH0284455U (en) | ||
JPH01151354U (en) |