JPH0471136A - Semiconductor electron emitting element and its driving method - Google Patents

Abstract

PURPOSE:To efficiently perform analogous control of an emitted electron amount, including ON/OFF control, with high accuracy by regulating a width of a depletion layer formed by a PN junction. CONSTITUTION:A ring-like n<+> region 3 and a p<-> layer 2 form a PN junction. A reverse bias voltage is applied to the n<+> region 3 via an ohmic electrode 6, thus obtaining a depletion layer 9. A width of the depletion layer 9 can be regulated according to an applying voltage. The width is narrow under a low voltage, and an electron to a dot-like p<+> region 4 flows smoothly. As the applying voltage is increased, the depletion layer 9 is widened. A resistance value of a portion in the p<-> layer 2 where the electron can flow is increased, and a supplying amount of the electrons is decreased. Electron emitting amount is accordingly reduced. With a further increase in applying voltage, the depletion layer 9 is overlapped so that the supplying of the electron is stopped. On the basis of the above principle, if a voltage applied to the ohmic electrode 6 is controlled despite of a constant voltage applied to a Shottky electrode 8, the electron emitting amount can be adjusted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor electron-emitting device, and more particularly to a semiconductor electron-emitting device equipped with means for modulating emitted electrons and a method for driving the same.

[Conventional technology]

Among conventional semiconductor electron-emitting devices, one that uses avalanche amplification is, for example, U.S. Pat. No. 4,259,678.
and US Pat. No. 4,303,930.

This semiconductor electron-emitting device emits electrons by forming a P-type semiconductor layer and an N-type semiconductor layer on a semiconductor substrate, and depositing cesium or the like on the surface of the N-type semiconductor layer to lower the work function of the surface. By applying a reverse bias voltage to both ends of a diode formed by a P-type semiconductor layer and an N-type semiconductor layer and causing avalanche amplification, electrons are made hot, and the electrons are transferred from the electron-emitting region to the surface of the semiconductor substrate. It emits electrons in the direction perpendicular to .

Furthermore, in conventional semiconductor electron-emitting devices, the method for controlling the amount of emitted electrons is PN.
Those having an n-type guard ring around the junction to prevent leakage current are achieved by changing the element voltage within the range from the voltage at which avalanche amplification occurs to the withstand voltage of the guard ring.

In addition, in devices without a guard ring, if the device voltage is set too high, the device will be destroyed by Joule heat, so it is driven at a constant current, making it difficult to control the amount of electron emission.

[Problem to be solved by the invention]

However, the conventional semiconductor electron-emitting device described above has the following drawbacks because cesium used to form the electron-emitting portion is a chemically extremely active element.

■Ultra-high vacuum (10-10T o
r r or more).

■Life span, efficiency, etc. strongly depend on the degree of vacuum.

■The device cannot be exposed to the atmosphere.

Furthermore, in conventional semiconductor electron-emitting devices, the structure is such that electrons that have gained high energy through avalanche amplification pass through the N-type semiconductor layer and reach the surface of the electron-emitting region. There was also the drawback that it was lost due to lattice scattering within the layer. In order to suppress this energy loss, it is necessary to make the N-type semiconductor layer extremely thin (200 Å or less), but it is difficult to fabricate such an extremely thin N-type semiconductor layer with uniformity, high concentration, and low defects. Therefore, there was a problem in that it was difficult to stably manufacture the device.

Moreover, in the conventional method of controlling the amount of electron emission, the voltage applied to the element was changed in order to change the amount of avalanche amplification, which resulted in precise reproducibility and stability of the amount of electron emission. There was a lack of sex.

Therefore, the present invention solves the above-mentioned conventional problems, and provides a semiconductor electronic device that operates stably without an ultra-vacuum, has excellent lifespan and electron emission efficiency, and can efficiently control the amount of emitted electrons. The present invention provides an emitter and a method for driving a semiconductor electron emitter.

[Means to solve the problem]

The present invention, which achieves the above object, has a Schottky barrier electrode on a p-type semiconductor, and a p' region provided under the Schottky barrier electrode within the p-type semiconductor, and a region around the p-region. A semiconductor electron-emitting device characterized in that it has a Schottky barrier electrode on the p-type semiconductor, and the Schottky barrier electrode in the p-type semiconductor. The amount of emitted electrons is changed by changing the voltage applied to a region of a semiconductor electron-emitting device comprising a p1 region provided below, the p+ region, and an n+ region provided around the semiconductor electron-emitting device. This is a method for driving a semiconductor electron-emitting device.

Preferred embodiments of the semiconductor electron-emitting device of the present invention will be described below.

For example, as shown in FIGS. 1(a) and 1(b), the semiconductor electron-emitting device of the present invention is manufactured by first applying a shot onto a p-type semiconductor substrate (1 and 2 in FIG. 1(b)). key barrier electrode 8
A p4 region 4 is provided in contact with the Schottky barrier electrode 8 and inside the p-type semiconductor substrate (l and 2).
(referred to as dotted p+ regions) is formed. This p-type semiconductor substrate is, for example, 511Ge, GaAs, GaP,
AfAs, GaAsP, AnGaAs.

It is made of materials such as SiC and BP, and is especially indirect transition type.
A material with a large f/n gap is suitable. Figure 1 (b
), this p-type semiconductor substrate is a laminate consisting of a p+ layer 11p layer 2, which is doped with a suitable dopant. Further, the Schottky barrier electrode 8 is
For example, LaB, , BaB, , Cafe, 5rBa, Ce
It is made of a low work function material such as B, Y&, YB, etc., and by forming a Schottky junction with the point-like p' region parallel to the surface of the p-type semiconductor substrate, it is possible to (The depletion layer 9 and the electric field are formed parallel to the p-type semiconductor substrate surface. In other words, the electrons are aligned in a direction perpendicular to the electric field, that is, in a vector directed from the inside of the semiconductor to the outside. Therefore, the energy distribution of the electrons is Since the spread of the electron beam is small, the spread of the energy distribution of the emitted electrons is also small, and an electron beam that is advantageous for convergence etc. can be obtained.

The thickness of the Schottky barrier electrode may be thin enough to allow electrons generated within the depletion layer β of the Schottky junction to pass through during breakdown. The thickness is preferably 0.1 μm or less. That is, since the Schottky barrier electrode can be formed extremely thin by electron beam evaporation or the like, scattering of electrons when passing through the Schottky barrier electrode can be suppressed to a low level, and handling in the atmosphere is extremely easy.

The dotted p+ region is a region in which a portion of the surface of the p-type semiconductor substrate is doped in a concentration range such that the breakdown voltage is locally lower than in other portions. That is, by providing this dotted region 4, the depletion layer 4 is formed extremely thin in the region 4 during operation, which lowers the breakdown voltage locally (forms a portion with a low breakdown voltage) and allows the depletion layer 4 to be formed under a high electric field. can provide the energy necessary to make the electrons hot.

Further, it is preferable that the width of the dotted p+ region is 5 μm or less. This can prevent thermal destruction of the element due to current concentration.

Next, in the semiconductor electron-emitting device of the present invention, an n+ region 3 is formed around the dotted p+ region provided in the p-type semiconductor substrate. This n+ region 3 is a region for isolating the portion having a low breakdown voltage on the surface of the semiconductor substrate, and by forming the n+ region 3, a high electric field at the edge portion of the Schottky barrier electrode 8 is formed. It is possible to prevent leaks due to

Further, in the semiconductor electron-emitting device of the present invention, independent voltage application means 10S11 are attached to the Schottky barrier electrode 8, the n+ region, and the Schottky barrier electrode 8, respectively.

According to the present invention, the aforementioned depletion layer formed by the PN junction between the n+ region and the substrate can be spread around the I Schottky barrier electrode directly involved in electron emission by adjusting the n+ region and the applied voltage arbitrarily. By changing the value, it is possible to control the emission current value and to make electron emission 0N10FF.

The operating principle of the semiconductor electron-emitting device of the present invention will be explained below with reference to FIGS. 2(a) to 3(C) and FIG.

The ring-shaped n+ region 3 forms a PN junction with the p- layer 2, and by applying a reverse bias to the n4 region 3 via the ohmic electrode 6, a depletion layer 9 is formed. Depletion layer 9
The width of the p+ region can be controlled by the applied voltage, and is narrow under low voltage as shown in FIG. 2(a), and the flow of electrons to the dotted p+ region is smooth. However, as the applied voltage increases, the width of the depletion layer 9 increases, the resistance value of the part of the p-layer 2 through which electrons can flow increases, the amount of electrons supplied decreases, and accordingly, the amount of electrons emitted increases. decreases (Fig. 2(b)). When the applied voltage is further increased, the depletion layer 9 overlaps and the supply of electrons stops (FIG. 2(C)). Based on the above principle, even if the voltage applied to the Schottky electrode 8 is constant as described above, the amount of electron emission can be controlled by controlling the voltage applied to the ohmic electrode 6.

Next, the electron emission process in the semiconductor electron-emitting device of the present invention will be explained using FIG.

By applying a reverse bias to a Schottky diode made of a p-type semiconductor and a low work function material, the bottom of the conduction band of the p-type semiconductor becomes a higher energy level than the vacuum level of the Schottky electrode. Electrons generated by avalanche amplification gain energy higher than the lattice temperature due to the electric field in the depletion layer generated at the semiconductor-metal electrode interface, and are injected into the Schottky electrode made of a low work numerical aperture material.

Electrons that do not lose energy due to lattice scattering or the like and have energy greater than the work function of the Schottky electrode surface are emitted into vacuum from the Schottky electrode surface (ie, the electron emitting portion).

The semiconductor electron-emitting device and the driving method thereof of the present invention will be explained in more detail below using Examples.

Example 1 The semiconductor electron-emitting device shown in FIGS. 1(a) and 1(b) was manufactured according to the following procedures. That is, ■ impurity concentration is 5
X 10” cm-” Si-doped p” Ga
A p- layer 2 having a Zn concentration of 2×10 cm was grown on an As substrate 1 by MOCVD (metal-organic chemical vapor deposition).

■Next i: Using FIB (focused ion beam) implantation technology, Si ions are implanted into the ring-shaped n+ region 3 so that the impurity concentration is (I
The impurity concentration of Be ions is 2X10"cm-
” Ion implantation was performed for each, and the material was activated by annealing.

(2) Thereafter, S i 02 was vacuum-deposited as an insulating film 5 on the surface, and openings were formed by ordinary photolithography.

■On the ring-shaped n+ region 3 and on the back side of the substrate,
U/Cr and Au/Ge were vacuum deposited and heat treated to form an ohmic electrode 6.7.

■Furthermore, as a material for the Schottky electrode 8 compared to GaAs, LaBs (φ2,6
eV) was subjected to electron beam evaporation to form a Schottky electrode.

The semiconductor electron-emitting device produced in this way was 1×10
'Place it in a vacuum chamber maintained at Torr, and
0 causes reverse bias 5■, power supply 11 causes reverse bias 5
By applying v respectively, electron emission of about 1 nA was observed. Furthermore, as the reverse bias of the power source 11 was increased from 5 V, electron emission decreased, and by applying about 12 V, no electron emission was observed.

Example 2 The semiconductor electron-emitting device shown in FIGS. 4(a) and 4(b) was manufactured according to the following steps 1 to 2. That is, ■ the impurity concentration is I
CVD (Chemical Vapor Deposition) or LPE on As-doped p'Si substrate 21 of x 10"cm-"
(liquid phase epitaxial growth) method to increase the As concentration to I
A p-layer 22 of x 1016 cm= was grown.

■Next, using FIB (focused ion beam) implantation technology, the ring-shaped n+ region 23 is implanted at 300 KeV and 100 KeV.
By B ion implantation (two-stage implantation method) accelerated to KeV,
The impurity concentration was set to I x 10"cm-". Furthermore, the ring-shaped n+ region 24 is formed by B ion implantation accelerated to 150 KeV, so that the peak impurity concentration is 5.
X 1018 cm m-". In ion implantation, the concentration distribution of implanted ions in the depth direction usually shows a Gaussian distribution, so the concentration has a peak in the depth direction, and the concentration is higher than the peak near the surface and the value. In the deep region, the concentration is low.For this reason, in this device as well, ion implantation conditions were selected such that the ring-shaped n' region 24 exists at a position deeper than the surface.

■The dotted region 25 is doped with As ions at an impurity concentration of l×1.
Ion implantation was performed to obtain O1s, and each implanted region was activated by annealing.

(2) Thereafter, SiOx was vacuum-deposited as an insulating film 26 on the surface, and openings were formed by ordinary photolithography.

(2) Also, a contact hole 31 was formed in a part of the ring-shaped n1 region so as to make contact with the ohmic electrode 28 from the substrate surface.

■AI on the ring-shaped n+ region 23, 24 and the back side of the board! Ohmic electrode 27.28.2
9 was formed.

(2) Further, as a material for the Schottky electrode 30, Ga (φ-h#3.1eV), which is a low work function material, was vacuum-deposited by 100 people, and Ga Si2 was formed by heat treatment, and the dotted p" region 25 A high-quality Schottky junction was formed.

When a reverse bias of 6 V was applied to the power supplies 33 and 34 in the semiconductor electron-emitting device manufactured as described above, electron emission of 0.2 nA was observed.

Further, in the process of gradually increasing the voltage of the power supply 34 to 12V, electron emission decreased and was no longer observed at about 12V. The operating principle of this element is the same as that shown in Example 1, as shown in FIGS. 5(a) to (c), and the ring-shaped n
+ region 23 is a Schottky barrier diode,
It has the same function as a guard ring to prevent breakdown around the Schottky barrier under reverse bias, but in this device it also contributes to the concentration of the electric field in the dotted p+ region.

〔Effect of the invention〕

As explained in detail above, when manufacturing a Schottky electron source according to the present invention, the spread of the energy distribution of emitted electrons can be narrowed by forming a Schottky junction parallel to the semiconductor surface. By using a material with a small work function and being stable in the atmosphere for the Schottky electrode, it is possible to improve efficiency and make it easier to handle the atmosphere.Furthermore, by providing a guard ring in the n-type region at the Schottky junction, Efficiency is improved by preventing leaks occurring around the electrodes, and furthermore, by providing minute p+ regions to concentrate the current and making it minute, it is effective to prevent element destruction due to heat generation.

Moreover, in addition to the above-mentioned effects, the device of the present invention can control the amount of emitted electrons in an analog manner including 0N10FF control using a depletion layer formed by a PN junction separate from avalanche breakdown. By controlling the width of the area, it is possible to perform the process efficiently and precisely.

[Brief explanation of drawings]

1(a) and 1(b) are schematic configuration diagrams showing one embodiment of a semiconductor electron-emitting device of the present invention, FIG. 1(a) is a plan view thereof, and FIG. 1(b) is a first A sectional view taken along line A-A in Figure (a) is shown. FIGS. 2(a) to (C) are diagrams for explaining the operating principle of the semiconductor electron-emitting device of the present invention shown in FIGS. 1(a) and (b). FIG. 3 is a band diagram of the semiconductor electron-emitting device of the present invention. FIGS. 4(a) and 4(b) are schematic configuration diagrams showing other embodiments of the semiconductor electron-emitting device of the present invention, FIG. 4(a) is a plan view thereof, and FIG. 4(b) is a top view thereof. 4 shows a BB sectional view of FIG. 4(a). FIGS. 5(a) to 5(c) are diagrams showing the operating principle of the semiconductor electron-emitting device of the present invention shown in FIGS. 4(a) and 4(b). ■...p''' layer 2...p- layer 3.23.24...ring-shaped n+ region 4.25...
Dotted region 5.26... Insulating film 6.7.27.28.29... Ohmic electrode 8.3
0...Schottky barrier electrode 9.32...-depletion layer 10.11.33.34...power supply 31...contact hole

Claims (2)

[Claims] (1) Having a Schottky barrier electrode on the p-type semiconductor,
In the p-type semiconductor, a p^+ region provided under the Schottky barrier electrode and an n region provided around the p^+ region.
What is claimed is: 1. A semiconductor electron-emitting device having a Schottky barrier electrode and an n^+ region, wherein voltage application means are individually connected to the Schottky barrier electrode and the n^+ region. (2) having a Schottky barrier electrode on the p-type semiconductor,
In the p-type semiconductor, a p^+ region provided under the Schottky barrier electrode and an n region provided around the p^+ region.
A method for driving a semiconductor electron-emitting device having a ^+ region, the method comprising applying a voltage independently to the Schottky barrier electrode and the n^+ region, and applying a voltage to the n^+ region. A method for driving a semiconductor electron-emitting device, characterized in that the amount of emitted electrons is changed by changing a voltage.