JPH0463662U - - Google Patents
Info
- Publication number
- JPH0463662U JPH0463662U JP1990107055U JP10705590U JPH0463662U JP H0463662 U JPH0463662 U JP H0463662U JP 1990107055 U JP1990107055 U JP 1990107055U JP 10705590 U JP10705590 U JP 10705590U JP H0463662 U JPH0463662 U JP H0463662U
- Authority
- JP
- Japan
- Prior art keywords
- led chip
- lead frames
- potting
- frame
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004382 potting Methods 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims 3
- 229920005989 resin Polymers 0.000 claims 3
- 238000000465 moulding Methods 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Description
第1図は本考案の一実施例を説明するための図
面であつて、第1図aは第1図bのA−A線矢視
断面図、第1図bは平面図、第1図cは第1図b
の矢視B側面図、第1図dは第1図bの矢視C側
面図である。第2図aは第2図bのA−A線矢視
断面図、第2図bは平面図、第2図cは第2図b
の矢視B側面図、第2図dは第2図bの矢視C側
面図である。 1……リードフレーム、2……LEDチツプ、
3……ワイヤ、7……ポツテイング、8……発光
部、9……反射枠。
面であつて、第1図aは第1図bのA−A線矢視
断面図、第1図bは平面図、第1図cは第1図b
の矢視B側面図、第1図dは第1図bの矢視C側
面図である。第2図aは第2図bのA−A線矢視
断面図、第2図bは平面図、第2図cは第2図b
の矢視B側面図、第2図dは第2図bの矢視C側
面図である。 1……リードフレーム、2……LEDチツプ、
3……ワイヤ、7……ポツテイング、8……発光
部、9……反射枠。
Claims (1)
- インサート成型によつて成型物である樹脂製の
反射枠と一体形成された1対以上のリードフレー
ムと、各対のリードフレームの内の一方のリード
フレームの端部に取り付けたLEDチツプと、こ
のLEDチツプと他方のリードフレームを接続し
たワイヤと、前記LEDチツプおよびワイヤを封
止した透明な樹脂製のポツテイングと、インサー
ト成型によつて前記反射枠、全てのリードフレー
ムの端部近辺および全てのポツテイングを一体封
止するように形成された透光性の樹脂製の発光部
とを具備したことを特徴とするLED表示器。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990107055U JPH0463662U (ja) | 1990-10-11 | 1990-10-11 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990107055U JPH0463662U (ja) | 1990-10-11 | 1990-10-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0463662U true JPH0463662U (ja) | 1992-05-29 |
Family
ID=31853384
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990107055U Pending JPH0463662U (ja) | 1990-10-11 | 1990-10-11 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0463662U (ja) |
-
1990
- 1990-10-11 JP JP1990107055U patent/JPH0463662U/ja active Pending