JPH0463251U - - Google Patents

Info

Publication number
JPH0463251U
JPH0463251U JP10516390U JP10516390U JPH0463251U JP H0463251 U JPH0463251 U JP H0463251U JP 10516390 U JP10516390 U JP 10516390U JP 10516390 U JP10516390 U JP 10516390U JP H0463251 U JPH0463251 U JP H0463251U
Authority
JP
Japan
Prior art keywords
led
output
shift register
latch circuits
latch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10516390U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10516390U priority Critical patent/JPH0463251U/ja
Publication of JPH0463251U publication Critical patent/JPH0463251U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
  • Dot-Matrix Printers And Others (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例のLEDプリンタヘ
ツドを示す構成図、第2図は本考案のLEDプリ
ンタヘツドの動作タイミングを示す図、第3図は
従来のLEDプリンタヘツドを示す構成図、第4
図はBPWMを説明する図、第5図は従来のLE
Dプリンタヘツドの動作タイミングを示す図であ
る。 1……シフトレジスタ、2〜5……ラツチ、6
……スイツチ、7……LEDドライバ、8……L
EDアレイ。
FIG. 1 is a block diagram showing an LED printer head according to an embodiment of the present invention, FIG. 2 is a diagram showing the operation timing of the LED printer head of the present invention, and FIG. 3 is a block diagram showing a conventional LED printer head. Fourth
The figure is a diagram explaining BPWM, and Figure 5 is the conventional LE
FIG. 3 is a diagram showing the operation timing of the D printer head. 1...Shift register, 2-5...Latch, 6
...Switch, 7...LED driver, 8...L
ED array.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] LED素子を複数個並べたLEDアレイと前記
LED素子の点灯を決める情報を記憶するシフト
レジスタと前記シフトレジスタの出力をラツチす
るラツチ回路と前記LEDアレイの発光時間を制
御するLEDドライバとを有するLEDプリンタ
ヘツドにおいて、前記ラツチ回路を複数備え前記
複数のラツチ回路の出力から一つの出力を選択し
その出力を前記LEDドライバに供給するスイツ
チ回路を具備することを特徴とするLEDプリン
タヘツド。
An LED comprising an LED array in which a plurality of LED elements are arranged, a shift register that stores information that determines lighting of the LED elements, a latch circuit that latches the output of the shift register, and an LED driver that controls the light emission time of the LED array. An LED printer head comprising a plurality of the latch circuits, and a switch circuit that selects one output from the outputs of the plurality of latch circuits and supplies the output to the LED driver.
JP10516390U 1990-10-05 1990-10-05 Pending JPH0463251U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10516390U JPH0463251U (en) 1990-10-05 1990-10-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10516390U JPH0463251U (en) 1990-10-05 1990-10-05

Publications (1)

Publication Number Publication Date
JPH0463251U true JPH0463251U (en) 1992-05-29

Family

ID=31850753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10516390U Pending JPH0463251U (en) 1990-10-05 1990-10-05

Country Status (1)

Country Link
JP (1) JPH0463251U (en)

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