JPH0463004A - Amplifier circuit - Google Patents

Amplifier circuit

Info

Publication number
JPH0463004A
JPH0463004A JP2174190A JP17419090A JPH0463004A JP H0463004 A JPH0463004 A JP H0463004A JP 2174190 A JP2174190 A JP 2174190A JP 17419090 A JP17419090 A JP 17419090A JP H0463004 A JPH0463004 A JP H0463004A
Authority
JP
Japan
Prior art keywords
operational amplifiers
output
resistors
input
feedback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2174190A
Other languages
Japanese (ja)
Inventor
Teruo Inuzuka
犬塚 輝雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2174190A priority Critical patent/JPH0463004A/en
Publication of JPH0463004A publication Critical patent/JPH0463004A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain an amplifier circuit with driving capacity on which the driving capacity of an individual amplifier is added by connecting the input of the amplifier circuit comprised of plural operational amplifiers to which the same feedback is applied mutually, connecting the output mutually via resistors, and taking out an output terminal from the intermediate point of those resistors. CONSTITUTION:The operational amplifiers OP1, OP2 to which full feedback is applied comprise a voltage-follower. The input are connected mutually, and are connected to an input terminal IN1. The output are connected to the output terminal VO1 via the resistors R1, R2. Since the operational amplifiers OP1, OP2 are provided with input offset voltages actually, potential difference equivalent to the difference of the input offset voltages is generated as the output of the operational amplifiers OP1, OP2. The output resistance of the operational amplifiers OP1, OP2 are low in an ordinary state, and also the full feedback is applied to them, therefore, the output resistance goes down further by the function of the feedback. By inserting the resistors R1, R2 to an output circuit, only a current DELTAVI0/(R1+R2) flows between the operational amplifiers OP1 and OP2 for the input offset voltage difference DELTAVI0 of the operational amplifiers OP1, OP2.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、増幅回路に関し、特に、演算増幅器から構成
される増幅回路に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an amplifier circuit, and more particularly to an amplifier circuit composed of an operational amplifier.

従来の技術 従来、演算増幅器は、第3図に示す例のように帰還をか
けて単体で使用され、その駆動能力に応じた出力電流が
得られ、駆動能力以上の電流を必要とする場合には、出
力バッファを付ける等の処置がとられていた。
2. Description of the Related Art Conventionally, an operational amplifier has been used alone with feedback as shown in the example shown in Figure 3, and an output current corresponding to its driving capacity can be obtained. measures such as adding an output buffer were taken.

発明が解決しようとする課題 しかしながら、この様な場合、出力バッファがB駆動作
の場合には、クロスオーバー歪を生ずるし、又AB8駆
動の場合には、バイアス回路に大きな靜消費電力を生じ
る等の欠点があった。
Problems to be Solved by the Invention However, in such a case, if the output buffer operates in B drive operation, crossover distortion will occur, and if in AB8 drive operation, a large amount of power consumption will occur in the bias circuit. There was a drawback.

本発明は従来の上記実情に鑑みてなされたものであり、
従って本発明の目的は、従来の技術に内在する上記諸欠
点を解消することを可能とした新規な増幅回路を提供す
ることにある。
The present invention has been made in view of the above-mentioned conventional situation,
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a novel amplifier circuit which makes it possible to eliminate the above-mentioned disadvantages inherent in the conventional technology.

課題を解決するための手段 上記目的を達成する為に、本発明に係る増幅回路は、同
一帰還を施された複数個の演算増幅器から構成される増
幅回路であって、入力が相互に接続され、出力が抵抗を
介して相互に接続され、それらの抵抗の中間点から出力
端子が取り出されることを特徴としている。
Means for Solving the Problems In order to achieve the above object, an amplifier circuit according to the present invention is an amplifier circuit composed of a plurality of operational amplifiers that are given the same feedback, and whose inputs are connected to each other. , the outputs are connected to each other via resistors, and the output terminal is taken out from the midpoint between those resistors.

実施例 次に本発明をその好ましい各実施例について図面を参照
して具体的に説明する。
EXAMPLES Next, preferred embodiments of the present invention will be specifically explained with reference to the drawings.

第1図は本発明に係る増幅回路の一実施例を示す回路構
成図である。
FIG. 1 is a circuit diagram showing an embodiment of an amplifier circuit according to the present invention.

第1図において、演算増幅器OPI 、O20は共に全
帰還が施されていて、ポルチージオロワを構成している
。入力は相互に接続されていて入力端子INIに接続さ
れている。出力は抵抗R1、R2を介して出力端子VO
Iに接続されている。演算増幅器OPI及びO20は実
際には入力オフセット電圧を持っているために、演算増
幅器OPI 、O20の出力は入力オフセット電圧の差
に相当する電位差を生ずる。演算増幅器OPIとO20
の出力抵抗は通常低く、又全帰還を施されているために
帰還の作用により、更に出力抵抗は下がる。−例として
は典型的な例として、演算増幅器OP1及びO20の出
力抵抗は100Ω、利得は1 、000とすると、帰還
の作用により出力抵抗は100Ω/1,000 =0.
1Ωとなる。
In FIG. 1, operational amplifiers OPI and O20 are both provided with full feedback and constitute a portige lower. The inputs are interconnected and connected to an input terminal INI. The output is sent to the output terminal VO via resistors R1 and R2.
Connected to I. Since operational amplifiers OPI and O20 actually have input offset voltages, the outputs of operational amplifiers OPI and O20 produce a potential difference corresponding to the difference in input offset voltages. Operational amplifier OPI and O20
Normally, the output resistance is low, and since full feedback is provided, the output resistance further decreases due to the feedback action. - As a typical example, if the output resistance of operational amplifiers OP1 and O20 is 100Ω and the gain is 1,000, then the output resistance due to feedback is 100Ω/1,000 = 0.
It becomes 1Ω.

入力オフセット電圧の差を10mVとすると、出力を抵
抗R1、R2無しで直接接続することにより10mV1
0.1Ω= 100mAの電流が演算増幅器OPIとO
20の間に流れようとする。実際には演算増幅器OPI
とO20の駆動能力によってその電流は制限を受けるが
、大きな無駄な電流が流れる。出力回路に抵抗R1及び
R2を挿入することにより、演算増幅器OPIとO20
の入力オフセット電圧差ΔVIOに対し、Δ■+o/ 
(R1+R2)の電流が演算増幅器OPIとO20の開
に流れるにすぎない。入力オフセット電圧差ΔV+o=
 10mJ R1+R2= 200Ωとすると、10m
V/200Ω−0,5mAに抑えられる。抵抗を入れる
事による駆動能力の低下は小さい。
If the difference in input offset voltage is 10mV, by directly connecting the output without resistors R1 and R2, it will be 10mV1.
0.1Ω = 100mA current flows through operational amplifiers OPI and O
Trying to flow between 20 and 20. Actually operational amplifier OPI
Although the current is limited by the driving ability of O20 and O20, a large amount of wasted current flows. By inserting resistors R1 and R2 in the output circuit, operational amplifiers OPI and O20
For the input offset voltage difference ΔVIO, Δ■+o/
Only a current of (R1+R2) flows across operational amplifiers OPI and O20. Input offset voltage difference ΔV+o=
10mJ If R1+R2=200Ω, 10m
V/200Ω-0.5mA. The drop in driving ability due to the addition of a resistor is small.

第2図は本発明の第2の実施例を示す回路構成図である
FIG. 2 is a circuit configuration diagram showing a second embodiment of the present invention.

第2図を参照するに、この第2の実施例においては演算
増幅器OP3 、OF2は抵抗で帰還が施されており、
反転又は非反転増幅器を構成している。
Referring to FIG. 2, in this second embodiment, operational amplifiers OP3 and OF2 are provided with feedback using resistors.
It constitutes an inverting or non-inverting amplifier.

発明の詳細 な説明したように、本発明の増幅回路によれば、個々の
増幅器の駆動能力を加えた駆動能力をもつ増幅回路を得
ることが出来る。
As described in detail, according to the amplifier circuit of the present invention, it is possible to obtain an amplifier circuit having a driving capability that is the sum of the driving capabilities of individual amplifiers.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による第1の実施例を示す回路構成図、
第2図は本発明による第2の実施例を示す回路構成図、
第3図、第4図は従来技術による回路図である。 OPI〜opoは演算増幅器、R1−R8は抵抗、IN
1〜■N5は入力端子、■01〜v04は出力端子、T
rlTr2はトランジスタ
FIG. 1 is a circuit configuration diagram showing a first embodiment of the present invention;
FIG. 2 is a circuit configuration diagram showing a second embodiment according to the present invention;
3 and 4 are circuit diagrams according to the prior art. OPI~opo are operational amplifiers, R1-R8 are resistors, IN
1 to ■N5 are input terminals, ■01 to v04 are output terminals, T
rlTr2 is a transistor

Claims (1)

【特許請求の範囲】[Claims]  同一帰還を施された複数個の演算増幅器から構成され
る増幅回路であって、入力が相互に接続され、出力が抵
抗を介して相互に接続され、これらの抵抗の接続点から
出力端子が取り出されることを特徴とする増幅回路。
An amplifier circuit consisting of multiple operational amplifiers with the same feedback, whose inputs are connected to each other, whose outputs are connected to each other via resistors, and whose output terminal is taken out from the connection point of these resistors. An amplifier circuit characterized by:
JP2174190A 1990-06-29 1990-06-29 Amplifier circuit Pending JPH0463004A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2174190A JPH0463004A (en) 1990-06-29 1990-06-29 Amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2174190A JPH0463004A (en) 1990-06-29 1990-06-29 Amplifier circuit

Publications (1)

Publication Number Publication Date
JPH0463004A true JPH0463004A (en) 1992-02-28

Family

ID=15974299

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2174190A Pending JPH0463004A (en) 1990-06-29 1990-06-29 Amplifier circuit

Country Status (1)

Country Link
JP (1) JPH0463004A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006087870A1 (en) * 2005-02-17 2006-08-24 Rohm Co., Ltd Audio signal amplifying circuit and electronic device using the same
JP2008003037A (en) * 2006-06-26 2008-01-10 Yokogawa Electric Corp Ic tester

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006087870A1 (en) * 2005-02-17 2006-08-24 Rohm Co., Ltd Audio signal amplifying circuit and electronic device using the same
JP2008003037A (en) * 2006-06-26 2008-01-10 Yokogawa Electric Corp Ic tester

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