JPH045889A - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JPH045889A
JPH045889A JP10716490A JP10716490A JPH045889A JP H045889 A JPH045889 A JP H045889A JP 10716490 A JP10716490 A JP 10716490A JP 10716490 A JP10716490 A JP 10716490A JP H045889 A JPH045889 A JP H045889A
Authority
JP
Japan
Prior art keywords
plating
layer
layers
accuracy
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10716490A
Other languages
Japanese (ja)
Inventor
Takashi Kawashima
川島 孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP10716490A priority Critical patent/JPH045889A/en
Publication of JPH045889A publication Critical patent/JPH045889A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the increase of conductor thickness due to plating, and to improve the accuracy of the formation of circuits and the printing accuracy of a solder resist by previously forming a viscous non-plating substance layer on the surface of a metallic foil before the plating treatment of the inwall section of a through-hole. CONSTITUTION:Viscous non-plating layers 4 are disposed on the surfaces of the metallic foils 2 of a metal-clad laminated board 3 composed of a multilayer-board base material layer 1 and the metallic foils 2 as outermost surfaces. Layers consisting of a substance, on which electroless plating does not adhere, and capable of being simply removed after the plating treatment of the inwall section of a through-hole are used as the layers 4 at that time. The through-hole 5 is formed at the specified position of the board 3, and an electroless plating layer 6 and an electroless plating layer 7 are formed. Joining corner sections 8 are exposed by removing the layers 4, and plating treatment is executed, thus acquiring a printed wiring board 10, on which thin plating layers 9 are shaped, then forming circuits 11 having patterns required. The thickness of the layers 9 is brought to half or less of conventional devices, thus preventing the increase of conductor thickness, then improving the accuracy of the formation of circuits and the accuracy of the printing, etc., of a solder resist.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、プリント配線基板に関するものである。さ
らに詳しくは、この発明は、メッキ処理による導体厚み
の増加を防ぎ、回路形成精度およびソルダーレジスト印
刷精度を向上させることのできる改良されたプリント配
線基板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a printed wiring board. More specifically, the present invention relates to an improved printed wiring board that can prevent increase in conductor thickness due to plating treatment and improve circuit formation accuracy and solder resist printing accuracy.

(従来の技術) 近年、電気・電子機器、通信機器、あるいは計算機器等
に広く用いられているプリント配線板に関しては、その
回路のファイン化への要請の高まりにともなって、回路
形成法の高度化がさらに強く求められている。
(Prior art) In recent years, with the increasing demand for finer circuits for printed wiring boards, which are widely used in electrical and electronic equipment, communication equipment, computing equipment, etc., advanced circuit formation methods have been developed. There is a strong need for further improvement.

このようなプリント配線板の回路形成については、その
精度を規定する要因のひとつとして金属張積層板のスル
ホールメッキ処理時の導体厚みの増大の問題かあること
が知られている。
Regarding circuit formation on such printed wiring boards, it is known that one of the factors that determines the accuracy is the problem of increase in conductor thickness during through-hole plating of metal-clad laminates.

従来、このプリント配線板用の基板としては、たとえば
第2図に示したように、樹脂含浸基材、あるいは樹脂フ
ィルム等から形成した基材層(ア)の最外表面に、また
は、この基材層(ア)の内部に内層回路を埋め込んだ多
層板基材層の最外表面に金属箔(イ)を配設した金属張
積層板(つ)に穴明は加工してスルホール(1)を形成
し、次いでこのスルホール(1)内壁面を無電解メッキ
および電解メッキによってメッキ層(オ)を形成した後
に所定のパターンの回路(力)を形成しなものが用いら
れてきている。
Conventionally, as a substrate for this printed wiring board, as shown in FIG. A through hole (1) is formed by processing a metal-clad laminate (2) in which a metal foil (B) is placed on the outermost surface of a multilayer board base material layer in which an inner circuit is embedded inside the material layer (A). A plated layer (e) is formed on the inner wall surface of the through hole (1) by electroless plating and electrolytic plating, and then a predetermined pattern of circuits (forces) is formed.

この際の穴明は加工とメッキ処理について、その精度を
向上させるための様々な工夫がなされてきてもいる。
Various efforts have been made to improve the accuracy of drilling and plating.

(発明が解決しようとする課題) しかしながら、従来のプリント配線板の製造方法におい
ては、第2図の工程略図からもわかるように、金属箔(
イ)からなる金属表面導体部がスルホール穴明は加工後
のメッキ処理により厚くなるため、エツチング工程にお
いて形成される回路の幅やアンダーカット等を所定のも
のとすることが誼しく、また、形成された回路が厚くな
るためソルダーレジスト塗布工程においてインクのにじ
みやかすれが生じゃずいという問題が避けられなかった
(Problem to be Solved by the Invention) However, in the conventional printed wiring board manufacturing method, as can be seen from the process diagram in FIG.
(a) Since the metal surface conductor part consisting of through-hole holes becomes thicker due to the plating treatment after processing, it is difficult to set the width and undercut of the circuit formed in the etching process to a specified value. As the printed circuit becomes thicker, the problem of ink bleeding and blurring during the solder resist coating process cannot be avoided.

そこで、この発明は、以上の通りの従来のプリント配線
基板の製造におけるスルホール穴明は加工後のメッキ処
理工程にともなう欠点を解消し、メッキによる導体厚み
の増大を防ぎ、回路形成精度およびソルダーレジスト印
刷精度を向上させることのできる改善されたプリント配
線基板とその製造方法を提供することを目的としている
Therefore, this invention eliminates the drawbacks of through-hole drilling in the conventional manufacturing of printed wiring boards as described above due to the plating process after processing, prevents increase in conductor thickness due to plating, and improves circuit formation accuracy and solder resist. It is an object of the present invention to provide an improved printed wiring board that can improve printing accuracy and a method for manufacturing the same.

(課題を解決するための手段) この発明は、上記の課題を解決するものとして、金属張
積層板の金属箔表面層に粘性非メッキ層を設け、穴明は
加工後にメッキ処理してスルポール内壁部にメッキ層を
形成し、粘性非メッキ層を除去してさらに薄いメッキ層
を形成してなることを特徴とするプリント配線基板を提
供する。
(Means for Solving the Problems) The present invention solves the above problems by providing a viscous non-plated layer on the metal foil surface layer of a metal-clad laminate, and plating the holes after processing to form a hole on the inner wall of the Sulpore. To provide a printed wiring board characterized in that a plated layer is formed on a portion, and a thinner plated layer is formed by removing a viscous non-plated layer.

(作 用) この発明においては、スルホール内壁部のメッキ処理に
先立って、予め金属箔表面に粘性の非メッキ物質層を形
成しておくため、このメッキ処理によっても金属箔導体
へのメッキ付着がないため、その厚みが増大しない。ま
た、内壁部のメッキ処理後に、この非メッキ層を除去し
、スルホールコーナ一部の導通信頼性を向上させるため
に薄いメッキ層を形成するが、この薄いメッキ層は、従
来の導体表面へのメッキ層付着の172以下の厚みでよ
いため、その後のエツチングによる回路形成やソルダー
レジスト塗布の精度は従来の場合に比べて著しく向上す
る。
(Function) In this invention, since a viscous non-plating substance layer is formed on the surface of the metal foil in advance before plating the inner wall of the through-hole, this plating process also prevents the plating from adhering to the metal foil conductor. Therefore, its thickness does not increase. In addition, after plating the inner wall, this non-plated layer is removed and a thin plating layer is formed in order to improve the continuity reliability of a part of the through-hole corner. Since the thickness of the plating layer deposited is 172 mm or less, the accuracy of circuit formation by subsequent etching and solder resist coating is significantly improved compared to the conventional case.

(実施例) 以下、図面に沿ってこの発明のプリント配線基板につい
て説明する。
(Example) Hereinafter, a printed wiring board of the present invention will be explained along with the drawings.

添付した図面の第1図は、この発明のプリント配線基板
の製造工程の要部を示したものである。
FIG. 1 of the attached drawings shows the main part of the manufacturing process of the printed wiring board of the present invention.

(a)  まず、たとえば樹脂含浸ガラス基材、あるい
は樹脂フィルム等を所定枚数積層した基材層、もしくは
、さらに内層回路を組込んだ多層板基材層(1)と最外
表面の金属箔(2)とからなる金属張積層板(3)の金
属箔(2)表面に、粘性非メッキ層(4)を配設する。
(a) First, for example, a base material layer made by laminating a predetermined number of resin-impregnated glass base materials, resin films, etc., or a multilayer board base material layer (1) further incorporating an inner layer circuit, and a metal foil on the outermost surface ( A viscous non-plated layer (4) is provided on the surface of the metal foil (2) of the metal-clad laminate (3) consisting of (2) and (3).

この際の金属張積層板(3)の構成については特段の限
定はなく、ガラスシート、ガラスマット、紙等の基材に
不飽和ポリエステル、エポキシ、フェノール、ポリイミ
ド等の樹脂を含浸させて形成したプリプレグや、これら
の樹脂のシートを所定枚数用いて加熱加圧成形し、銅、
アルミニウム、ステンレス等の金属箔を最外層に配設し
たものなどの適宜なものが用いられる。
There is no particular limitation on the structure of the metal-clad laminate (3) at this time, and it is formed by impregnating a base material such as a glass sheet, glass mat, or paper with a resin such as unsaturated polyester, epoxy, phenol, or polyimide. A predetermined number of sheets of prepreg or these resins are heated and pressed to form copper,
An appropriate material may be used, such as one in which a metal foil such as aluminum or stainless steel is disposed on the outermost layer.

最外表面の金属箔(2)に配設する非メツキ層(4)と
しては、無電解メッキが付着しない物質によって構成さ
れたものとし、スルホール穴内壁部のメッキ処理後に簡
便に除去できるものを好適なものとして使用する。この
非メッキ層(4)としては、たとえばワックス、オリゴ
マー等の粘性物質を例示することができる。これらの物
質は、粘性付着状態、半硬化あるいは硬化状態で非メッ
キ層(4)を形成してもよい。また、この非メッキ層(
4)は、ロール、ドクターブレード、その他の適宜な手
段で塗布配設することができる。
The non-plated layer (4) provided on the metal foil (2) on the outermost surface shall be made of a material to which electroless plating does not adhere, and which can be easily removed after the plating treatment of the inner wall of the through-hole hole. Use as appropriate. Examples of this non-plated layer (4) include viscous substances such as wax and oligomers. These substances may form the non-plated layer (4) in a viscous adhesive state, semi-hardened state or hardened state. In addition, this non-plated layer (
4) can be applied and disposed using a roll, a doctor blade, or other appropriate means.

その厚みにも特段の限定はない。ごく薄い状態で充分に
その役割を果たすことができる。
There is no particular limit to its thickness. It can fulfill its role in a very thin state.

(b)  次いで、この非メッキ層(4)を表面に配設
した金属張積層板(3)の所定の位置にスルホール穴明
は加工を行い、スルホール(5)を形成する。ドリル加
工、パンチ加工等の手段によって、所定の大きさのスル
ホール(5)を形成する。
(b) Next, through-hole drilling is performed at predetermined positions of the metal-clad laminate (3) on which the non-plated layer (4) is disposed, to form through-holes (5). A through hole (5) of a predetermined size is formed by means such as drilling or punching.

(c)  スルホール(5)には、まず無電解メッキを
施し、無電解メッキ層(6)を形成し、さらに所定の厚
みになるように、必要に応じて電解メッキを施して電解
メッキ層(7)を形成する。
(c) The through holes (5) are first subjected to electroless plating to form an electroless plating layer (6), and further electrolytic plating is applied as needed to a predetermined thickness to form an electrolytic plating layer (6). 7).

この時、表面金属箔(2)には、非メッキ層(4)を配
設しているため、この非メッキ層(4)の存在によって
表面にはメッキ層(6)(7)は全く付着しない。
At this time, since the non-plated layer (4) is provided on the surface metal foil (2), the plated layers (6) and (7) are not attached to the surface at all due to the presence of this non-plated layer (4). do not.

メッキ処理条件も、通常の方法と同様のものとすること
ができる。
The plating treatment conditions can also be similar to those of a normal method.

(d)  メッキ処理の後に、上記の表面部の非メッキ
層(4)を除去する。これは、非メッキ層(4)として
簡便に塗布および除去できるものを用いて形成すること
から、単純なふきとりゃ研磨等の手段によって除去する
ことができる。
(d) After plating, remove the non-plated layer (4) on the surface. Since this is formed using a material that can be easily applied and removed as the non-plated layer (4), it can be removed by simple means such as wiping or polishing.

ワックスを用いる場合には、ふきとりによってほぼ完全
に除去することができる。
When wax is used, it can be almost completely removed by wiping.

なお、必要に応じて、洗浄を行ってもよい。Note that cleaning may be performed if necessary.

この非メッキ層(4)の除去によって、スルホール(5
)と表面金属箔(2)との接合コーナ一部く8)はシャ
ープに露出する。
By removing this non-plated layer (4), the through holes (5
) and the surface metal foil (2) (8) are sharply exposed.

(e)  そこで、このコーナ一部(8)の導通信頼性
を向上させるために、メッキ処理を施して薄いメッキ層
(9)を形成する。
(e) Therefore, in order to improve the conduction reliability of this corner part (8), plating is performed to form a thin plating layer (9).

−船釣には、この薄いメッキ層(9)の厚みは、従来の
172以下で充分である。すでにスルホール(5)の内
壁部にはメッキ層(6)(7)が形成されているなめ、
極めて薄い層で充分である。
- For boat fishing, it is sufficient that the thickness of this thin plating layer (9) is less than the conventional thickness of 172 mm. Since the plating layers (6) and (7) are already formed on the inner wall of the through hole (5),
A very thin layer is sufficient.

<f)  このようにして形成されたスルホールメッキ
処理プリント配線基板(10)は、従来より知られてい
るエツチング等の手段によって、所要パターンの回路(
11)を形成することができる。
<f) The through-hole plating printed wiring board (10) thus formed is etched with a desired pattern of circuits (
11) can be formed.

この回路形成工程において、上記<a)〜(e)によっ
て実現された導体厚みの抑制が、回路形成精度、ソルダ
ーレジストインク印刷の精度を向上させる。レジストイ
ンク印刷時のインクのにじみや、かすれの発生は全くな
い。
In this circuit forming step, the suppression of the conductor thickness achieved by the above steps <a) to (e) improves the accuracy of circuit formation and the accuracy of solder resist ink printing. There is no ink bleeding or blurring when printing with resist ink.

たとえば以上の1程に沿って、銅張積層板より、非メッ
キ層(4)としてワックスを用いてスルホール穴明は加
工および穴内壁部のメッキ処理を行い、銀箔導体層のメ
ッキによる厚み増大を抑え、回路形成、およびソルダー
レジスト印刷の精度を従来法の場合に比べて著しく向上
させることができた。
For example, in accordance with step 1 above, through-hole drilling is performed using wax as the non-plated layer (4) from a copper-clad laminate, and the inner wall of the hole is plated, and the thickness is increased by plating the silver foil conductor layer. The precision of solder resist printing, circuit formation, and solder resist printing could be significantly improved compared to conventional methods.

(発明の効果) 以上詳しく説明した通り、この発明のプリント配線基板
によって、メッキ処理にる導体厚みの増大を抑え、その
後のエツチング等による回路形成およびソルダーレジス
ト印刷等の精度を従来に比べて大きく向上させることが
できる。
(Effects of the Invention) As explained in detail above, the printed wiring board of the present invention suppresses the increase in conductor thickness caused by plating, and improves the accuracy of circuit formation by etching, etc., and solder resist printing, etc., compared to conventional methods. can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明のプリント配線基板の製造工程の要部
を示した工程断面図である。 第2図は、従来工程を示した工程断面図である。 1・・・基  材  層 2・・・金  属  箔 3・・・金属張積層板 4・・・非 メ ッ キ 層 5・・・スルホール 6・・・無電解メッキ層 7・・・電解メッキ層 8・・・コーナ一部 9・・・薄いメッキ層 10・・・プリント配線基板 11・・・回    路
FIG. 1 is a cross-sectional view showing a main part of the manufacturing process of a printed wiring board according to the present invention. FIG. 2 is a process sectional view showing a conventional process. 1... Base material layer 2... Metal foil 3... Metal clad laminate 4... Non-plated layer 5... Through hole 6... Electroless plating layer 7... Electrolytic plating Layer 8...Corner part 9...Thin plating layer 10...Printed wiring board 11...Circuit

Claims (1)

【特許請求の範囲】[Claims] (1)金属張積層板の金属箔表面層に粘性非メッキ層を
設け、穴明け加工後にメッキ処理してスルホール内壁部
にメッキ層を形成し、粘性非メッキ層を除去してさらに
薄いメッキ層を形成してなることを特徴とするプリント
配線基板。
(1) A viscous non-plated layer is provided on the metal foil surface layer of the metal-clad laminate, and after drilling, a plating treatment is performed to form a plating layer on the inner wall of the through-hole, and the viscous non-plated layer is removed to create an even thinner plated layer. A printed wiring board characterized by forming.
JP10716490A 1990-04-23 1990-04-23 Printed wiring board Pending JPH045889A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10716490A JPH045889A (en) 1990-04-23 1990-04-23 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10716490A JPH045889A (en) 1990-04-23 1990-04-23 Printed wiring board

Publications (1)

Publication Number Publication Date
JPH045889A true JPH045889A (en) 1992-01-09

Family

ID=14452111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10716490A Pending JPH045889A (en) 1990-04-23 1990-04-23 Printed wiring board

Country Status (1)

Country Link
JP (1) JPH045889A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990084722A (en) * 1998-05-11 1999-12-06 최충호 Manufacturing method of double sided circuit board
CN104105334A (en) * 2013-04-12 2014-10-15 安普泰科电子韩国有限公司 PCB and manufacturing method thereof
CN104620683A (en) * 2012-04-05 2015-05-13 安普泰科电子韩国有限公司 Printed circuit board and a method for fabricating the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990084722A (en) * 1998-05-11 1999-12-06 최충호 Manufacturing method of double sided circuit board
CN104620683A (en) * 2012-04-05 2015-05-13 安普泰科电子韩国有限公司 Printed circuit board and a method for fabricating the same
CN104105334A (en) * 2013-04-12 2014-10-15 安普泰科电子韩国有限公司 PCB and manufacturing method thereof

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