JPH04574A - Image processor - Google Patents

Abstract

PURPOSE:To reproduce an image constituted so that one picture element corresponds to one bit as an image constituted so that one picture element corresponds to plural bits by switching the data of a low resolution image memory and that of a background image memory in accordance with the data of a high resolution image memory. CONSTITUTION:A binary image memory 15 stores binary image data constituted so that one picture element corresponds to one bit and a color image memory 16 stores color image constituted so that one picture element corresponds to 24 bits. The image data of the memories 15, 16 are correspondingly read out by a reading control circuit 17. On the other hand, a background color register 22 stores image data for uniformly regulating a background. The data of the memory 16 and the register 22 are switched by a selector 20 in accordance with individual image data stored in the memory 15.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an image processing apparatus, and more particularly to an image processing apparatus that processes and outputs a color image.

[Prior Art] Conventionally, an image memory for a color image in an image processing device that handles color images, especially a relatively inexpensive device, has an image memory for color images as shown in FIG. It has various configurations. In other words, it consisted of an image memory 201 composed of one pixel and one bit, an area designation register 203, a color designation register 202, and a color designation circuit 204.

A relatively expensive device is constructed as shown in FIG. 17 so that limited colors specified by the palette can be used over the entire image area. For example, if the number of colors that can be output is 16, 1
For example, the image memory 205 has 4 bits of pixels and 40 bits of pixels.
It consisted of a color palette 206 that selects 16 colors from 96 colors.

[Problems to be Solved by the Invention] However, the conventional example shown in FIG. 16 has the following drawbacks because the color is specified for each area.

(1) The number of areas that can be specified is limited.

(2) Multiple colors cannot be mixed within an area.

(3) Cannot be used for figures or natural images.

Further, the conventional example shown in FIG. 17 has the following drawbacks.

(1) Memory usage is large (for example, paper size A3.
If the resolution is 400 dpi, 1 pixel is 4 bits, then 16
(M bytes, 32 M bits if 1 pixel is 8 bits).

(2) Due to the limited colors, the image quality is low for natural images.

The present invention has been made in view of such prior art, and includes:
The present invention aims to provide an image processing device capable of reproducing a high-resolution image expressed by one bit per pixel as an image corresponding to a plurality of bits per pixel.

[Means for Solving the Problem] In order to solve this problem, the present invention includes the configuration shown below. That is, a first storage means for storing an image made up of pixel data corresponding to one bit per pixel at a first resolution, and pixel data corresponding to multiple bits per pixel at a second resolution lower than the first resolution. a second storage means for storing an image consisting of;
readout control means for reading out image data in association with each other from the first storage means and the second storage means; background image data storage means for storing image data that uniquely defines a background of the image data; switching means for switching between the corresponding pixel data of the second storage means and the background image data stored in the background image data storage means according to the state of each pixel data stored in the storage means; .

In the configuration of the present invention, the switching means
Depending on the state of each pixel data stored in the first storage means, the corresponding pixel data in the second storage means and the background image data stored in the background image data storage means are switched.

[Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1. Description of Configuration> FIG. 1 is a block diagram of an image processing apparatus according to an embodiment, and FIGS. 2 to 4 are diagrams showing details of a part thereof.

In Figure 1, 1 is a CPU that controls the entire device, 2 is a main memory that temporarily stores programs etc. and is used as a work area, and 3 is a communication interface (hereinafter referred to as communication I/F) for connecting to a LAN. , 4 is a keyboard for inputting character codes, etc., 5 is a pointing device for instructing the position of a cursor on the display screen, and 6 is an input device interface (hereinafter referred to as input device) for controlling input devices such as the keyboard 4 and pointing device 5. Engineering/F)
It is. 7 is a system bus for transmitting addresses, data, control signals, etc., 8 is a CRT display (hereinafter referred to as CRT) as a display device, 9 is a video RAM (hereinafter referred to as VRAM) for developing images for display on the CRT 8, and 10 is a floppy disk drive. (hereinafter referred to as FD), 11 is a hard disk drive (hereinafter referred to as HD), 12 is FDIO and HDI
Disk interface (hereinafter referred to as DISK-
13 is an image control unit which is a feature of this embodiment, and 14 is an output device such as a printer.

The image control unit 13 in the embodiment is designated by the reference numeral 1 shown below.
It consists of 5 to 24 components.

15 is composed of 1 pixel and 1 bit, and has a resolution of 400 dpi.
Binary image memory (hereinafter referred to as binary IMEM) stores (deploys) binary image data of
EM), 17 is binary IMEM15 and color IMEM16
a readout control circuit for reading out data in association with each other; 18;
is binary image data of binary IMEM15 (resolution 40
0 dpi), and 19 is a color designation circuit that performs color designation on the binary image data of the binary IMEM 15 in accordance with the color image data of the color IMEM 16 (100 dpi resolution). , 20 is a selector that selects the output data of the contour designation circuit 18 and the output data of the color designation circuit 19 according to an instruction signal from a mode control circuit, which will be described later, and 21 is a lookup table (hereinafter referred to as LUT) that performs color correction, etc. It is.

FIG. 2 is a block diagram showing in detail the configuration of the contour specifying circuit 18 of FIG. 1. 31a to 31d are shift registers (hereinafter referred to as SR) which input binary image data in units of 4 bits and serially output the data.

32a to 32p are flip-flops (hereinafter referred to as FF) that each latch 1-bit pixel data, and these constitute a 4×4 pixel matrix. 33 is 4×
A contour specification table ROM containing table information for specifying contours according to the pattern of the pixel matrix 4, a main scanning counter 34 that performs a counter in the main scanning direction of the 4 x 4 pixel matrix, and 35 a sub-scanning counter of the 4 x 4 pixel matrix. This is a sub-scanning counter that counts directions. Also,
36a to 36i are flip-flops (hereinafter referred to as 24-bit FFs) that each latch 24 bits of data, and these 3x
3 pixel matrices are constructed. 37 is a selector that selects and outputs color image data of a 3×3 pixel matrix according to the designation of the contour designation table ROM 33.

FIG. 3 is a block diagram showing details of the configuration of the color specifying circuit 19 of FIG. 1. In the figure, 41 is a selector for selecting color image data and background color data according to the state of the binary image data.

Figure 4 shows the background color register 22 and mode control L/L in Figure 1.
2 is a block diagram showing in detail the configurations of a register 23 and a mode control circuit 24. FIG.

In the figure, 51 to 62 are a group of registers forming the mode control register 23, which store address information of the window shown in FIG. 15(C). 51 is shown in Figure 15 (C
), the X13 register specifies the start address in the X coordinate of window 1, and 52 indicates the end address in the X coordinate of window 1. Register 53 is a Y+s register indicating the start address of the X coordinate of window 1, and 54 is a YIE register indicating the end address of window 1's X coordinate. Similarly, 55 to 58 are registers (X 2+11 X 2!: I Y 21+1
59 to 62 are registers (X, Ill, X as+ Y BS+ Y
BE register).

Further, 63 and 64 are registers forming the background color register 22. 63 is a background color register that stores background color l data that defines the background color of the entire sheet; 64 is a background color 2 register that stores background color 2 data that defines the background color within the background color window.

65 to 89 are components of the mode control circuit 24.

65 is an X address counter that counts addresses in the X direction, 66 is a Y address counter that counts addresses in the Y direction, and 67 to 78 are the outputs of the register groups 51 to 62 and the X address counter 65 or Y address counter 6.
Comparators 79 to 84 compare with the output of J-
is a flip-flop (hereinafter referred to as JK-FF), 85 to 87 are AND circuits (hereinafter referred to as AND), and 88 is an OR circuit (hereinafter referred to as OR circuit).
), 89 are the background color register 63 and the background color 2 register 64
This is a selector that selects the output of .

<Description of Operation> The operation of this embodiment having the above configuration will be explained using FIGS. 5 to 15.

FIG. 5(A) shows the storage format of binary image data in the binary IMEM 15 of FIG. 1, and FIG.
It shows the storage format of color image data within the MEM 16.

In FIG. 5(A), 91 is binary image data developed according to the output paper size, and binary IMEM15
They are stored consecutively from the binary start address within. Therefore, adding the addresses of the data portions of one line in the main scanning direction results in the same digit data of the next line. The address of this one line of data is hereinafter referred to as a binary offset.

Further, in FIG. 5(B), 92 is color image data developed to match the output paper size, and 93 is reference pixel color image data obtained by adding one surrounding pixel to the reference pixel for the contour designation circuit 18. It is. Note that this reference pixel normally contains white data. The reference pixel color image data 93 is stored consecutively from the reference pixel start address in the color IMEM 16. For this reason, adding the addresses of data essential for one line in the main scanning direction results in the same digit data of the next line. Hereinafter, this address will be referred to as a color offset. Since the color image data 92 is a portion of the reference pixel color image data 93 with one surrounding pixel removed, the top address is the color start address shown in the figure. 2@Image data 91
By reading the synchronization from the binary start address and the color image data from the color start address, the two types of image data can be read out in association with each other. 2 is a diagram showing the correspondence relationship between the binary image data in the binary IMEM 15 and the color image data in the color IMEM 16 in FIG. 1. FIG.

In FIG. 6 (AC), 94 indicates one pixel of binary image data (resolution 400 dpi), and 95 indicates a 4×4 pixel matrix in which this pixel is assembled.

96 in FIG. 6(B) is color image data (resolution 1
00 dpi), and corresponds to the 4×4 pixel block 95 in FIG. 6(A).

Next, using FIGS. 7 to 9, the read control circuit 17
Binary image data and color IMEM in value IMEM15
The operation of reading out the color image data in EMI6 in association with it will be explained.

Incidentally, FIG. 7 is a free chart for explaining the operation of reading for the contour designation circuit 18 among the operations of the readout control circuit 17.

In the figure, steps 81 to S13 show the processing procedure for reading out color image data, and step S14
~Step S25 shows a processing procedure for reading binary image data. The two processing steps are step S6 and step S15. Synchronization is achieved in steps S19 and S7, and the binary image data and color image data are read out in association with each other.The processing procedure will be described in detail below.

As described later, the contour specifying circuit 18 needs one surrounding pixel as a reference pixel, so it is necessary to read from the reference pixel start address shown in the 5i''QJ (B).For this reason, 1
．． In step S1, a reference pixel start address is set to prepare for reading. Next, in the 5-step S2 subroutine, 2× pixels of 2 pixels in the main scanning direction and 3 pixels in the sub-scanning direction are
Three pixels are read out, and preparation for reading out one line of color image data is completed. Steps 83 to S5 are processing procedures for reading out one pixel in the main scanning direction and three pixels in the Mil scanning direction. In step S3, one pixel is read out, and in step S4 it is determined whether three lines have been read out. “No
In the case of "°", the process proceeds to step S5 to read out the pixels in the same column of the next row, and after adding the color offset shown in FIG. 5(B), returns to step S3. YESoo, that is, color~ When the reading of the image data for 1×3 pixels is completed, the process proceeds to step S6.

As described above, in addition to the process in step S2, a 3×3 pixel block of color image data is read out, and the contour designation circuit 18 becomes operational. Therefore, in step S6, 2
In the value image data reading procedure, step S15, which is in a waiting state, is activated to start reading out 4×4 pixels. In step S7, it is waiting for startup.
When the binary image data for 4×4 pixels is read out and step S7 is activated in step S19, the process advances to step S8.

In step S8, it is determined whether it is the last pixel in the row, and the answer is "NO".
If so, in order to read out IX3 pixels for three rows in the next column (to move the pixel of interest one place to the right), the address is incremented by one in step S9 and the address is updated to the next column position. , and subtracts the color offset by two lines from that address. This makes it possible to update the next pixel reading start address to the top of the three lines. If "YES" in step S8, reading of one line is completed and the process advances to step SIO.

As explained in FIGS. 6(A) and 6(B), 4×4 pixels of binary image data correspond to one pixel of color image data. For this reason, the color image data is referenced for four lines of the binary image data and is used four times, but the outline designation circuit 18 has a line buffer that temporarily stores the color image data line by line. Not yet.

Therefore, the readout control circuit 17 needs to repeat the process of reading three lines of color image data four times. Therefore, it is determined in step S10 whether or not it has been read repeatedly four times, and if "NO", the address is incremented by one in step Sll to wrap around the address position and move to the beginning of the next line. By subtracting the color offset by three lines, the address is returned to the top address of the previous readout, and the process returns to step S2.

Now, if step S10 is 'YES', then 4
Since the data has been read in batches, the process is performed in step S12.
Proceed to , and this time judge whether it is the last line.

NO” In other words, if it is determined that it is not the last line,
Proceeding to step S13, by incrementing the address in step S13, the address is passed around to become the start address of the row, and by subtracting the color offset by two lines, it becomes the start address of the row shifted by one row, and then Return to step S2. Further, if "YES" in step S12, the process ends.

The procedure for reading out color image data has been described above, and next the procedure for reading out binary image data will be explained.

In step S14, a binary start address is set to prepare for reading, and in step S15, the process waits for activation from the color image data reading side. Once activated, the process advances to step S16, and steps 316 to 31
8, a 4×4 pixel matrix of 4 pixels in the main scanning direction and 4 pixels in the sub-scanning direction is read out. When the reading is completed, the color image data reading side is activated in step S19, and the process proceeds to step S20.

The processing procedure from step S20 to step S25 corresponds to step 88 to step S13 for reading color image data, and since the binary image data side is in units of four lines, the binary offset is subtracted by one line more. The rest performs the same processing. Step S20. In step S21, read processing is performed in the main scanning direction in units of four lines, and in step S22. The above process is repeated four times in step S23, and step S24. In step S25, the above process is performed up to the last line, and the process procedure ends.

FIG. 8 is a flowchart showing the processing procedure of the subroutine for reading 2×3 pixels in step S2 of FIG.

First, in step S31, one pixel is read out, and in step S32, it is determined whether three rows have been completed. If "NO", a color offset is added in step S33 to read out the same column in the next row. After setting the address, the process returns to step S31. If "YES" in step S32, the process advances to step S34, where it is determined whether the second column is to be read, and if "NO", the process advances to step S35.

In order to read from the first row of the next column, the address is incremented in step S35 and the color offset is subtracted by two rows. If "YES" in step S34, the process of this subroutine ends and returns to the process of FIG. 7.

FIG. 9 is a flowchart showing the processing procedure for reading out data for the color designation circuit 19 among the operations of the readout control circuit 17. In the figure, steps 841 to S50 show the processing procedure for reading out color image data, and steps S51 to S58 show the processing procedure for reading out binary image data. Similar to the readout processing procedure for the contour designation circuit 18 shown in FIG. 7, the two processing procedures in this flowchart are step S43 and step s52. Step S
54 and step S44. The color designation circuit 19 repeats one row of color image data four times to use the color image data in the color IMEM 16 as color designation information for a 4×4 pixel matrix of corresponding binary image data. Read out. Also, since a reference pixel is not necessary, as shown in FIG. 5(B)
Reading starts from the color start address shown in .

Therefore, in step S41, a color start address is set to prepare for reading. Next, in step S42, one pixel of color image data is read out, and then in step S43, reading of the binary image data side is activated.

Next, in step S44, it waits for the corresponding binary image data to be read out. When activated in step S54, the process proceeds to step S45, where it is determined whether the pixel of interest is the last pixel in the row.

If "NO", the address is incremented by one in step S46 to read out the next pixel in the main scanning direction, and the process returns to step S42. Further, if the determination in step S45 is 'YES', the process proceeds to step 348, where it is determined whether or not it has been repeated four times.
In the case of .degree., the address is incremented in step S48 to wrap around the address, and the color offset is subtracted to return the address to the start address of the same row, after which the process returns to step S42.

Further, if the determination in step S47 is 'YES', the process proceeds to step S49, and it is determined whether or not the pixel of interest is in the last row.If 'NO', the address is incremented three times in step S50, and the address is is passed around including the reference pixel and set as the start address of the next row, and the process returns to step S42. If "YES" in step S49, the processing procedure ends.

Next, a procedure for reading binary image data will be explained.

After setting the binary start address and preparing for reading in step S51, the process waits for startup in step S52.
When starting is started from step S43, the process advances to step S53. In step S53, binary image data 4
After reading out the pixels, reading out the color image data is activated in step S54. and step S5
Proceed to step 5 to determine whether it is the last pixel in the row. here,"
If "NO", the address is incremented by one in step S56, and then the process returns to step S52.If "YES" in step S55, it is determined whether or not it is the last row in step S57, and " If "No", the address is incremented in step S58, and the process returns to step S52.

Moreover, if "YES" in step S5'/,
The processing procedure ends.

Next, the operation of the contour specifying circuit 18 shown in FIG. 2 will be explained in detail using FIGS. 10 to 12.

Through the process explained earlier (flowchart in Figure 7),
Binary image data is stored in a 4 x 4 pixel matrix consisting of F' F 32 a to 32 p in FIG. 3X3
(in the middle).

This is because reference pixels are required when specifying the outline.

Color 1 "mage data for surrounding 8 pixels is 24 pixels) F
F36a to 36d, 35f are stored in -3,6g, and both 24 pits are 3x3.
Configure a pixel matrix. The binary image data read out by the readout control circuit 17 is 5R.
31a to 3id are sequentially stored in 4×4 pixel matrix units, and when the processing of the 4×4 pixel matrix composed of FFs 32a to 32p is completed, the data is transferred from 5Rs 31a to 31d to FFs 32a and 32p. The outline specification table ROM 33 stores table information for determining the pattern of the 4×4 pixel matrix in advance.FF32a determines the pattern of the 4×4 pixel matrix from 3.2 Scan counter 34. From the signal number of the sub-scanning counter 35, the 4×4 pixel matrix is set to 1.
It scans pixel by pixel, determines which pixel to select from the 3×3 pixel matrix for each pixel, and the pixel information selected by the selector 37 is converted into 24-bit image data!
, is output.

Fig. 10 (A,) - (τ') (This is a diagram showing an example of the contour tf9 constant processing for 4 x 4 pixels, and the 4 x A 4-pixel matrix is obtained, t12.-Example is shown.

In the figure, the 4x4 matrix 1 filled with "0" and 'J' corresponds to FFs 32a to 32p in Fig. 2, and is filled with alphabets a to i. 3
×3 matrix is 24 bits FF 36 a□-3
Compatible with 6i. The 4×4 matrix filled with alphabets is the image data output after contour designation.

In the example shown in FIG. 10(A), the 4×4 pixel matrix is all replaced by the center pixel e, and in the example 1′ shown in FIG. In this way, the pattern of the 4×4 pixel matrix to be replaced with pixel data is determined, and the optimal replacement process is performed for each pattern.

FIGS. 11 and 12 are diagrams showing examples of actual outline designation processing.

11(A) shows an example of the figure "arrow", FIG. 11(B) shows an example of the figure "circle", and FIGS. 12(A) and 12(
B) shows an example of a "bar graph". As a result of contour specification processing on each side, 4 24-bit color image data
It can be seen that the resolution is 00 dpi.

Next, the operation of the color designation circuit 19 shown in FIG. 3 will be explained.

In FIG. 3, color image data from the color IMEM 16 and background color data from the mode control circuit 24 are input to the selector 41, and when the binary image data is active ("1"), the color image data is input. When active (“O”), background color data is output.

FIG. 13 is a diagram showing an example of actual color designation processing. In the same figure, 101 is 24 as binary image data.
This is an example where a pattern is drawn on an X24 matrix,
Reference numeral 102 indicates an example in which a color is specified by corresponding color-image data, and reference numeral 103 indicates an example of background color data specified by a background color register. Reference numeral 104 indicates an example of the output obtained as a result of the color designation process. In particular, Figure 13 (A) is an example of specifying a color for a kanji character, and Figure 13 (B) is an example of specifying a color for a figure ``circle.''8 In the case of Figure 13 (B), the color If a photo is stored in the image data 102, the inside of the circle can be filled with photo data, and the outer periphery of the photo can be designated as a circle with a resolution of 400 dpi.

Next, the background color register 22 shown in FIG. Mode control register 23. The mode control circuit 24 will be explained.

FIG. 15(C) is a diagram showing an example of defining a mode and a background color. As mentioned above, this embodiment has an outline designation circuit 18 and a color designation circuit 19, and a color designation circuit 6 for characters.
Photographic images require a contour specification circuit and how to use it to take advantage of its features. For this purpose, two windows, window 1 and window 2, are defined as shown in FIG. 15(C), and inside the window is an outline specifying circuit 18. The color designation circuit 19 is enabled outside the window. Furthermore, by defining two background colors, background color l and background color 2, and defining a background color window, the background color in the background color window is background color 2. Background color 1 is enabled for all windows other than red-red windows. For each window, the start address and end address of the window are defined using X and Y addresses in units of one pixel at any position on the paper. That is, window 1 is defined by (x,,, Y+s), (X, E, y, E), window 2 is defined by (x, t, y, E)7, and the background color window is (X, s, Y, ), ('X,
FY, lE). To define in this way, predetermined values are set in each register shown in FIG.

That is, the xis register 51 in FIG. X register 52. Y+- register 53. The Y, E register 54 contains the XY addresses cx, , y, , ), (x,) that define window 1 shown in FIG. 15(C).

Y15) is set. The X and Y addresses currently being printed on the paper are sequentially updated in the X address counter 65 and the Y address counter 66. Comparator 67 is X+s
Compare the register 51 and the X address counter 65, and if they match, input "1°' to the J terminal of JK-FF79, and
Set K-FF79. Comparator 68 is XI!
Compare the register 52 and the X address counter 65, and if they match, input "1" to the terminal of JK-FF79, and
-Reset FF79. Comparator 69 is Y18
Compare the register 53 and Y address counter 66, and if they match, input "1" to the J terminal of JK-FF80, and
-Set FF80.

Comparator 70 is Y I! Compare the register 53 and Y address counter 66, and if they match, input "°°1" to the terminal of JK-FF80 and reset JK-FF80. Therefore, JK-FF79 is set to " 1°, and the JK-FF 80 has an effective section of window 1 in the Y direction of 1°. Therefore, J.K.
- By ANDing the outputs of FFs 79 and 80 with AND 85, a valid period signal for window 1 is obtained. Similarly, AND86 and the valid range of window 2 are AND8.
The valid section of the background color window is obtained in step 7a.

The outputs of AND85 and 86 are logically summed by 0R88, and the signal obtained by ORing the valid sections of window 1 and window 2 is inputted to the selector 20 in FIG. 1 as a mode switching signal.
It is used as a selection signal for selecting the output of the contour designation circuit 18 and the output of the color designation circuit 19. The background color register 63 stores data indicating the background color of the entire sheet, and the background color 2 register 64 stores background color data in the background color window. Background color Lujista63. The output of the background color 2 register 64 is input to the selector 89, selected by the background color window valid period signal which is the output signal of the AND87, and input as background color data to the color designation circuit 19 of FIG. Note that this background color window valid section signal is
as.

It goes without saying that this is specified by the value stored in the Y 1111 X IIII Y BE register.

The operation of the image control section 13 will be explained using FIGS. 14 and 15. Figure 14 shows an example of print output, with the heading part in blue text, the main text in black text, the caution part in red text and white text on a red background, and a photo image and a photo image in which photo A is combined into photo B. C1 further consists of a color glove.

The photo section consisting of photo images A and B is defined in window 1, and the color graph section is defined in window 2, and the outline specification mode is used. The other parts use the color specification mode, but especially the white text on a red background uses the background color window + background color 2. FIG. 15 is a diagram showing an example of settings for obtaining the printing example shown in FIG. 14. In particular, FIG.
Setting example of value IMEM15, Figure 15 (B) is color IM
EM16 setting example, Figure 15 (C) is background color register 2
2. 3 is a diagram showing an example of settings of a mode control register 23. FIG.

In FIG. 15(C), window 1. window 2,
The background window is set at a position corresponding to the printing example shown in FIG. Background color 1 is the background color of the entire paper, and in this case, white is set. Background color 2 is set to red in order to realize white characters in red. In FIG. 15(A), in window 1, the outline of a photographic image is specified in order to synthesize photographic image A and photographic image B at a resolution of 400 dpi, and in window 2, the outline of a bar graph is specified. In the other parts, the printed characters are expanded because of the color specification mode, but in the part of Fig. 15 (A) corresponding to the photographic image C of Fig. 14, that area is expanded to perform photo printing in the color specification mode. °“1゛ is filled in. Figure 15 (
B) is an example of color specification, 100dp in window 1
Contains a composite image of photographic image A and photographic image B with a resolution of i. In window 2, the graph part contains color data specifying a color, and the other parts contain white data. In the color designation mode area outside the window, data of the photographic image C is contained in a portion corresponding to the photographic image C in FIG. 14, and white data is contained in the surrounding area. In the red and white text,
Since the text is white, it contains white data, blue text contains blue data, red text contains red data, and other text contains black data. By setting as above, the first
The printing example shown in Figure 4 is obtained.

Other Embodiments In the embodiment described above, the outline designation circuit 18 and the color designation circuit 19 do not have line buffers, so the readout control circuit 17 controls reading out the same data multiple times. , a line buffer may be provided in the contour designation circuit 18 and the color designation circuit 19 to reduce the number of readouts and to simplify the configuration of the readout control circuit 17.

In addition, if a line buffer is provided, the contour designation circuit 1
8 and the color designation circuit 19 may share a line buffer to make effective use of the line buffer.

Furthermore, although the readout process of the readout control circuit 17 is divided into one for the contour designation circuit 18 and one for the color designation circuit, all the data necessary for the color designation circuit 19 is included in the data for the contour designation circuit 18. Therefore, only the data necessary for the color designation circuit 19 may be extracted from the data read out for the contour designation circuit 18 and used by the color designation circuit 19.

In addition, various modifications can be made without departing from the spirit of this embodiment.

As explained above, according to this embodiment, a memory that stores an image with a high resolution and a small amount of information per pixel, and a memory that stores an image that has a low resolution and a large amount of information per pixel are utilized by taking advantage of their characteristics. When used effectively, high-quality image output can be obtained with a small amount of information.

Furthermore, this reduces the number of elements that store the amount of information, thereby reducing costs, and also minimizes deterioration in image quality caused by reducing the amount of information.

[Effects of the Invention] As described above, according to the present invention, it is possible to reproduce a high-resolution image represented by one bit per pixel as an image corresponding to a plurality of bits per pixel.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the image processing device of the embodiment. FIG. 2 is a block diagram showing the configuration of the contour designation circuit 18 in FIG. 1. FIG. 3 is a block diagram showing the configuration of the color designation circuit 19 in FIG. 1. Block diagram: Figure 4 is a block diagram showing the configuration of the background color register 221, character control register 23, and mode control circuit 24 in Figure 1; Figures 5(A) and (B) are the binary IMEM15 and A diagram showing the storage format of image data in the color IMEMlS. Figures 6 (A) and (B) are diagrams showing the correspondence between pixels of binary image data and color image data. Figures 7 and 8 are outline diagrams. FIG. 9 is a flowchart showing the reading operation for the color specifying circuit 19; FIGS. 10(A) to 10(T) are diagrams showing an example of contour specifying processing. , Figures 11 (A) and (B) and Figures 12 (A) and (B) are diagrams showing examples of actual outline designation processing, Figure 13 (A),
(B) is a diagram showing an example of color designation processing performed by the color designation circuit 19, FIG. 14 is a diagram showing an example of print output obtained by this embodiment, and FIGS. FIG. 16 and FIG. 17 are diagrams showing the configuration of a conventional image control section. In the figure, ]... CPU, 2... Main memory, 3...
・Communication 1/F, 4... Keyboard, S... Pointing device, 6... Input device 1/F, 7... System bus, 8... CRT, 9... VRAM, 10
...FD, 11...HD, 12...DISK
I/F% 13... Image processing unit, 14... Output device, 15... Binary IMEM, 16... Color IM
EM, 17 river readout control circuit, 18... outline designation circuit, 19... color designation circuit, 20... selector, 21
...LUT, 22...Background color register, 23...
Mode control register, 24...mode control circuit, 33
. . . Contour specification table ROM. Binary offset (A) Figure 5 Color offset (B) Figure (B) (Q) (R) Figure 10 Figure 10 (C) (D) CP) Figure (A) Figure (A) Figure Figure CB) Figure (B) Figure 13 (A) Figure 14 Figure 13 (B) Figure (C)

Claims (1)

[Scope of Claims] A first storage means for storing an image made up of pixel data corresponding to one bit per pixel at a first resolution; a second storage means for storing an image made up of corresponding pixel data; a readout control means for reading out image data in association with each other from the first storage means and the second storage means; background image data storage means for storing prescribed image data; and corresponding pixel data in the second storage means and the background image data according to the state of each pixel data stored in the first storage means. An image processing apparatus comprising: switching means for switching between background image data stored in a storage means.