JPH0456554B2 - - Google Patents

Description

[Detailed Description of the Invention] Technical Field The present invention provides a method for maintaining a constant phase difference between a feedback pulse generated every time a DC motor serving as a drive source rotates by a predetermined angle and an input pulse serving as a reference. By driving a DC motor,
The present invention relates to a method for controlling the speed of a DC motor for controlling the speed of the motor.

Prior Art Conventionally, this type of control method has been known as a drive method using so-called phase-locked loop PLL control, and as shown in FIG.
outputs a pulse with a width corresponding to the phase difference Δθ between the input pulse f _IN and the feedback pulse f _FB , which is converted into a DC voltage according to the pulse width through a phase voltage converter 2 consisting of a low-pass filter integrator circuit, etc. A current corresponding to this DC voltage is supplied to the DC servo motor 4 via the servo amplifier 3. Incidentally, the rotation angle detector 5 outputs one feedback pulse f _FN every time the servo motor 4 rotates by a predetermined angle. With this configuration, the servo motor is rotationally controlled in accordance with the input pulse f _IN .

Such control of the DC servo motor is important when it is desired to minimize rotational speed irregularities, such as in carriage control of a dot printer that prints while continuously moving the carriage.

As the phase comparator 1 shown in FIG. 1, a digital phase comparator as shown in FIG. 2 is often used because its configuration is simple. As can be seen from the time chart shown in Figure 3, when input pulse f _IN is applied to input terminal R and input terminal V,
When _fFB lags behind _fIN , the output terminal U receives a pulse with a pulse width corresponding to the amount of delay, and when _fFB is ahead, the other output terminal D receives a pulse with a pulse width corresponding to the amount of delay. A pulse of corresponding pulse width is obtained.

However, as shown in FIG. 4a, the phase voltage converter 2
, the phase difference Δθ obtained from the phase comparator 1 and the DC output voltage E obtained from the converter 2 are
As shown in Figure b, Δθ is only linear in the range of −2π to +2π. By the way, servo motor 4
The generated torque T, phase voltage conversion rate k _P , servo amplifier gain k _A , servo motor torque constant
k _M , then T = Δθ × k _P × k _A × k _M , so the relationship between this torque T and the phase difference Δθ is also linear only in the range of Δθ from −2π to +2π, and the maximum torque T _MAX is: T _MAX =k·Δθ(2π) However, it is limited by k=k _P ×k _A ×k _M.

Therefore, in speed control using conventional PLL control,
When external noise exceeding T _MAX , such as friction fluctuation, occurs, the PLL becomes out of synchronization, resulting in unstable motor rotation. There is a method of lowering the frequency of the synchronization clock pulse in order to apparently widen the synchronization range, but this lowers the ripple frequency, and if you try to reduce the ripple component, the response will deteriorate due to the relationship with the low-pass filter, resulting in failure. This method has the disadvantage of providing stable control.

OBJECTS The present invention essentially provides a method for controlling the speed of a DC motor that can widen the synchronization range of a phase comparator and perform stable speed control.

Configuration The configuration of the present invention will be explained based on one specific example.

FIG. 5 shows a phase comparator circuit that enables a linear range twice as large as that of the conventional circuit in terms of the relationship between torque T and phase difference Δθ, and FIG. 6 shows a timing chart of its operation.

In FIG. 5, 11 and 12 are flip-flops that divide the input pulse f _IN or feedback pulse f _FB by two, 13 and 14 are phase comparators having the same configuration as shown in FIG. 2, and 15 and 16 are It is an adder. The input pulse f _IN and the feedback pulse f _FB are frequency-divided by 2 through flip-flops 11 and 12, and then inputted from the Q output terminal to the input terminals R ₁ and V ₁ of the first phase comparator 13, and the phase Output terminal U ₁ of comparator 13
And the difference is output from _D1 . On the other hand, the pulse of the inverted waveform of f _IN and f _FB divided by 2 is
From the respective output terminals of both flip-flops 11 and 12, the input terminals R2 and _R2 of the second phase comparator 14 are connected.
V ₂ and the phase difference thereof is similarly taken out from the output terminals U ₂ and D ₂ of the phase comparator 14. The output pulses of the output terminals U ₁ and U ₂ are added in the adder 15, and the output pulses of the output terminals D ₁ and D ₂ are added in the adder 16, and the polarity is added in the next stage differential amplifier 17 and output from the terminal V. Output.

As you can see from the circuit and timing chart,
By dividing f _IN and f _FB by 2, phase comparator 1
The phase difference f _IN , f _FB seen from 3 is 1/2 of the phase difference when directly handled, and the pulse output period is twice as long. But flipflop 1
By combining the complementary outputs (outputs) 1 and 12 with another phase comparator 14 as described above, a phase comparator circuit whose pulse output period is the same as the conventional one and whose synchronization range is doubled is obtained. FIG. 7 shows the relationship between the phase Δθ and the output voltage V of the phase comparison circuit.

FIG. 8 shows a specific example of a DC servo motor control circuit using the above phase comparison circuit. This is an example of use in the reciprocating scanning drive of the optical system of a copying machine.
Control is required as shown in the speed diagram in the figure. Further, during reciprocating scanning, it is required to control the speed fluctuation to be as small as possible with respect to the target speed.

In FIG. 8, the controller 20 is conveniently a single-chip microcomputer MPU,
In this example, Intel's 8048 is used.
When the MPU receives a start signal from the outside,
In order to increase the output of the D/A converter (DAC) 21 as shown in FIG. 10, a polarized speed code that gradually increases over time is output to the DAC. At the same time, the MPU outputs a cross pulse f _IN that corresponds to the target speed to the phase comparator circuit 26. This phase comparator circuit 26 is the same as the circuit shown in FIG.

The DC servo motor 4 is still stopped, so no pulses are input from the rotation angle detector (pulse generator PG) 5 provided on its output shaft to the terminals F ₁ and F ₂ of the MPU. From the pulse from MPU PG5 and the content of the output code to DAC21,
If the output of DAC21 is larger, that is, until the rotational speed of motor 4 reaches the target speed, enable signal SC2 is set to "0".
It is said that Therefore, analog switch AS1 is
It is OFF, and the output of the DAC 21 passes through the phase difference control comparison section 22 and becomes one input of the speed control comparison section 23. Therefore, the pulse from PG5 is
It is converted into DC by the FVC 23 and the filter 24 and becomes the other input of the speed control comparator 23. However, since the pulse of PG5 is zero at first, the output of the DAC 21 is passed through the comparator 23 to the servo amplifier 3. and gives a rising pulse to the servo motor 4.

Until time t ₁ (see Fig. 9) when the rotational speed of the servo motor 4 reaches the target speed, the output of the DAC 21 has more weight than the output of the frequency voltage converter (FVC) 24, so the MPU outputs the output from the SC2. Set to “0” and leave analog switch AS1 open. It may be closed from the beginning, but since this circuit also controls the second analog switch AS2, AS
This is because a signal that is contradictory to the second control signal is used. FIG. 10 shows the voltages at various parts up to time _t1 . While the rotational speed of the servo motor 4 is low, the feedback pulse f _FB lags behind the input pulse f _IN by a large amount, so that the phase comparator circuit 26 outputs a pulse of positive polarity.

When the target speed is exceeded, both phase comparators 13 and 1
A phase lead signal is generated from the output terminals D ₁ and D ₂ of 4,
It enters the AN3 input terminal of the MPU through the OR gate 28. Immediately after receiving the phase lead signal, the MPU fixes the code output to CAC21,
Remember. At the same time, the MPU closes switch AS1 and opens switch AS2. The phase difference output from the phase comparator circuit 26 is a negative pulse if _fFB is ahead of _fIN . This pulse passes through a phase voltage converter 2 consisting of a low-pulse filter and becomes a corresponding phase voltage, which is applied to the servo amplifier 3 through the switch AS1 and the comparator 22, decelerating the servo amplifier 4, and clocking the clock pulse f _IN synchronize with. Thereafter, when the rotation speed of the servo motor 4 becomes slightly lower than the clock pulse f _IN , the servo motor 4 is accelerated until the output pulse of the phase comparison circuit 26 becomes polar. In conventional phase comparators, the linear range in which the output voltage and the phase difference Δθ maintain a linear relationship is relatively narrow, and the feedback pulse f _FB with respect to the clock pulse f _IN is −2π to +
If it advances or lags by more than 2π, it will lose synchronization.
However, as already described in FIG. 5, the phase comparator circuit 26 of the present invention has a synchronization range of -
Since the output V has a linear relationship with respect to the phase difference Δθ of 4π to +4π, synchronization is relatively prevented.
In order to effectively use this relatively wide linear range,
In FIG. 8, an integrator 29 is connected to the phase voltage converter 2, and a level converter 30 is connected to the integrator. This level converter 30 is, for example, the 11th
As shown in the figure, three comparators 31, 3
It consists of DAC 2, 33 and IC74148, and when the output of the integrator 29 is continuously scanned, the next DAC 21
It is stored in the MPU as a correction value for the speed code given to the DAC 21, and based on the correction value, the output of the DAC 21 is corrected so that the output of the phase comparison circuit 26 is at the center of the linear range. Therefore, the servo motor 4 rotates stably between times t ₁ and _{t 2} in synchronization with the clock pulse f _IN from the MPU.

On the other hand, if a large load change occurs due to mechanical factors during constant speed running and the rotational speed of the servo motor 4 increases or decreases significantly, this is applied to the speed control comparison section 23 . Since a difference occurs between the output of the DAC 21 and the output of the FVC 24, the servo motor 4 is rapidly decelerated or accelerated in accordance with the difference.

Time _t2 is the time when the scanning unit has traveled to the target position, and can be known by the MPU counting the feedback pulses from PG5 and others. Since the integrator 29 connected to the phase voltage converter 2 detects the phase deviation, it informs the MPU of the tendency of the deviation through the level converter 30 at time _t2 .
That is, the output difference between the DAC 21 and the FVC 24 is a value proportional to the friction torque of the load system of the servo motor. After time t ₂ , switch AS1 is turned OFF and AS2 is turned OFF.
ON, gradually decrease the output of DAC21, and
It is controlled by comparison with the output of , that is, speed comparison.

During backward scanning, an output with a polarity opposite to that during forward scanning is output, and the vehicle is driven to a predetermined position at a constant speed. From time _t4 , the speed is reduced. SC1 of the MPU is used to widen the frequency band of the FVC 24 and to switch the frequency band of the low-pass filter 25 to the high frequency side during backward scanning.

Effects As described above, by employing a phase comparator circuit with a wide synchronization range, stable constant speed drive without loss of synchronization can be achieved. Further, the steady-state deviation of the phase comparison circuit can be detected by an integrator, and the output of the DAC 21 can be automatically corrected while the vehicle is running at a constant speed so as to cancel the deviation. Large-period disturbance friction can be controlled by MPU speed control, and fast fluctuations can be controlled by phase difference control, achieving more stable control.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a servo motor drive circuit using conventional PLL control, Figure 2 is a circuit example of its phase comparator, Figure 3 is a timing chart for explaining the operation of the circuit in Figure 2, and Figure 4 is a diagram of a servo motor drive circuit using conventional PLL control. Figure a and 4th
Figure b is a diagram showing an example of a circuit in which a phase voltage converter is connected to a conventional phase comparator and the relationship between its phase difference and output voltage, Figure 5 is an example of a phase comparator circuit according to the present invention, and Figure 6 is a diagram showing the relationship between the phase difference and the output voltage. A timing chart for explaining its operation, FIG. 7 is a diagram showing the relationship between the phase difference and output voltage, FIG. 8 is an example of an actual drive control circuit for a servo motor according to the present invention, and FIG. 9 is a diagram showing the relationship between the phase difference and output voltage. The speed diagram controlled by the circuit in Figure 8, Figure 10 is a diagram showing the relationship between the D/A conversion output and the F/V conversion output up to time _t1 , and Figure 11 is the diagram showing the relationship between the level converter in Figure 8. This is a specific example. 2... Phase voltage converter, 3... Servo amplifier,
4...DC servo motor, 5...Rotation angle detector (pulse generator), 11, 12...Flip-flop, 13, 14...Phase comparator, 15, 1
6...Adder, 17...Differential amplifier, 20...Controller (MPU), 21...D/A converter (OAC), 22...Phase difference control comparator, 23...
Speed control comparison section, 24...F/V converter (FVC), 25...Low pass filter, 26...
Phase comparison circuit, 29...integrator, 29...level converter.

Claims (1)

[Claims] 1. When driving a DC motor so as to maintain a constant phase difference between a feedback pulse generated every time the DC motor serving as a drive source rotates by a predetermined angle and a reference input pulse. , add the non-inverted feedback pulse and input pulse to one of the two digital phase comparators, apply the inverted feedback pulse and input pulse to the other comparator, and add the similar outputs of both comparators. A method for controlling the speed of a DC motor, characterized in that a phase-locked loop is constructed using a phase comparator circuit constructed as follows. 2 When driving a DC motor, two digital phase A phase comparison circuit configured by adding an uninverted feedback pulse and an input pulse to one comparator, adding an inverted feedback pulse and input pulse to the other comparator, and adding the same kind of outputs from both comparators. 1. A method for controlling the speed of a DC motor, characterized in that a phase lock droop is configured using the phase comparator circuit, and automatic correction is performed to cancel a steady-state deviation in the output of the phase comparator circuit.