JPH0456532B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention uses a display that displays the set value of the digital relay to display various data such as input data, output data, and arithmetic processing data that are being processed by the software of the digital protection relay. This relates to digital protective relays that are displayed as follows.

Digital protection relays detect system faults by taking in analog quantities such as voltage and current from the power system and performing calculations. This calculation is performed not by conventional analog calculation using an operational amplifier, but by digital calculation processing using a microprocessor. In other words, using a microprocessor,
Calculate and process power system information using programs stored in memory. And the calculation result,
If an accident is determined by comparing the set value, which is a reference value for determining the presence or absence of a system accident,
To eliminate the accident, a trip signal is output to the breaker. In order to check the performance and characteristics of a digital protective relay in this way, it is necessary to know the data that is being processed internally. Here, a case will be described in which a distance relay is configured using a digital protection relay. Distance relays are used to eliminate faults on power transmission lines, and one of the calculation methods used in distance relays is to directly calculate the impedance to the fault point from the voltage and current information of the power transmission. There is a method of determining whether the impedance is within a set value. In this method, voltage and current information is sampled at intervals of 90 electrical degrees, and the voltage and current values at that time are captured. Using the values sampled at 90 degree intervals, calculations are performed according to the formula shown below.

Current I ² = i ² (t) + i (t-90°)... VIcosφ = i (t-90°)・v(t-90°)+i(t)・
v
(t)… VIsinφ=i(t)・v(t-90°)−i(t-90°)・
v
(t)... From the equations and equations, R=VIcosφ/I ² =V/Icosφ... From the equations and equations, X=VIsinφ/I ² =V/Isinφ... The resistance component R and the reactance component X of the impedance are determined by this formula.
A characteristic diagram of this distance relay is shown in FIG. In the characteristic diagram of FIG. 1, the inside of the circle is the operating range, and the outside is the non-working range. In other words, when an accident occurs on a power transmission line, the impedance to the accident point is calculated based on the voltage and current information at that time, and if the impedance is within a certain value, in other words, inside the circle in Figure 1, the distance is calculated. It outputs an operating signal as a relay, and if it is above a certain value, it is outside the circle shown in FIG. 1 and therefore outside the protected area of the distance relay, so it is determined that the distance relay is inactive. Since the impedance to the fault point is proportional to the distance of the power transmission line, the distance to the fault point can be determined by knowing the impedance value calculated by the digital protective relay. That is, it can be seen that reading out the calculation data inside the digital relay has an important meaning.

Next, a description will be given of how the above operation is performed in a conventional digital protective relay. Figure 2 is a block diagram showing the general configuration of a conventional digital protective relay. 1 is a microprocessor (abbreviated hereafter) which is the brain of the digital relay.
(referred to as CPU), 2 is a memory that stores programs and data, 3 is an analog input section that converts the analog input of system voltage and current into digital values, and 4 is a digital output section that outputs the output of a digital relay. Reference numeral 5 denotes a setting section that sets a setting value that serves as a reference for determining the operation of the relay. These 1~
Items up to 5 are the main parts that make up the digital protective relay.

Next, 6 is a member interface, which is used during maintenance, and controls the interface between the maintenance panel 7 and the CPU 1.
Reference numeral 7 denotes a maintenance panel, which is a device used by the operator to perform operations such as debugging digital relay programs and reading stored data. 8
is an address register, 9 is a data input register,
10 is a data output register, which is a circuit block constituting the main panel interface of 6. The menu panel interface of 6 is this 8
It is a generic term including ~10. A digital display 11 is attached to the maintenance panel 7 and displays internal data of the digital relay in digital values. 12 is a numerical value setter;
This is a setting device for setting address data, numerical data, etc.

In FIG. 2, if the operator wants to know the data processed inside the digital protective relay, for example, the impedance value up to the above-mentioned fault point, the operator performs the following operations. First, when the digital protective relay is in normal operation, there is no need for maintenance, so the main panel interface 6 and the maintenance panel 7 are not connected. When an accident occurs in the power system and the impedance to the accident point calculated by the distance relay realized by the digital protection relay is read out from the digital relay, the main panel interface 6 is used.
Connect to CPU1 bus. The maintenance panel 7 is also connected to the main panel interface 6. Next, operate the numerical setting device 12 on the maintenance panel 7 to
A memory address storing the impedance calculated by the digital protective relay up to the fault point is set in the address register 8 inside. and,
6 main panel interfaces for 1 CPU
Input the interrupt signal from When the CPU 1 receives this interrupt signal, it reads the data in the address register 8 in the main panel interface 6. Then, the memory address information set in the address register 8 is decoded, and the impedance information specified by the address register 8 is read out from the memory 2. Then, the read value is outputted to the menu panel interface 6 again. This value is stored and held in the data output register 10 in the menu panel interface 6. In this manner, the CPU 1 operates to read the information at the memory address specified by the address register 8 of the menu panel interface 6 from the memory 2 and output it to the data output register 10. The data output register 10 is connected to the digital display 11 of the maintenance panel 7, and the impedance value outputted to the data output register 10 up to the above-mentioned fault point is displayed. In this manner, in the conventional digital relay, the maintenance panel 7 and the maintenance panel interface 6 are connected to read out the results of calculations by the CPU 1, that is, the contents of the memory 2.

Next, the setting section of this conventional digital protective relay will be explained. This setting section 5 is a section that sets and stores a setting value that is a reference value for determining whether the calculation result of the digital protective relay is an accident or no accident. explain. FIG. 3 is a block diagram showing a schematic configuration of a setting section of a conventional digital protective relay. This extracts only the relationship between the settling section 5 and the CPU 1 in FIG. 2, and describes the settling section 5 in detail. In FIG. 3, the same reference numerals as those in FIG. 2 are the same, and therefore the description thereof will be omitted. 1
3 is a data setter for writing the setting value of the relay, and is a switch that can set the setting value of multiple bits. 14 is a data display for displaying stored setting values. 15 is a relay element selection switch for selecting a plurality of relay setting elements, 16 is an encoder circuit, 17 is a nonvolatile memory, and 18 is a multiplexer.

In FIG. 3, when the operator performs relay setting, he first turns on the corresponding selection switch n of the relay element selection switch 15 in order to designate the relay element to be set. The signal of switch n is input to the encoder circuit 16, and the encoder circuit 1
At step 6, the address code "n address" corresponding to switch n is output. If switch n+3 is selected and turned ON, the encoder circuit 16 outputs the address code "address n+3". Furthermore, when any one of the relay element selection switches 15 is turned ON, the encoder circuit 16 outputs a relay element selection signal which is the OR condition.
Output SEL. This relay element selection signal SEL
is input to the multiplexer 18 and serves to output the input signal from the encoder circuit 16 as valid among the two address inputs of the multiplexer. If this SEL signal is not present, the multiplexer 18 is switched to output the address code signal from the CPU 1. That is, depending on the presence or absence of the SEL signal, the multiplexer 18 performs a switching function of outputting either one of the two input signals. Switch n of relay element selection switch 15 is
In the case of ON, the multiplexer 18 is
The address code output signal of the encoder circuit 16 is output to the nonvolatile memory 17. That is, address code "n" has been input to the nonvolatile memory 17. In the non-volatile memory 17,
Setting values used for calculations are stored in CPU1,
Its output is connected to the data display 14 and the CPU 1. Therefore, when the address code "n address" is input, the nonvolatile memory 17 outputs the data stored at the corresponding address, and the value is displayed on the data display 14. When the operator operates the corresponding relay element switch of the relay element selection switch 15 in this way, the setting value currently set on the data display 14 is changed to the non-volatile memory 17.
is read out and displayed.

When the next displayed setting value is to be changed, the data to be changed is set in the data setter 13 and written into the nonvolatile memory 17. The output of the data setter 13 is connected to the nonvolatile memory 17, and data is written therein. Non-volatile memory 17
The contents of the corresponding address n are stored in the data setter 13.
When the value specified in is rewritten, the new value written is displayed on the data display 14, and the operator confirms the value. Next, if you want to change the settings of other relay elements, sequentially turn the relay element selection switch 15 n, n+1, n+2, n+3,
...and then use the same method to create non-volatile memory 1.
Let's rewrite the contents of 7. When the writing is completed, the CPU 1 reads the contents of the nonvolatile memory 17 and uses them for relay calculation.

When the CPU 1 accesses the nonvolatile memory of the setting section, the relay element selection switch 15 is not operated, so the relay element selection signal is
There is no SEL. Therefore, the multiplexer 18 outputs the address code connected to the CPU 1 as valid. and non-volatile memory 17
is controlled by an address signal output from the CPU 1.

When CPU1 reads the relay setting value,
The address signal of the relay element to which CPU1 corresponds,
When the n address is output, since there is no SEL signal as described above, the multiplexer 18 transmits the address signal from the CPU 1 to the nonvolatile memory 17. The nonvolatile memory 17 outputs the relay setting value data stored at address n. Output data from the nonvolatile memory 17 is output to the CPU 1. In this way, the CPU 1 reads the set value from the nonvolatile memory 17.

As described above, the setting section of the conventional digital protective relay has a configuration in which only the setting value can be set and displayed. Therefore, in order to know the information that is calculated inside the digital protective relay and used to know the relay characteristics, it is necessary to use a numeric display and address setting device for maintenance, which are unnecessary when the digital protective relay is in operation. This must be done by connecting the maintenance equipment that has been installed. Another disadvantage is that a maintenance device must be connected while the digital protective relay is in operation, and that sufficient care must be taken both in terms of circuitry and during connection so as not to affect the original relay function. Additionally, if a digital protective relay is equipped with a maintenance display, an address setting device, etc. from the beginning, it will require two displays, including a display for the setting value, which will increase the size of the device and increase the price.
On the contrary, reliability will deteriorate. Furthermore, if the digital protective relay does not have a function to display internally calculated data, it becomes impossible to grasp the operational status of the digital relay, making maintenance extremely difficult.

This invention was made in order to eliminate the above-mentioned drawbacks of the conventional technology, and uses a data setting device and a data display device to set a set value, so that internal calculation results and input data can be stored in memory. By displaying data, necessary data can be easily displayed without increasing the size of the hardware, and the purpose is to provide a digital protective relay that is easy to maintain.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 4 is a block diagram showing the configuration of the settling section according to the present invention, and the same parts as those shown in FIGS. 2 and 3 are designated by the same reference numerals, and the explanation thereof will be omitted. In FIG. 4, 20 is a data display register, 21
is a multiplexer, which is a circuit that operates in the same way as the multiplexer 18. 22 is gate circuit A, 2
3 is a gate circuit B, 24 is an arithmetic data display switch, 25 is a comparison circuit, and 26 is an address generation circuit.

When issuing a command to read data from CPU1 to memory 2, from CPU1 to address bus A
Outputs a multi-bit addressing signal to The memory 2 outputs data of the memory number to the data bus D according to this address designation signal. This is the read cycle RD in FIG. In the write cycle WE, the CPU 1 similarly outputs an address designation signal, and then outputs the data to be written to the data bus D. The memory 2 writes the data on the data bus D to the corresponding address in the memory 2 according to this address designation signal.

Next, a case will be described in which the setting values stored in the nonvolatile memory are displayed and viewed. When displaying the relay setting value, as explained in Figure 3,
Turn on the corresponding selection switch n of the relay element selection switch 15. The encoder circuit 16 is
Outputs the SEL signal and the address code n corresponding to the corresponding selection switch n. Multiplexer 1
8 is CPU1 because the SEL signal is input.
The address signal from the encoder circuit 16 is invalidated, and the address code address n, which is the output of the encoder circuit 16, is output to the nonvolatile memory 17. Since the SEL signal is also input to the CPU 1, the CPU 1 is controlled not to read the nonvolatile memory 17 while the SEL signal is "present." At this time, the calculated data display switch 24 is kept in the OFF state. The signal of the calculation data display switch 24 is sent to the multiplexer 2.
1 and is input to the gate circuit A22 and gate circuit B23. The calculation data display switch 24
When in the OFF state, the gate circuit A22 is in the "open" state and outputs the output signal of the data setter 13 to the nonvolatile memory 17. Conversely, gate circuit B23
is in the "open" state, and the output signal of the data setter 13 is locked and not transmitted to the address generation circuit 26. Further, the multiplexer 21 operates so as to output the read output data of the nonvolatile memory 17 and not output the output of the data display register 20 when the arithmetic data display switch 24 is OFF. i.e. multiplexer 2
1 indicates the output of the non-volatile memory 17 to the data display 1.
It operates to output to 4. Therefore, when address n is designated by relay element selection switch 15, the set value data for address n is output from nonvolatile memory 17 and displayed on data display 14. When the relay element selection switch 15 is switched to n+1, the set value at address n+1 is read out and displayed on the data display 14.

Next, the case of rewriting and changing the setting value will be explained. First, the corresponding switch n+1 of the relay element selection switch 15 is turned on. As before, encoder circuit 16 sends n+1 to multiplexer 18.
Outputs the address signal of the address. A SEL signal is also output. The SEL signal is input to the multiplexer 18, and the output of the encoder circuit 16 becomes the output of the multiplexer 18, and is input to the nonvolatile memory 17, as in the case of the readout display described above. Also, the calculation data display switch 24 is OFF.
Therefore, the gate circuit A22 is in the "open" state and the gate circuit B23 is in the "open" state. The multiplexer 21 also outputs read data from the nonvolatile memory 17 to the data display 14. In this state, when the address signal address n+1 is input to the nonvolatile memory 17, the setting value stored in the nonvolatile memory address n+1 is output to the data display 14. The operator looks at the set value displayed on the data display 14 and confirms the current set value. Then, the changed new setting value is set in the data setting device 13. Switch n+ of relay element selection switch 15 has already been set.
1 is operated, address n+1 of the nonvolatile memory 17 is selected, and the calculated data display switch 24
The gate circuit A22 outputs the output from the data setter 13 to the data input DI of the nonvolatile memory 17 according to the signal from the data setter 13. The new set value is then written into the nonvolatile memory 17. If you want to change the setting values of other relay elements, similarly, switch the relay element selection switch 15 from n+1 to n+m, set the setting values to be changed in the data setter 13, and change the settings one by one. Bye. When the setting change is completed, relay element selection switch 1
Turn off all switches in step 5. This causes the encoder circuit 16 to stop outputting the address to the multiplexer 18. And the SEL signal output also disappears. As a result, the multiplexer 18 enters a state in which the address output of the CPU 1 is input to the nonvolatile memory 17 from the output of the encoder circuit 16.
In other words, all nonvolatile memories 17 are connected to the CPU 1 side. from encoder circuit 16
When the CPU 1 detects that the SEL signal disappears, it assumes that the setting change by the operator has been completed, and checks by program whether the setting value set by the operator is correct.

Next, the operation of reading and displaying calculation data inside the CPU 1, such as impedance information up to the fault point, which is an important function of the present invention, will be explained.
First, the operator turns on the calculated data display switch 24 in order to know the impedance value calculated by the digital relay. When this switch is turned on, the multiplexer 21 outputs the output of the data display register 20 to the data display 14 instead of outputting the read data from the nonvolatile memory 17 to the data display 14. can be switched to The gate circuit A22 is in a "closed" state, and the output of the data setter 13 is no longer input to the nonvolatile memory 17. Conversely, the gate circuit B23 becomes "open" and the data setter 1
3 is input to the address generation circuit 26. The calculated data display switch 24 is also input to a comparison circuit 25. Comparison circuit 25
When detecting that the arithmetic data display switch 24 is turned on, it starts comparing the address bus A from the CPU 1 with the output data of the address generation circuit 26.

Next, the operator does not set the relay setting value using the data setting device 13, but sets a numerical code corresponding to predetermined data calculated by the CPU 1. For example, when displaying the impedance calculated by a digital protective relay, set a corresponding numerical code.
For example, A, A+1, A+2, A+3, A+4,
. . are set using the data setter 13. This A, A+1, A+2, A+3, A+4,
The address generation circuit 26 to which the output signals from the data setter 13 are inputted in correspondence to the memory addresses of the digital protective relay such as "B address", "C address", "D address", "E address", etc. The address storing the calculation data calculated by the digital relay that you want to display and confirm is stored. This address generation circuit 26 generates these A, A+1, A
When a numerical code of +2, A+3, A+4, etc. is input, the corresponding "B address", "C address", "D
Outputs the memory address of "Address", "Address E", etc.
This memory address signal is input to the comparison circuit 25. Therefore, the operator
Numeric code A+1 corresponding to the data you want to display with
When set, "C address" is output from the address generation circuit 26. At this time, during the process of arithmetic processing, the CPU 1 writes into the memory 2 data corresponding to the numerical code set by the operator as desired to be displayed. The memory address of the memory 2 where this data to be displayed is stored is "address C". When writing the data processed by the CPU 1 into the memory 2, the CPU 1 outputs the address "C address" to be written to the address bus A, and outputs the impedance information of the calculation result to the data bus D. Then, the impedance information is written to "address C" of the memory 2. At this time, when "address C" is output to the address bus A, the comparison circuit 25
detects that it matches the "C address" output from the address generation circuit 26. As a result, a match signal is sent from the comparison circuit 25 to the data display register 20.
is input. The data display register 20 is
Connected to data bus D from CPU1,
In response to the match signal from the comparator circuit 25, the data being output to the data bus D is latched and held. In other words, when the addresses match, the impedance information to be displayed is sent to the data display register 20.
will remember. The data output to this data display register 20 is displayed by the calculation data display switch 24.
Since it is ON, it is displayed on the data display 14 via the multiplexer 21. This impedance information is displayed on the calculated data display switch 24.
In other words, while the is ON, the numerical code "A+" corresponding to the address "C address" where the impedance information is stored in the data setter 13 is
While "1" is set, the data is repeatedly output to the data display register 20 at a fixed cycle or an arbitrary cycle and displayed on the data display 14.

Next, when you want to change the data you want to display, leave the calculated data display switch 24 in the ON state and change the numerical code on the data setter 13 from "A+1" to "A".
+3". The address generation circuit 26
+3" memory address address data "E
address" is output to the comparison circuit 25. CPU1 is
After all, in the process of arithmetic processing, the above “E” is stored in memory 2.
Write or read data at an address.
At this time, the address on the address bus A and the "E address" input to the comparison circuit 25 match again. Then, the data on the data bus D at that time is latched stored in the data display register 20. That is, the data of the new “E address” is stored in the data display register 20. The value is then displayed on the data display 14. If you want to stop displaying the data, simply press the calculation data display switch 24.
When A is returned to its original OFF state, the comparison circuit 25 stops comparing the address bus A and the output of the address generation circuit 26. Then, the multiplexer 21 transfers the output of the original non-volatile memory 17 to the data display 1.
The output is switched to 4.

In this way, the data calculated by the digital protective relay can be displayed by using the data setter that sets the set value of the setting section of the digital protective relay and the data display that displays the set value.

In the above embodiment, the calculation data to be displayed is only the method of displaying the impedance data up to the fault point when a distance relay is configured with a digital protective relay, but what kind of calculation data is displayed? For example, it may be an intermediate result of a calculation, a determination result of a circuit breaker trip, a timer value, etc. Furthermore, instead of the calculated data, it may be original data, for example, input data of the electric power system, that is, instantaneous values or effective values of the system voltage and current. The code set in the data setter of the setting section stores the memory address where the data to be displayed is stored in the address generation circuit, and indirectly specifies the memory address by detecting the match of the address bus with the CPU. However, the same effect can be obtained even if the address of the data to be displayed is directly specified using the data setting device and an address generation circuit is not provided. Also, the address generation circuit stores the memory address, but the code set by the data setting device is BCD (2
evolved decimal code), then 2 from the binary evolved decimal code.
A circuit that converts into a base number has the same effect. Furthermore, by setting a code that specifies a data group consisting of multiple data in the data setting device, the displayed data will be displayed consecutively in a predetermined order at an interval that is readable by the operator. A similar effect can be obtained by displaying data.

As described above, according to the present invention, the data display device that displays the setting value of the setting section of the digital protective relay and the data setter that sets the setting value calculate the data calculated from the digital protective relay when relay setting is not performed. In order to output data and input data to the display device, use the data setting device, specify the data you want to display, and display it on the data display device. Therefore, there is no need to take the trouble to connect a maintenance panel to check the status of the digital protective relay during operation, and the display can be easily displayed from the setting section, making maintenance extremely easy. In addition, since there is no need for a maintenance panel that is not normally required during operation of the digital protection relay, the cost is reduced. Furthermore, since the calculated data can be easily displayed when inspecting the digital protective relay or checking its characteristics, it has the advantage that characteristic tests can be easily performed in a short time. If the periodic inspection time for the protective relay is shortened, the period during which the protective relay is locked for inspection will also be shortened, which has the advantage of improving the stability of the power system.

[Brief explanation of drawings]

Figure 1 is a graph showing the characteristics of a distance relay, Figure 2 is a block diagram showing the configuration of a conventional digital protective relay, Figure 3 is a block diagram showing the configuration of the setting section of the digital protective relay shown in Figure 2, FIG. 4 is a block diagram showing the configuration of a digital protective relay according to an embodiment of the present invention, and FIG. 5 is a time chart of the addressing signal and data signal of the microprocessor in the configuration of FIG. 4. 1... Microprocessor (CPU), 2... Memory, 13... Data setting device, 14... Data display device,
15...Relay element selection switch, 16...Encoder circuit, 17...Nonvolatile memory, 18...Multiplexer, 20...Data display register, 21...Multiplexer, 22...Gate circuit A, 23...Gate circuit B, 24...Calculated data display switch , 25...
Comparison circuit, 26...address generation circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] 1. A CPU that inputs data from the power system and processes it, a memory that stores data for the CPU to calculate, and a relay element selection switch that includes a plurality of switches that specify relay elements. an encoder that outputs an address code corresponding to the switch selected by the relay element selection switch; and a first multiplexer that selectively outputs the address code output from this encoder and the address code output from the CPU. , a non-volatile memory connected to the first multiplexer and the CPU and storing a set value for the CPU to process; data for storing and updating the set value of the non-volatile memory; a data setter that sets a predetermined memory address; a comparator that is connected to the address bus of the CPU and generates an output signal when the memory address set in the data setter matches the memory address of the address bus; A register that is connected to the data bus of the CPU and stores the data on the data bus when an output signal of the comparator is generated; A second multiplexer that outputs a set value output from the memory, and a data display that displays the output of the second multiplexer, and the first multiplexer selects the address code of the encoder based on the output of the encoder. When the address code of the encoder is input from the first multiplexer, the non-volatile memory outputs the set value stored in the address code via the second multiplexer. It has a function to display and output to the data display and a function to store and update the setting value stored in the address code in the setting device set in the data setting device. When a predetermined memory address of the memory is set in the data setter, the memory address set in the data setter is compared with the memory address of the address bus, and the second multiplexer compares the memory address set in the data setter with the memory address of the address bus. A digital protective relay characterized in that the value stored in the register is displayed and output on a data display.