JPH0455011B2 - - Google Patents

Description

[Detailed description of the invention]

INDUSTRIAL APPLICATION FIELD The present invention relates to a code conversion method for converting an M-bit data word into an N-bit channel code word, which is applied when transmitting and recording digital signals. Conventional Structures and Problems The following four characteristics are generally known as necessary for communication channel codes used when magnetically recording digital signals. (1) The maximum number of consecutive bits k should be set because if either "0" or "1" continues for too long, it will be difficult to extract clock information and the self-clock function will not be available. In order to avoid this, it is desirable that k be large. (2) The minimum number of consecutive bits d is determined by the fact that the magnetic recording and reproducing system has the property of blocking high frequency components.
Channel codewords that frequently change between "0" and "1" are not appropriate. Therefore, the above d
is preferably large. (3) The detection window width T _W is a measure of the margin in the phase direction against time axis fluctuations such as jitter of the reproduced signal and peak shift due to waveform interference, and the larger the width, the better. (4) If the communication channel is connected by a rotary transformer, such as in a VTR, and the DC component is blocked, it is desirable that the channel code be a DC-free code that does not contain a DC component. By the way, the above conditions (1), (2), and (4) and the condition (3) are contradictory. Because (1), (2) and
In order to satisfy condition (4), it is necessary to convert the data word of M bits into a channel code word of N bits, which is larger than M, and T _W is where T is the bit length of the data word. , T _W =M/NT, so in this case T _W is always smaller than T. Therefore, in communication channels where it is desired to use DC free codes, the above (1) and
The channel code to be used differs depending on whether (2) or (3) is more important. Generally, d
If you increase Tmin, Tmin will increase, but T _W will decrease. Conventionally, various DC-free codes have been developed from the above point of view. 11) is one of them.The 9/10 conversion code is M=9, N=10, d=1,
It is a DC free code having the characteristics of k=12 and T _W =0.9T, and emphasizes T _W , but has the drawback that k is large. Purpose of the Invention The purpose of the present invention is to increase the number of consecutive bits of "0" or "1" at both the left and right ends of the channel _code word to be used, and to By establishing unique rules for both the connection conditions between code words and the correspondence between data words and communication channel code words, the above (1) can be achieved.
Or (3), it is an object of the present invention to provide a systematic code conversion method capable of obtaining a DC-free code having superior performance compared to conventional methods. Structure of the Invention In order to achieve the above object, the present invention provides a code conversion method for converting two or more M-bit data words into a channel code word of N bits greater than M, comprising:
For the positive odd number k less than or equal to N, let k' be the largest integer not exceeding k/2, and the starting end L of the 2N channel codewords obtained by the ^N bits.
The number of consecutive bits of “1” in k is 1 or more
The number r of consecutive bits of "0" or "1" in the terminal part R is less than or equal to the above k', and the number of consecutive bits of "1" in the intermediate part B sandwiched between the above L and the above R is as follows. A channel code word composed of the L, R, and B in which the number of consecutive bits of "0" is less than or equal to the k is defined as a CCO, and "1" for all bits of the CCO is defined as a "0".
, the back pattern of the CCO in which “0” is replaced with “1” is used, and in the CCO, the 1 is k-
For the communication channel code word CWO of k′ or less and its back pattern, the data end is made to correspond to each other, and for the communication channel CW1 and its back pattern 1 for which the above 1 is k−k′+1 or more among the CCO. The same data words are associated with each other, and the selection of CW1 and 1 is based on keeping the number of consecutive bits of the same binary value below k. DC of d=1 showing the performance
A free code is obtained. DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below based on the drawings. First, the rules will be described in detail, but for convenience of explanation, they are divided into () the case of DC free codes in general, and () the case of DC free codes with d=1. First, regarding () (): Add +1 to “1” in the channel code word,
The value obtained by assigning -1 to "0" and adding it is called the disparity (hereinafter referred to as DP) of the channel codeword. The integral value of +1 and -1 from the beginning of the column to an arbitrary bit is called a digital sum variation (hereinafter referred to as DSV). If the DSV is always finite without diverging to +∞ or -∞, the channel code is a DC-free code. Next, regarding (), (): Since the channel codeword length is finite, DP
It is also finite, so by using a channel code word that has a DP of opposite polarity to DSV, depending on the sign of DSV,
DSV can be kept to a finite value. Also,
In order to maintain k at a predetermined value, channel codewords are selected based on the following criteria. (-1): When k is an odd number and k' is the largest integer not exceeding k/2, N starting with "1"
The number l of consecutive "1" bits on the left side L of the bit channel code word is 1 or more and no more than k, and the number r of consecutive "0" or "1" bits on the right side R is 1 or more and no more than k', And in the middle part B of b=N-l-r bits, there is a communication path constituted by L, B, and R such that consecutive "0" and "1" of 1 bit or more and k bits or less appear alternately. With the code word CCO (Figure 3a), for all bits of CCO, “0” and “1”, “1”
CCO back pattern replacing “0” with
Select CCO (Figure 3b). Note that CCO and includes those where b=0. Next, the correspondence between the channel code words and data words selected in this way will be described. (-2): Channel codeword selected in (-1)
Among the CCOs, in the channel code word where l is less than or equal to k-k',
The channel code word CWO with DP=0 and the corresponding
One data word is associated with each CWC back pattern. Among the CCOs, the channel code word CW1 in which l is less than or equal to k-k' and DP≠0 is paired with its back pattern 1, and a data word is associated with each pair. (-3): Among the communication channel code words CCO, the above l
Among the channel codewords where is k−k′+1 or more, the channel codeword CW2 with DP=0 is
Pair it with the back pattern 2,
A data word is associated with each pair. (-4): Of the channel code word CCO, l is k
−k′+1 or more channel codewords,
Channel codeword CW3 with DP>0 and DP<0
The channel code word CW4 and its back patterns 3 and 4 are made into a set, and data words are made to correspond to each set. Next, it will be shown that the correspondence between channel code words and data words shown in (-1) to (-4) above satisfies the k limit and the DSV finite limit. However, the first channel code word W1 where l=l ₁ and r=r ₁
and a second channel code word W2 with l=l ₂ and r=r ₂ are connected. In addition, below, the final bit of W1 is called LB, and the disparity of W2 is called DP.
shall be. (a1) When W2=CWO or, connect as is. Since CWO and are DP=0,
Even if you connect as is, |DSV| will not increase. Also, the maximum value of r ₁ is k′, CWO and l
Since the maximum value of is k-k', the number of consecutive "0" or "1" bits at the connection never exceeds k. (a2) For both CW1 and 1, the maximum value of l is k
−k′, so the k restriction is satisfied for the same reason as (a1). Therefore, it is only necessary to prevent the increase in |DSV|. Therefore, we define the connection rule for DSV up to the final bit of W1 as follows. (a2, 1) When DP>0, DSV0, W2=
CW1 (a2, 2) When DP<0, DSV0, W2=
CW1 (a2, 3) When DP>0, DSV<0, W2=
CW1 (a2, 4) When DP<0, DSV<0, W2=
CW1 (a3) Since CW2 and 2 have DP=0, |
DSV| will not increase. Therefore, k
Since the only problem is the restriction, we define the connection rule as follows. (a3, 1) When LB is “1”, W2 = 2 (a3, 2) When LB is “0”, W2 = CW2 Since the L part of CW2 is “1”, it is clear that the k restriction is satisfied. It is. (a4) CW3, 3, CW4 and 4 are all
Since DP≠0 and the number of consecutive bits of "0" or "1" in the L part is greater than or equal to k-k'+1 and less than or equal to k, it is possible to satisfy the k limit without increasing |DSV|. Therefore, we define the following connection rule. (a4, 1) When DSV0 (a4, 1, 1) When LB is “1” W2=
CW3 (a4, 1, 2) When LB is “0”, W2=
CW4 (a4, 2) When DSV<0 (a4, 2, 1) When LB is “1” W2=
CW4 (a4, 2, 2) When LB is “0” W2=
The DP of both CW3 3 and CW4 is negative, and 4,
Since the DP of both CW3 is positive, |DSV| will not increase due to the above connection law. Also, 3
Since the L part of and 4 is "0" and the L part of CW3 and CW4 is "1", the k restriction is satisfied. (-1) to (-4) and (a1) mentioned above
~(a4) By the code conversion method defined in (a4), k
A limited DC-free code is obtained. Next, a circuit configuration diagram for implementing the above code conversion method is shown in FIG. The operation will be explained below. First, the M-bit data word is ROM101.
It is added to both address parts of ROM 102 at the same time. The ROM 101 contains the communication channel code word.
CWO, , CW1, CW2, CW3 and their disperity DP values, and the L part is k
A value F that is set to "0" if it is less than or equal to -k' and "1" otherwise is stored, and the ROM 102 stores the channel code word CW4, the value of each DP, and the above F value. There is. The respective values corresponding to the M-bit data word then appear at the output terminals of ROM 101 and ROM 102. Then, among the outputs of the ROM 101, N
The bit channel code word is sent to the parallel-to-serial converter 103, and after being converted to serial, one is left as it is and the other is passed through the inverter 104.
4tol multiplexer 105. Similarly, the N-bit channel codeword appearing at the output terminal of ROM 102 is transmitted to parallel-to-serial converter 1.
06, one side is connected to multiplexer 1 as it is.
05, and the other is sent to multiplexer 105 through inverter 107. Among the four types of channel codewords obtained in this way, one
The channel code word selection circuit 108 generates a switching signal for selecting a type of channel code word. This circuit is a circuit based on the connection rules (a1) to (a4) above, and includes ROM101 and ROM1.
It operates based on DP and F from 02 and the values of the last bits LB and DSV of the channel code word sent out to the channel one time ago, which are taken into the final bit holding circuit 109. Note that the DSV is calculated in the channel codeword selection circuit 108. Table 1 shows the connection rules (a1) to (a4) above. In Table 1, if DSV0, DV=“0”, if DSV<0, DV=“1”, DP=
If 0, P1="1", If DP>0, P1="0", P2
= “0”, if DP < 0, P1 = “0”, P2 = “1”, P2 uses the sign bit of disparity DP, and P1 is the negation of the product of all bits representing DP. and is calculated in the channel codeword selection circuit 108.

[Table] Also, select code SC1 is ROM101 and ROM
Used to select 102, and when SC1="0", ROM
101 is selected, and the select code SC2 is for selecting whether to transmit the channel code word as it is or to transmit it as a hidden pattern, SC2=
When it is "0", it is sent as is. According to Table 1, SC1 and SC2 are each expressed as follows. SC1=1+・P2・F SC2=F・LB+1+2 However, “・” represents logical product, “ ^- ” represents negation, “” represents exclusive OR, and “+” represents logical OR. The above equation can be expressed using a logic circuit as shown in FIG. SC1 is obtained by exclusive OR gate 201, NOR gate 202 and AND gate 203, exclusive OR gate 204, AND gate 205, NOR gate 206 and OR gate 207
SC2 is obtained by As described above, it can be seen that the present invention can be configured with a simple circuit. Next, the present invention will be explained using specific examples. Example 1 As a first example of the present invention, M=9, N=
10, Tmin=0.9T, Tmax=6.3T, k=7, T _W =
Let's take a DC free code of 0.9T as an example and explain it. The first embodiment is composed of channel codewords having a codeword length of 10 bits as shown in Tables 2.1 to 2.10. These channel codewords are k=7 and N=10
539 (>512=2 ⁹ ) as is clear from Tables 2.1 to 2.10.
Since there are 9 channel code words, one-to-one correspondence with 9-bit data words is possible. That is, M=9
It is. Therefore, in the first embodiment, k=7,
N = 10, T _W = 0.9T can be achieved, compared to conventional 9/10 conversion.
Compared to the DC free code, k can be reduced by 5 while N and T _W are the same. That is, about k
A significant improvement of 41% is made. In addition, in Tables 2.1 to 2.10, communication channel codeword numbers No. 1 to 240 are the communication channel codewords CWO and
Similarly to CWO, Nos. 241 to 539 are the communication channel code word CW1
and belongs to CW1. In the first embodiment, the channel code words CW2, CW3, CW4 and the channel code words belonging to these back patterns do not exist. By the way, out of these 539 channel codewords, how to select the 512 channel codewords necessary for one-to-one correspondence with data words takes into consideration various factors. It is difficult to say which one is better, but as an example, let's choose a channel codeword that reduces PSV fluctuations. This is due to the following reason. In other words, no matter which 512 channel codewords are selected from among the 539 channel codewords in Table 2, the above (a1) to
As long as the connection law of (a4) is followed, the DC component will always be zero, but this is a long-term average and there will be some fluctuations in the short term. This fluctuation range is related to the fluctuation range of DSV, so
If the fluctuation range of DSV is small, the fluctuation of the DC component in a short period of time will also be small. Also, the fluctuation range of DSV is determined by the channel code word disparity DP used.
Therefore, in order to reduce the fluctuation range of DSV, it is sufficient to use a channel codeword with a small |DP|.

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[Table] As is clear from Table 2, the number of channel code words of |DP|4 is 520, so the channel code word of |DP|4 alone has one pair with 512 data words of 9 bits. 1 correspondence becomes possible. Note that in the first embodiment, the channel code word
Since CW4 and CW4 do not exist, the ROM 102 and parallel-serial converter 10 in FIG.
6 and MOT gate 107 are no longer necessary, and
The 4to1 multiplexer 105 is replaced with a 2to1 multiplexer, and the exclusive OR gate 2 in FIG. 2 is used to generate the select signal SC1.
01, NOR gate 202 and AND gate 203
can be omitted, and the circuit configuration can be further simplified. As described above, the code conversion method of this embodiment, which can reduce k by 41% compared to the conventional 9/10 conversion code, is suitable for applications that require high-density recording such as digital image magnetic recording. In some cases, the improvement effect can be particularly obtained, and the practicality is very high. Example 2 As a second example of the present invention, M=11, N=12,
Tmin0.92T, Tmax7.6T, k=7 and T _W
A DC free code of 0.92T will be explained. In this second embodiment, the number of N = 12-bit channel code words is 2097, and the number of 11-bit channel code words is 2048.
One-to-one correspondence with data words is possible, and T _W =
M/NT=11/12T0.92T. This is about 41% smaller in k and about 2.2% wider in T _W than the conventional 9/10 conversion code. Example 3 As a third example of the present invention, M=16, N=
18, Tmin0.89T, Tmax=4.4T, k=5 and
A DC free code with T _W =0.89T will be explained. In this third embodiment, the number of N = 18 bit channel code words is 89948, which is 65536 consisting of M = 16.
One-to-one correspondence with data words is possible, and T _W =
16/18T becomes 0.89T. Therefore, T _W is approximately 1% smaller than the conventional 9/10 conversion code, but
Conversely, k can be significantly reduced to 1/2.4. Effects of the Invention As described above, according to the code conversion method of the present invention, appropriate constraints are placed on the number of consecutive “0” and “1” at both the left and right ends of the channel code word, and the disparity DP and By appropriately determining the correspondence between channel code words and data words,
For example, the conventional 9/10 as shown in Examples 1 to 3
It is a highly practical code conversion method that enables the realization of DC-free codes that are far superior to conversion codes, and is suitable for applications in fields where high-density recording is unavoidable, such as digital image or digital audio signal recording.

[Brief explanation of drawings]

Figure 1 is a block diagram of a circuit for realizing the present invention, Figure 2 is a circuit diagram of a switching signal generation circuit for selecting a channel codeword, and Figures 3a and b are N-bit channel codewords. FIG. 2 is a diagram showing an example of a pattern, and a diagram showing a back pattern thereof. 101,102...ROM, 103,106...Parallel-serial converter, 104,107...
NOT circuit, 105...4to1 multiplexer, 10
8...Communication channel code word selection circuit, 109...Last bit holding circuit.

Claims (1)

[Scope of Claims] 1. A code conversion method for converting a data word of 2 or more M bits into a channel code word of N bits larger than M, which As the largest integer not exceeding k/2, among the ^2N channel codewords obtained by the N bits, the number l of consecutive "1" bits at the starting end L is 1.
above k or less, and "0" at the terminal R
Or, the number r of consecutive bits of "1" is less than or equal to the above k', and the number of consecutive bits of "1" and the number of consecutive bits of "0" in the intermediate part B sandwiched between the above L and the above R are both the above k'. The above L and R are less than or equal to k.
The communication channel code composed of and B is CCO,
The CCO in which “1” is replaced with “0” and “0” is replaced with “1” for all bits of the CCO.
The back pattern CCO of
A data word is made to correspond to the channel code word CWO whose value is less than or equal to k−k′ and its back pattern, and a channel code word CW1 whose value is equal to or greater than k−k′+1 among the CCO and its The same data word is made to correspond to the back pattern 1, and the CW1
1. A code conversion method, characterized in that the selection of (1) and (1) is made on the basis of keeping the number of consecutive bits of the same binary value below k. 2 Disparity of N-bit channel codeword
When DP is defined as the difference between the number of “1” and “0” in the channel code word, the channel code word
Of CCO, the l is less than or equal to k−k′ and DP=
For the communication channel code word CWO of 0 and its back pattern, data words are made to correspond to each,
l of CCO is less than or equal to k−k′, and DP≠0
The channel code word CW1 and its back pattern 1 are made into a pair, and a data word is associated with each pair. and its back pattern 2 are paired, and data words are associated with each pair, so that l of CCO is k−k′+
Channel codeword that is 1 or more and DP>0
By combining CW3, the channel code word CW4 with DP < 0, and their back patterns, channel code words 3 and 4, and associating data words with each set, it is possible to connect the channel code words to each other. Claim 1 is characterized in that the maximum number of consecutive bits of "0" and "1" in the resulting bit string is limited to k, and the integral value of the disparity DP is kept finite. code conversion method. 3. The code conversion method according to claim 2, characterized in that M=9, N=10 and k=7. 4. The code conversion method according to claim 3, wherein a channel code of 4 |DP|4 is used. 5. The code conversion method according to claim 2, characterized in that M=11, N=12, and k=7. 6. The code conversion method according to claim 2, characterized in that M=16, N=18, and k=5.