JPH0452739U - - Google Patents
Info
- Publication number
- JPH0452739U JPH0452739U JP9440290U JP9440290U JPH0452739U JP H0452739 U JPH0452739 U JP H0452739U JP 9440290 U JP9440290 U JP 9440290U JP 9440290 U JP9440290 U JP 9440290U JP H0452739 U JPH0452739 U JP H0452739U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
Landscapes
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9440290U JPH0452739U (ja) | 1990-09-07 | 1990-09-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9440290U JPH0452739U (ja) | 1990-09-07 | 1990-09-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0452739U true JPH0452739U (ja) | 1992-05-06 |
Family
ID=31832311
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9440290U Pending JPH0452739U (ja) | 1990-09-07 | 1990-09-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0452739U (ja) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6144836B2 (ja) * | 1980-10-24 | 1986-10-04 | Kurosaki Refractories Co | |
| JPS6237939B2 (ja) * | 1982-08-05 | 1987-08-14 | Kazuo Iwata | |
| JPS634633A (ja) * | 1986-06-25 | 1988-01-09 | Hitachi Ltd | バンプレスフイルムキヤリア |
-
1990
- 1990-09-07 JP JP9440290U patent/JPH0452739U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6144836B2 (ja) * | 1980-10-24 | 1986-10-04 | Kurosaki Refractories Co | |
| JPS6237939B2 (ja) * | 1982-08-05 | 1987-08-14 | Kazuo Iwata | |
| JPS634633A (ja) * | 1986-06-25 | 1988-01-09 | Hitachi Ltd | バンプレスフイルムキヤリア |