JPH0452626B2 - - Google Patents
Info
- Publication number
- JPH0452626B2 JPH0452626B2 JP60011876A JP1187685A JPH0452626B2 JP H0452626 B2 JPH0452626 B2 JP H0452626B2 JP 60011876 A JP60011876 A JP 60011876A JP 1187685 A JP1187685 A JP 1187685A JP H0452626 B2 JPH0452626 B2 JP H0452626B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit package
- temperature
- connector
- heat sink
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001514 detection method Methods 0.000 claims description 8
- 230000006378 damage Effects 0.000 description 9
- 239000000919 ceramic Substances 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Details Of Measuring And Other Instruments (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電子機器類に於ける集積回路パツケー
ジに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to integrated circuit packages in electronic equipment.
近年、電子計算機を始めとする電子機器は、小
型化しかつ動作速度の高速化に伴い、複数個の集
積回路パツケージ等の電子部品を高密度に実装し
ている。そのため、機器内での電子部品の単位体
積当りの発熱量が増加している。この熱の除去及
び機器内の温度の検出は従来第５図に示す様な方
法が知られている。
2. Description of the Related Art In recent years, electronic devices such as computers have become smaller and operate at higher speeds, and electronic components such as a plurality of integrated circuit packages are mounted in high density. Therefore, the amount of heat generated per unit volume of electronic components within the device is increasing. A method as shown in FIG. 5 is conventionally known for removing this heat and detecting the temperature inside the device.
すなわち、電子機器の筐体１０の上下に冷却用
フアン１１を取り付け、プリント回路基板１２上
の集積回路パツケージ１３より発生する熱を筐体
１０の外に排出し、温度センサー６により筐体１
０内の温度を検出、監視しその温度が集積回路パ
ツケージ１３に損傷を与えるかもしくは破壊する
までに達した場合、警告を発したり、電子機器の
動作を停止する等の処理を行つていた。 That is, cooling fans 11 are attached to the top and bottom of a housing 10 of an electronic device, heat generated from an integrated circuit package 13 on a printed circuit board 12 is discharged outside the housing 10, and a temperature sensor 6 is used to cool the housing 1.
The system detects and monitors the temperature inside 0, and if the temperature reaches a level that damages or destroys the integrated circuit package 13, it issues a warning or takes actions such as stopping the operation of the electronic equipment. .
最近、集積回路の高集積化、実装の高密度化は
さらに進んでおり、電子機器内の発熱量は著しく
増加している。そのため、筐体内の冷却能力を向
上させると共に、最も集積回路に近い位置で集積
回路パツケージごとに温度を検出、監視し、熱に
よる集積回路の損傷、破壊を防ぐ制御の必要が生
じている。 BACKGROUND ART Recently, integrated circuits have become more highly integrated and more densely packaged, and the amount of heat generated within electronic devices has increased significantly. Therefore, in addition to improving the cooling capacity within the housing, there is a need for control to detect and monitor the temperature of each integrated circuit package at the location closest to the integrated circuit to prevent damage or destruction of the integrated circuit due to heat.
上述した第５図に於ける従来の温度検出におい
ては、筐体１０内の全体の温度の検出を行うこと
としていたため、集積回路パツケージ１３ごとに
温度の検出、監視を行うことは出来ず、熱による
集積回路パツケージごとの損傷、破壊を防ぐ制御
が行えないという欠点があつた。
In the conventional temperature detection shown in FIG. 5 described above, the entire temperature inside the housing 10 is detected, so it is not possible to detect and monitor the temperature of each integrated circuit package 13. The drawback was that it was not possible to control the damage and destruction of each integrated circuit package due to heat.
本発明は前記問題点を解消するもので、集積回
路パツケージごとに温度監視ができるようにした
集積回路パツケージ構造を提供するものである。 The present invention solves the above problems and provides an integrated circuit package structure that allows temperature monitoring of each integrated circuit package.
上記目的を達成するため、本発明による集積回
路パツケージにおいては、電子機器の筐体内に、
高密度に実装される集積回路パツケージであつ
て、
ヒートシンクと温度検出用センサーとを有し、
ヒートシンクは、集積回路パツケージに取付け
られたものであり、
温度検出用センサーは、筐体内に実装される
個々の集積回路パツケージのヒートシンク内に埋
込まれ、コネクタを有し、
コネクタは、集積回路パツケージが搭載される
プリント回路基板上のコネクタに接して温度検出
回路に接続するものである。
In order to achieve the above object, the integrated circuit package according to the present invention includes
An integrated circuit package that is mounted in high density and includes a heat sink and a temperature detection sensor, the heat sink being attached to the integrated circuit package, and the temperature detection sensor being mounted inside the housing. It is embedded within the heat sink of each integrated circuit package and has a connector that connects to a temperature sensing circuit to a connector on the printed circuit board on which the integrated circuit package is mounted.
次に本発明の一実施例を第１図〜第４図に基づ
いて説明する。第１図に於いて、２は集積回路パ
ツケージ１３のセラミツク基板であり、セラミツ
ク基板２は信号電源グランド用等の貫通ピン３、
ヒートシンク１、及び第３図に示す集積回路チツ
プキヤリア８を備えている。９は集積回路チツプ
キヤリア８の信号線である。上記ヒートシンク１
にはヒートシンク１の熱特性にほとんど影響を与
えない程度の狭い通し溝７があり、通し溝７には
第２図に示す様に温度センサー６、及び温度セン
サー６の信号線５がヒートシンク１とは絶縁され
て埋め込まれている。信号線５の端には第１，２
図に示すようにプリント基板接続用のコネクタ４
が取り付けてある。第４図に示すようにコネクタ
４を集積回路パツケージ１３が搭載されるべきプ
リント回路基板１２上に用意されたコネクタ４′
と接続することにより前記コネクタ４′に接続さ
れているプリントパターンを通して図示せぬ温度
検出回路に接続される。ここで、使用される温度
センサー６としては、サーミスタ、熱電対または
半導体温度センサー（例えば、アナログ・デバイ
セズ社製AD590等）いずれであつてもよい。上
記構成により、集積回路パツケージを、高密度に
実装して電気機器の筐体に収納したときに、集積
回路パツケージ１３ごとに温度の検出監視が可能
となり、熱による損傷破壊を防ぐための警告の発
生や、電子機器の動作の停止等の制御が可能とな
る。尚、本実施例では集積回路チツプを１個搭載
したシングルチツプパツケージの例を示したが、
複数の集積回路チツプを搭載したマルチ・チツプ
パツケージに対しても同様の構造で温度を検出で
きることは言うまでもない。又コネクタ４をプリ
ント基板上に用意したコネクタ４′に接続する例
を示したが、コネクタ４を直接温度検出回路に接
続してもよい。
Next, one embodiment of the present invention will be described based on FIGS. 1 to 4. In FIG. 1, 2 is a ceramic substrate of an integrated circuit package 13, and the ceramic substrate 2 has through pins 3 for signal power ground, etc.
A heat sink 1 and an integrated circuit chip carrier 8 shown in FIG. 3 are provided. 9 is a signal line of the integrated circuit chip carrier 8. Above heat sink 1
has a narrow through groove 7 that hardly affects the thermal characteristics of the heat sink 1, and the through groove 7 has a temperature sensor 6 and a signal line 5 of the temperature sensor 6 connected to the heat sink 1, as shown in FIG. is insulated and embedded. At the end of the signal line 5 are the first and second
Connector 4 for connecting the printed circuit board as shown in the figure
is installed. As shown in FIG. 4, the connector 4 is connected to a connector 4' prepared on the printed circuit board 12 on which the integrated circuit package 13 is to be mounted.
By connecting it to the connector 4', it is connected to a temperature detection circuit (not shown) through the printed pattern connected to the connector 4'. Here, the temperature sensor 6 used may be a thermistor, a thermocouple, or a semiconductor temperature sensor (for example, AD590 manufactured by Analog Devices, etc.). The above configuration makes it possible to detect and monitor the temperature of each integrated circuit package 13 when the integrated circuit packages are packed in high density and housed in the housing of an electrical device, and to issue a warning to prevent damage and destruction due to heat. This makes it possible to control the generation of electronic devices and stop the operation of electronic devices. Although this embodiment shows an example of a single chip package equipped with one integrated circuit chip,
It goes without saying that a similar structure can be used to detect the temperature of a multi-chip package equipped with a plurality of integrated circuit chips. Further, although an example has been shown in which the connector 4 is connected to a connector 4' prepared on a printed circuit board, the connector 4 may be directly connected to the temperature detection circuit.
本発明の集積回路パツケージ構造は上記の構造
としたため、温度センサーにより集積回路パツケ
ージごとに温度を検出、監視することができ、従
来のように複数の集積回路パツケージを収容する
電子機器の筐体内の温度を検出する場合に比べ、
確実に集積回路の損傷、破壊を防止でき、近年の
集積回路の高集積化、実装の高密度化に確実に対
処できるという効果がある。
Since the integrated circuit package structure of the present invention has the above structure, it is possible to detect and monitor the temperature of each integrated circuit package using a temperature sensor. Compared to detecting temperature,
It has the effect of reliably preventing damage and destruction of integrated circuits, and of being able to reliably cope with the recent increase in the degree of integration and packaging density of integrated circuits.
第１図は本発明の一実施例を示す斜視図、第２
図は第１図をＡ方向から見た平面図、第３図は第
１図のBB断面図、第４図は第１図の実施例をプ
リント回路基板に実装した時の斜視図、第５図は
従来の電子機器における集積回路パツケージの温
度検出構を示す概略図である。
１……ヒートシンク、２……セラミツク基板、
３……貫通ピン、４，４′……コネクタ、５……
信号線、６……温度センサー、７……通し溝、８
……集積回路チツプキヤリア、９……リード、１
０……筐体、１１……冷却用フアン、１２……プ
リント回路基板、１３……集積回路パツケージ。
Fig. 1 is a perspective view showing one embodiment of the present invention;
The figures are a plan view of Fig. 1 viewed from direction A, Fig. 3 is a BB sectional view of Fig. 1, Fig. 4 is a perspective view of the embodiment shown in Fig. 1 mounted on a printed circuit board, and Fig. 5 is a plan view of Fig. 1 viewed from direction A. The figure is a schematic diagram showing a temperature detection structure of an integrated circuit package in a conventional electronic device. 1...Heat sink, 2...Ceramic substrate,
3...Through pin, 4,4'...Connector, 5...
Signal line, 6...Temperature sensor, 7...Through groove, 8
...Integrated circuit chip carrier, 9...Lead, 1
0... Housing, 11... Cooling fan, 12... Printed circuit board, 13... Integrated circuit package.
Claims (1)
積回路パツケージであつて、 ヒートシンクと温度検出用センサーとを有し、 ヒートシンクは、集積回路パツケージに取付け
られたものであり、 温度検出用センサーは、筐体内に実装される
個々の集積回路パツケージのヒートシンク内に埋
込まれ、コネクタを有し、 コネクタは、集積回路パツケージが搭載される
プリント回路基板上のコネクタに接して温度検出
回路に接続するものであることを特徴とする集積
回路パツケージ。[Scope of Claims] 1. An integrated circuit package that is densely mounted in a housing of an electronic device, and includes a heat sink and a temperature detection sensor, the heat sink being attached to the integrated circuit package. Yes, the temperature sensing sensor is embedded within the heat sink of each integrated circuit package mounted within the housing and has a connector that contacts a connector on the printed circuit board on which the integrated circuit package is mounted. An integrated circuit package characterized in that it is connected to a temperature detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1187685A JPS61171157A (en) | 1985-01-25 | 1985-01-25 | Ic package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1187685A JPS61171157A (en) | 1985-01-25 | 1985-01-25 | Ic package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61171157A JPS61171157A (en) | 1986-08-01 |
| JPH0452626B2 true JPH0452626B2 (en) | 1992-08-24 |
Family
ID=11789926
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1187685A Granted JPS61171157A (en) | 1985-01-25 | 1985-01-25 | Ic package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61171157A (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0320198B1 (en) * | 1987-12-07 | 1995-03-01 | Nec Corporation | Cooling system for IC package |
| DE68918156T2 (en) * | 1988-05-09 | 1995-01-12 | Nec Corp | Flat cooling structure for integrated circuit. |
| US4975766A (en) * | 1988-08-26 | 1990-12-04 | Nec Corporation | Structure for temperature detection in a package |
| JPH06100408B2 (en) * | 1988-09-09 | 1994-12-12 | 日本電気株式会社 | Cooling system |
| CA1304830C (en) * | 1988-09-20 | 1992-07-07 | Toshifumi Sano | Cooling structure |
| US7962306B2 (en) | 2008-05-09 | 2011-06-14 | International Business Machines Corporation | Detecting an increase in thermal resistance of a heat sink in a computer system |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4712857U (en) * | 1971-03-10 | 1972-10-16 |
-
1985
- 1985-01-25 JP JP1187685A patent/JPS61171157A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61171157A (en) | 1986-08-01 |
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