JPH0451972B2 - - Google Patents

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Publication number
JPH0451972B2
JPH0451972B2 JP58136119A JP13611983A JPH0451972B2 JP H0451972 B2 JPH0451972 B2 JP H0451972B2 JP 58136119 A JP58136119 A JP 58136119A JP 13611983 A JP13611983 A JP 13611983A JP H0451972 B2 JPH0451972 B2 JP H0451972B2
Authority
JP
Japan
Prior art keywords
substrate
semiconductor substrate
chamber
film
lamp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58136119A
Other languages
Japanese (ja)
Other versions
JPS6028235A (en
Inventor
Kunyuki Hamano
Yoichiro Numazawa
Koji Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP13611983A priority Critical patent/JPS6028235A/en
Publication of JPS6028235A publication Critical patent/JPS6028235A/en
Publication of JPH0451972B2 publication Critical patent/JPH0451972B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H01L21/2686Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation using incoherent radiation

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法に関し特に半導
体基板表面を清浄化する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for cleaning the surface of a semiconductor substrate.

集積回路を含む半導体装置の製作過程では半導
体基板上に絶縁膜、導体膜及び半導体膜の成長が
多数回採用される。これら各種の膜形成法として
は真空蒸着法、真空スパツタ法、イオンクラスタ
ビーム法、減圧気相成長法等、多くの方法が挙げ
られる。これらの膜形成法に於いては成長条件の
制御と共に膜が形成される基板表面の清浄度が非
常に重要である。これは膜が成長される基板表面
が汚染されていて異物質が残存していると、成長
された膜中に異物質が拡散し膜が汚染される、異
物質を成長核として、膜の異常成長が生じ、不均
一な膜が成長する、膜と基板との密着度が悪く成
長された膜が基板から剥離してしまう等の望まし
からざる現象が生してしまう為である。
In the manufacturing process of semiconductor devices including integrated circuits, insulating films, conductive films, and semiconductor films are grown on a semiconductor substrate many times. These various film forming methods include many methods such as a vacuum evaporation method, a vacuum sputtering method, an ion cluster beam method, and a reduced pressure vapor phase growth method. In these film forming methods, control of growth conditions and cleanliness of the substrate surface on which the film is formed are very important. This is because if the surface of the substrate on which the film is grown is contaminated and foreign substances remain, the foreign substances will diffuse into the grown film and contaminate the film. This is because undesirable phenomena occur, such as growth of a non-uniform film, or poor adhesion between the film and the substrate, causing the grown film to peel off from the substrate.

従来、半導体装置の製造過程に於いて用いられ
る基板表面の清浄化法は、湿式の化学清浄であ
る。即ち基板がシリコン基板である場合には通常
数十度Cの温度に熱せられた硝酸、塩酸、硫酸等
のシリコン基板を侵さない化学液中に浸漬する方
法や同じく数十度Cに熱せられたアンモニア、過
酸化水素水、水の混合液に浸漬する方法等が使用
される。これらの化学液による洗浄後基板は純水
により水洗され乾燥され、膜形成が行われる。
又、基板がシリコン以外の半導体基板に於いて
も、同様に基板が侵されない様な化学液によつて
清浄され水洗後膜形成が行われる。
Conventionally, a method for cleaning the surface of a substrate used in the manufacturing process of semiconductor devices is wet chemical cleaning. In other words, when the substrate is a silicon substrate, there is a method of immersing it in a chemical solution that does not attack the silicon substrate, such as nitric acid, hydrochloric acid, sulfuric acid, etc. that is heated to a temperature of several tens of degrees Celsius, or a method that is heated to a temperature of several tens of degrees Celsius. A method such as immersion in a mixed solution of ammonia, hydrogen peroxide, and water is used. After cleaning with these chemical solutions, the substrate is washed with pure water and dried to form a film.
Further, even when the substrate is a semiconductor substrate other than silicon, the substrate is similarly cleaned with a chemical solution that does not attack the substrate, and the film is formed after washing with water.

しかしながらこれ等通常の化学的清浄法によつ
て清浄化された半導体基板表面には、化学液の分
子、原子が水洗によつて必ずしも全て除去されず
残つている。水洗後、乾燥工程を終た後でも水分
子が吸着している。化学液や純水中に含まれる有
機物質等が吸着している、空気中に曝される事に
より空気中の水分子を含む多くのガス分子が吸着
している等、基板を構成している原子以外の不純
物原子が吸着している事が多く、基板上に形成さ
れた膜質の制御や特に又膜と基板界面の化学的物
理的不安定性の為に電気的特性の制御が困難とな
る事が多かつた。この為半導体基板上に金属膜を
蒸着形成してシヨツトキーバリヤー構造を形成し
た時に、理論的な値からずれるとかその特性が一
定しない、又半導体と金属間のオーミツク抵触を
形成した時の抵抗値が大きくかつ特性が一定しな
い等大きな問題点が生じていた。
However, on the surface of a semiconductor substrate cleaned by these ordinary chemical cleaning methods, the molecules and atoms of the chemical solution are not necessarily completely removed by water washing and remain. Even after washing with water and completing the drying process, water molecules are still adsorbed. Organic substances contained in chemical liquids and pure water are adsorbed, and when exposed to the air, many gas molecules including water molecules in the air are adsorbed, etc., making up the substrate. Impurity atoms other than atoms are often adsorbed, making it difficult to control the quality of the film formed on the substrate and, in particular, to control the electrical properties due to the chemical and physical instability of the interface between the film and the substrate. There were many. For this reason, when a shot-key barrier structure is formed by depositing a metal film on a semiconductor substrate, the resistance may deviate from the theoretical value or its characteristics may not be constant, or the resistance may deviate from the theoretical value or the properties may be inconsistent due to ohmic contact between the semiconductor and the metal. There were major problems such as large values and inconsistent characteristics.

本発明の目的は上記の欠点を除去した基板表面
の清浄化法を含む半導体装置の製造方法を提供す
る事がある。
An object of the present invention is to provide a method for manufacturing a semiconductor device, including a method for cleaning a substrate surface, which eliminates the above-mentioned drawbacks.

本発明の半導体装置の製造方法は、通常の化学
的洗浄を行つた後、半導体基板を真空中に設置
し、該基板表面に紫外線を含む第1の光線と、赤
外線を含む第2の光線を同時にもしくは独立に照
射しその後膜形成を行う事を特徴とする。
In the method for manufacturing a semiconductor device of the present invention, a semiconductor substrate is placed in a vacuum after normal chemical cleaning, and a first light beam containing ultraviolet light and a second light beam containing infrared light are applied to the surface of the substrate. It is characterized by simultaneous or independent irradiation and subsequent film formation.

本発明の半導体装置の製造方法によれば通常の
化学的洗浄後基板表面に吸着していた異分子のう
ち水分子及び有機物質の少くも一部が照射された
紫外線の光子エネルギーを吸収する事により切断
され、表面から解離しやすくなつて除去され、清
浄な基板表面が得られる。従つてその後膜形成を
行うと、非常に膜質に均一になり、かつ基板と膜
の界面の状態が良好になるという大きな利点を有
する様になる。
According to the method for manufacturing a semiconductor device of the present invention, at least a part of water molecules and organic substances among the foreign molecules adsorbed on the substrate surface after normal chemical cleaning absorbs the photon energy of the irradiated ultraviolet rays. It is cut, easily dissociated from the surface, and removed, resulting in a clean substrate surface. Therefore, when the film is formed after that, it has the great advantage that the film quality becomes very uniform and the condition of the interface between the substrate and the film becomes good.

次に本発明をよりよく理解する為に図面を用い
て説明する。
Next, in order to better understand the present invention, the present invention will be explained using drawings.

第1図は本発明の半導体装置の製造方法を説明
するための第1の実施例の装置概略図である。こ
の第1の実施例に於いては、チヤンバー101は
石英板102によりランプ(Lamp)室103と
基板室104に分割されている。Lamp室103
内には低圧水銀ランプ105が反射ミラー106
と共に設置されている。基板室104内にはサセ
プター107がおかれ該サセプター107上に、
石英板102と対向する様に半導体基板108が
置かれる。ランプ室103内は、水銀ランプ10
5から照射される紫外光が吸収されてしまわない
様に10-1〜10-2Torr程度の真空に引かれる。又
基板室104は出来るだけ高い真空度が望ましく
10-6Torr以上に設定する。
FIG. 1 is a schematic diagram of a device of a first embodiment for explaining the method of manufacturing a semiconductor device of the present invention. In this first embodiment, a chamber 101 is divided by a quartz plate 102 into a lamp chamber 103 and a substrate chamber 104. Lamp room 103
Inside, a low-pressure mercury lamp 105 is connected to a reflecting mirror 106.
It is installed with. A susceptor 107 is placed in the substrate chamber 104, and on the susceptor 107,
A semiconductor substrate 108 is placed so as to face the quartz plate 102. Inside the lamp chamber 103 is a mercury lamp 10.
A vacuum of about 10 -1 to 10 -2 Torr is created so that the ultraviolet light irradiated from 5 is not absorbed. Also, it is desirable that the substrate chamber 104 has as high a degree of vacuum as possible.
Set to 10 -6 Torr or higher.

ここでこの第1図に示される本発明の第1の実
施例の装置に於ける清浄方法についてのべる。半
導体基板108は予め化学的洗浄法により洗浄さ
れる。その後基板室104内に設置され、上記の
真空度まで引かれる。ランプ室103は常時10-1
〜10-2Torrに引かれている。基板108がサセ
プター107上に設置され、基板室104が所定
の真空度に達した後ランプ105が点灯され、半
導体基板108の表面はランプ105からの紫外
光の照射をうける。所定の時間だけ照射された後
半導体基板108は出来れば基板室104から大
気中にさらされない様に次工程に移す。
A cleaning method for the apparatus according to the first embodiment of the present invention shown in FIG. 1 will now be described. The semiconductor substrate 108 is cleaned in advance by a chemical cleaning method. Thereafter, it is placed in the substrate chamber 104 and evacuated to the above degree of vacuum. Lamp chamber 103 is always 10 -1
It is attracted to ~10 -2 Torr. After the substrate 108 is placed on the susceptor 107 and the substrate chamber 104 reaches a predetermined degree of vacuum, the lamp 105 is turned on and the surface of the semiconductor substrate 108 is irradiated with ultraviolet light from the lamp 105. After being irradiated for a predetermined period of time, the semiconductor substrate 108 is moved to the next step so as not to be exposed to the atmosphere from the substrate chamber 104 if possible.

第2図は第1図に示された本発明の第1の実施
例の装置によつて表面を清浄化した時の効果を、
シヨツトキーダイオードを試作して評価した結果
である。シヨツトキーダイオードは、砒素をドナ
ーとして含む10〜15Ω−cmの比抵抗の(100)の
N型シリコン基板上に形成された。シヨツトキー
ダイオードの製作手順は以下の如くである。先づ
シリコン基板上に熱酸化により約5000Åのシリコ
ン酸化膜を形成し、フオトリソグラフイー技術と
エツチング技術により10μ×10μm角にシリコン
酸化膜を開孔しシリコン基板を露出させる。次に
アンモニア、過酸化水素、水の混合液により化学
的に洗浄し、10分間純水中で水洗し、乾燥させ
る。その後第1図に示された装置内に設置されラ
ンプ105から紫外線を照射した。この時の紫外
線の照射エネルギーは約10mW/cm2であり基板室
104の真空度は5×10-7Torrである。所定の
時間紫外線を照射した後、基板室104の真空を
破らずに、該基板室104に連つて設けられてい
るスパツタ室にシリコン基板を移し白金スパツタ
を行い、その後熱処理をしシヨツトキーバリヤー
を形成した。
FIG. 2 shows the effect of cleaning a surface using the apparatus of the first embodiment of the present invention shown in FIG.
These are the results of a prototype Schottky diode fabricated and evaluated. The Schottky diode was fabricated on a (100) N-type silicon substrate with a resistivity of 10-15 Ω-cm and containing arsenic as a donor. The manufacturing procedure for a Schottky diode is as follows. First, a silicon oxide film with a thickness of approximately 5000 Å is formed on a silicon substrate by thermal oxidation, and a hole of 10 μm x 10 μm square is opened in the silicon oxide film using photolithography and etching techniques to expose the silicon substrate. Next, it is chemically cleaned with a mixture of ammonia, hydrogen peroxide, and water, rinsed in pure water for 10 minutes, and dried. Thereafter, it was placed in the apparatus shown in FIG. 1 and irradiated with ultraviolet light from a lamp 105. The irradiation energy of the ultraviolet rays at this time is approximately 10 mW/cm 2 and the degree of vacuum in the substrate chamber 104 is 5×10 −7 Torr. After irradiating ultraviolet rays for a predetermined period of time, the silicon substrate is transferred to a sputtering chamber provided adjacent to the substrate chamber 104 without breaking the vacuum in the substrate chamber 104, and subjected to platinum sputtering, followed by heat treatment to form a shot key barrier. was formed.

第2図に示される様に高真空下での紫外線照射
時間が長くなると共に、電流密度105(A/cm2)の
時の順方向電圧値は0.43(V)から0.46(V)まで
増大し、他方、順方向電流のn値は1.4から1.08
に減少して1に近くなり、シヨツトキーバリヤダ
イオードの特性が改良されている事がわかつた。
この様に化学的洗浄後すぐに白金をスパツタ形成
して製作されたシヨツトキーダイオードの特性に
比し紫外光を照射された後白金をスパツタ形成さ
れたシヨツトキーダイオードは特性が改善されて
いる事が明白であり紫外光照射により半導体基板
表面が清浄化している事がわかる。低圧水銀ラン
プ105の替わりにXeLampを使用した結果では
あまり顕著な効果が見られなかつた。低圧水銀ラ
ンプは2537Åと849Åの波長の紫外線を照射する
がXeLampでは400Å近傍の波長の紫外光が照射
される。水分子のO−H結合の結合エネルギーは
4.8eV、有機物質のC−H結合のエネルギーは約
4.5eVである事から半導体基板108の表面清浄
化には、少くも上記の結合手の結合エネルギーよ
りも高いエネルギーをもつた光子が必要と考えら
れ、〜3000Å以下の波長の紫外光を照射するのが
有効である。
As shown in Figure 2, as the UV irradiation time increases under high vacuum, the forward voltage value increases from 0.43 (V) to 0.46 (V) at a current density of 10 5 (A/cm 2 ). However, on the other hand, the n value of the forward current is 1.4 to 1.08.
It was found that the characteristics of the Schottky barrier diode were improved.
In this way, compared to the characteristics of the Schottky diode manufactured by sputtering platinum immediately after chemical cleaning, the characteristics of the Schottky diode manufactured by sputtering platinum after being irradiated with ultraviolet light have improved characteristics. It is clear that the surface of the semiconductor substrate is cleaned by ultraviolet light irradiation. When a XeLamp was used instead of the low-pressure mercury lamp 105, no significant effect was observed. Low-pressure mercury lamps emit ultraviolet light with wavelengths of 2537 Å and 849 Å, while XeLamps emit ultraviolet light with wavelengths around 400 Å. The bond energy of O-H bond of water molecule is
4.8eV, the energy of the C-H bond in organic substances is approximately
Since it is 4.5 eV, it is thought that to clean the surface of the semiconductor substrate 108, a photon with an energy higher than the bond energy of the above-mentioned bond is required, and ultraviolet light with a wavelength of ~3000 Å or less is irradiated. is valid.

第3図は本発明の第2の実施例を示すための概
略図である。この第2の実施例に於いては、チヤ
ンバー201は石英板202によりLamp室20
3と基板室204に分割されている。ランプ室2
03内には水銀ランプ205とキセノンフラツシ
ユランプ206が反射ミラー207と共に設置さ
れている。基板室204内にはサセプター208
とがおかれ該サセプター208上に、石英板20
2と対向する様に半導体基板209が置かれてい
る。ランプ室203及び基板室204は第1の実
施例と同様にそれぞれ10-1〜10-2Torr、10-6
Torr以上の真空度に保たれる。
FIG. 3 is a schematic diagram showing a second embodiment of the present invention. In this second embodiment, the chamber 201 is connected to the lamp chamber 20 by a quartz plate 202.
3 and a substrate chamber 204. lamp chamber 2
Inside 03, a mercury lamp 205 and a xenon flash lamp 206 are installed together with a reflecting mirror 207. A susceptor 208 is located inside the substrate chamber 204.
A quartz plate 20 is placed on the susceptor 208.
A semiconductor substrate 209 is placed so as to face 2. The lamp chamber 203 and the substrate chamber 204 have a temperature of 10 -1 to 10 -2 Torr and 10 -6 Torr, respectively, as in the first embodiment.
The degree of vacuum is maintained at Torr or higher.

ここで第2の実施例に於ける基板清浄化法につ
いて述べる。半導体基板209は予め化学的洗浄
法により洗浄される。その後基板室204内に設
置され上記真空度まで引かれる。ランプ室203
は常時、真空にされている。半導体基板209が
サセプター208上に設置され基板室204が所
定の真空度に達した後、水銀ランプ205が点灯
され紫外光が半導体基板209表面を照射する。
同時に、フラツシユランプ206が断続的に点灯
され、半導体基板209表面が加熱される。
Here, a substrate cleaning method in the second embodiment will be described. The semiconductor substrate 209 is cleaned in advance by a chemical cleaning method. Thereafter, it is placed in the substrate chamber 204 and drawn to the above-mentioned degree of vacuum. lamp chamber 203
is always kept under vacuum. After the semiconductor substrate 209 is placed on the susceptor 208 and the substrate chamber 204 reaches a predetermined degree of vacuum, the mercury lamp 205 is turned on and the surface of the semiconductor substrate 209 is irradiated with ultraviolet light.
At the same time, the flash lamp 206 is intermittently turned on to heat the surface of the semiconductor substrate 209.

本発明の第2の実施例によれば、半導体基板2
09表面は、ランプ205からの紫外光と、フラ
ツシユランプ206からの赤外線を含む光によつ
て照射される。この為、第1の実施例に於いてと
同様に半導体基板209表面に吸着している水分
子、有機物質の結合が切断される効果と共にフラ
ツシユランプ206により瞬間的に加熱された時
に小分子及び有機物質に与えられる運動エネルギ
ーによりそれら分子は半導体基板209表面から
より速やかに離脱する様になる。この為に半導体
基板209表面の清浄化がより短時間にかつ、よ
り徹底して行われる様になる。
According to a second embodiment of the invention, the semiconductor substrate 2
09 surface is irradiated with ultraviolet light from a lamp 205 and light including infrared light from a flash lamp 206. For this reason, as in the first embodiment, the bonds of water molecules and organic substances adsorbed on the surface of the semiconductor substrate 209 are broken, and when the flash lamp 206 momentarily heats, small molecules And, due to the kinetic energy given to the organic substance, these molecules are more quickly detached from the surface of the semiconductor substrate 209. Therefore, the surface of the semiconductor substrate 209 can be cleaned more thoroughly and in a shorter time.

これらの効果を確める為に、第2図と同様のシ
ヨツトキーダイオードを、本第2の実施例の装置
を用いて清浄化後製作した。清浄化の条件は紫外
線の強度を10mW/cm2としフラツシユランプの強
度は4J/cm2でパルス巾は50μsecで行いパルス間隔
は5分で行つた。その結果シヨツトキーバリヤー
ダイオードの順方向特性からの評価は、第1の実
施例の装置の場合に比較し約半分の時間で同様の
効果がある事を示した。
In order to confirm these effects, a Schottky diode similar to that shown in FIG. 2 was manufactured using the apparatus of the second embodiment after cleaning. The cleaning conditions were that the intensity of the ultraviolet rays was 10 mW/cm 2 , the intensity of the flash lamp was 4 J/cm 2 , and the pulse width was 50 μsec, with a pulse interval of 5 minutes. As a result, an evaluation of the forward characteristics of the Schottky barrier diode showed that the same effect could be achieved in about half the time compared to the device of the first embodiment.

この様にフラツシユランプ206によつて半導
体基板209を加熱する事は該基板表面を清浄化
するのに効果がある事がわかつたが、以下に示す
効果も併せもつものである。即ち瞬間的な加熱で
あるために、半導体基板209内に形成されてい
る不純物拡散層の不純物再拡散が生じず微細な素
子の製作に適している。更に又、フラツシユラン
プ206からの光は、ミラー207によつて半導
体基板209表面にのみ収束させる事ができる
為、チヤンバー201の壁面を全く加熱しない。
従つて該壁面に吸着している分子が加熱により壁
面を離脱し、半導体基板209表面に吸着すると
いう事がない事である。
It has been found that heating the semiconductor substrate 209 with the flash lamp 206 in this manner is effective in cleaning the surface of the substrate, but it also has the following effects. That is, since the heating is instantaneous, re-diffusion of impurities in the impurity diffusion layer formed in the semiconductor substrate 209 does not occur, making it suitable for manufacturing fine elements. Furthermore, since the light from the flash lamp 206 can be focused only on the surface of the semiconductor substrate 209 by the mirror 207, the wall surface of the chamber 201 is not heated at all.
Therefore, there is no possibility that the molecules adsorbed on the wall surface will leave the wall surface due to heating and be adsorbed on the surface of the semiconductor substrate 209.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例を説明する為の
外略図、第2図は第1の実施例の効果を説明する
ための図、第3図は本発明の第2の実施例を説明
するための外略図、である。 尚、図に於いて、101,201……チヤンバ
ー、102,202……合成石英板、103,2
03……ランプ室、104,204……基板室、
105,205……低圧水銀ランプ、206……
フラツシユランプ、106,207……ミラー、
107,208……サセプター、108,209
……半導体基板である。
FIG. 1 is a schematic diagram for explaining the first embodiment of the present invention, FIG. 2 is a diagram for explaining the effects of the first embodiment, and FIG. 3 is a diagram for explaining the second embodiment of the present invention. This is an external diagram for explaining. In the figure, 101,201...chamber, 102,202...synthetic quartz plate, 103,2
03...Lamp chamber, 104,204...Substrate chamber,
105,205...Low pressure mercury lamp, 206...
Flash lamp, 106, 207...mirror,
107,208...Susceptor, 108,209
...It is a semiconductor substrate.

Claims (1)

【特許請求の範囲】[Claims] 1 1気圧以下の圧力下に置かれた半導体基板の
表面に、3000Å以下の波長を有する紫外光を照射
し、該紫外光と同時に、もしくは交互にフラツシ
ユランプ及びミラーを用いて断続的に赤外線を前
記半導体基板に収束して照射することにより前記
半導体基板の表面を清浄化する工程と、その後前
記半導体基板を大気中に曝す事なく、前記半導体
基板表面上に膜形成を行う工程とを含む事を特徴
とする半導体装置の製造方法。
1. The surface of a semiconductor substrate placed under a pressure of 1 atmosphere or less is irradiated with ultraviolet light having a wavelength of 3000 Å or less, and simultaneously or alternately with infrared rays using a flash lamp and mirror. a step of cleaning the surface of the semiconductor substrate by converging and irradiating the semiconductor substrate with irradiation; and a step of forming a film on the surface of the semiconductor substrate without exposing the semiconductor substrate to the atmosphere. A method for manufacturing a semiconductor device characterized by:
JP13611983A 1983-07-26 1983-07-26 Manufacture of semiconductor device Granted JPS6028235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13611983A JPS6028235A (en) 1983-07-26 1983-07-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13611983A JPS6028235A (en) 1983-07-26 1983-07-26 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS6028235A JPS6028235A (en) 1985-02-13
JPH0451972B2 true JPH0451972B2 (en) 1992-08-20

Family

ID=15167744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13611983A Granted JPS6028235A (en) 1983-07-26 1983-07-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6028235A (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62293724A (en) * 1986-06-13 1987-12-21 Nec Corp Method for cleaning surface
JPS63105970A (en) * 1986-10-23 1988-05-11 Applied Materials Japan Kk Vapor growth method
GB9107751D0 (en) * 1991-04-12 1991-05-29 Elopak Systems Treatment of material
JP2702697B2 (en) * 1996-01-16 1998-01-21 日立東京エレクトロニクス株式会社 Processing device and processing method
JP2702699B2 (en) * 1996-05-27 1998-01-21 日立東京エレクトロニクス株式会社 Processing equipment
JP2003007579A (en) 2001-06-19 2003-01-10 Matsushita Electric Ind Co Ltd Organic thin film formation method
KR102433558B1 (en) * 2019-07-11 2022-08-19 세메스 주식회사 Substrate processing apparatus and a substrate processing method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4999558A (en) * 1973-01-25 1974-09-20
JPS5121784A (en) * 1974-08-17 1976-02-21 Fujitsu Ltd Handotaisochino seizohoho
JPS5569266A (en) * 1978-11-17 1980-05-24 Hitachi Ltd Selective adhering method of metal
JPS5815939A (en) * 1981-07-07 1983-01-29 ギヤ−ト・ジアンセン Manufacture of sodium salicylate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4999558A (en) * 1973-01-25 1974-09-20
JPS5121784A (en) * 1974-08-17 1976-02-21 Fujitsu Ltd Handotaisochino seizohoho
JPS5569266A (en) * 1978-11-17 1980-05-24 Hitachi Ltd Selective adhering method of metal
JPS5815939A (en) * 1981-07-07 1983-01-29 ギヤ−ト・ジアンセン Manufacture of sodium salicylate

Also Published As

Publication number Publication date
JPS6028235A (en) 1985-02-13

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