JPH0451847B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Field of Industrial Application The present invention relates to an information processing device that serially transfers data from a keyboard to which a pointing device can be connected to an information processing unit, and particularly relates to an information processing device that serially transfers data from a keyboard to which a pointing device can be connected. Concerning a method for identifying.

(B) Prior Art As disclosed in Japanese Patent Application Laid-Open No. 19524/1983, a keyboard generally has a key matrix circuit and mode switching keys such as a shift key and a control key, and when the mode switching key is pressed, Information 1
The key status was in bytes, and when a key was operated, these 2 bytes of data were serially transferred to the information processing section along with the key code.

On the other hand, pointing devices such as a mouse, a stick, and a digitizer are
As disclosed in the publication, information on pressing the operation switch is taken as a 1-byte mouse status, and furthermore, the amount of movement in the X direction and Y direction is taken as X data and Y data, respectively, and when operating the mouse, these 3 bytes are data was serially transferred to the information processing unit.

(c) Problems to be Solved by the Invention In the conventional technology, the number of bytes of data input to the information processing section during one operation was constant, and the order of the data was also determined. However,
Connect a pointing device to the keyboard,
If both types of data are serially output from the keyboard, the amount of data to be output increases, so it is preferable to output only data related to the operation from the keyboard. In other words, if the key status and mouse status are 1 byte of key mouse status, for example, if the key and mouse are operated together, 4 bytes of data including the key mouse status, X data, Y data, and key code will be output. ,
When only the keys are desired to be operated, only the key/mouse status or 2-byte data of the key/mouse status and the key code are output.

However, when a keyboard of this type is connected to the information processing section, the number of bytes and order of the data received by the information processing section differs depending on the operations performed on the keyboard. However, it is not possible to determine which of the above 4 bytes the data is.

(d) Means for solving the problems The present invention provides status, X data, Y data,
Priorities are determined in order for the key codes, and the parity bit is set to error or normal only when the status is sent from the keyboard, and the information processing section is provided with a means for determining the parity bit when inputting data, and based on this determination, the parity bit is set to error or normal. The status is identified, and if the input data is determined to be in the above-mentioned status, a predetermined value is set according to the operation information, and if it is judged that the input data is not in the above-mentioned status, it corresponds to the data of the next priority. A key counter is provided to which a value is set.

(E) Effect In the present invention, when data is input to the information processing section, the status is identified by the parity bit, and the X data, Y data, and key code are each identified by the contents of the key counter.
Data from the keyboard is captured accurately.

(f) Embodiment FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, in which 1 is a keyboard, 2 is an information processing section, and a mouse 3 is connected to the keyboard 1.

The keyboard 1 includes a key matrix circuit 4, a control key 5, first and second shift keys 6 and 7, an X counter 8 and a Y counter 9 that count detection pulses according to the amount of movement in the X and Y directions from the mouse 3, respectively, and the keyboard. The information processing unit 2 includes a controller 10 and a communication interface 1
1, a CPU 12, a conversion table 13, a key buffer 14, registers 15, 16, 17, and a key counter 18. The keyboard controller 10 and the communication interface 11
and are connected by second signal lines 19 and 20.

Here, the format of keyboard data output from the keyboard 1 to the information processing 2 will be explained.

In this embodiment, the mouse key status, mouse X data, mouse Y data,
It is configured to output four types of key code data as keyboard data, and each data has a start bit and a stop bit added to it, just like normal serial transfer, and is sent to the keyboard controller 1.
Output from 0.

As shown in Figure 2A, the mouse key status includes the mouse movement flag MMF indicating the presence or absence of mouse 3 movement, press information MSW1 and MSW2 of the first and second switches of mouse 3, alphanumeric mode and kana mode. Alphanumeric/kana key press information EN for switching, lock key press information LOOK, control key 5 press information CTRL, first and second shift keys 6 and 7 press information SHIFT1 and
Consists of SHIFT2. The mouse X data and the mouse Y data consist of 7-bit data X and Y indicating the movement amount and 1-bit data indicating the movement direction, as shown in FIG.
As shown in FIG. 2, it consists of a 7-bit key matrix code KCD from the key matrix circuit 4.
A parity bit P is added to each data.

When operating the mouse 3 or keys, the keyboard controller 10 outputs only keyboard data related to the operation, but this output includes mouse key status, mouse X data, mouse Y
Priorities are set in order for data and key codes. Therefore, there are four states of keyboard data as shown below, and in each state, data is output in order from the front.

Mouse key status Mouse key status + Mouse X data + Mouse Y data Mouse key status + key code Mouse key status + Mouse This will be explained with reference to the flowchart. 3 and 4 show the processing content of the keyboard controller 10, and FIG. 5 shows the processing content of the CPU 12.

The keyboard controller 10 is interrupted by an internal timer 21 at fixed time intervals, for example every 10 ms, and first reads the contents of the X counter 8 and Y counter 9 and checks whether the mouse 3 is operating. Next, check the status of the mouse 3 switch, control key 5, and shift keys 6 and 7. Next, key matrix circuit 4
scan and check if any keys are being operated. After each check is completed, each keyboard data is output.

The mouse key status is always output when the mouse 3 or a key is operated, and at this time, the keyboard controller 10 outputs the parity bit P as an error.

Communication interface 11 on the information processing unit 2 side
is composed of, for example, a USART, and has a shift register and a latch circuit, and when data from the keyboard 1 is latched, it generates a signal R _x RDY and interrupts the CPU 12 .

When an interrupt occurs, the CPU 12 takes in the keyboard data received from the communication interface 11 as shown in FIG. 5, first sets the signal line 20 to "H" level, and then performs processing according to the received data. After the processing is completed, the signal line 20 is returned to the "L" level.

On the other hand, as shown in FIG. 3, the keyboard controller 10, after outputting the mouse key status,
In the level check routine shown in Figure 4,
Detects the level of signal line 20, and detects the level of signal line 20.
Once 0 reaches the "H" level, the next data is output until it returns to the "L" level. That is,
While the CPU 12 is executing processing related to the mouse key status, it is in a standby state. Then, the CPU 12 finishes the processing and the signal line 20
When becomes "L", output of the next data starts. This situation is shown in the timing chart of FIG.

The keyboard controller 10 determines whether the mouse 3 has moved or not, and whether or not a key in the key matrix circuit 4 has been operated, and takes the four output formats described above.
When data and key codes are output, as shown in FIG. 3, the level of the signal line 20 is detected in a level check routine, similar to when the mouse key status is output. Therefore, each keyboard data sent from keyboard 1 is sent to the CPU
12, and after the processing is completed, the next keyboard data is output. The keyboard data of maximum 4 bytes is 1 as shown in Figure 7.
Sampling period, here reliably sent within 10ms. Note that only the mouse key status is output when either the control key 5 or the shift key 6 or 7 is pressed.

By the way, the keyboard controller 10 transmits the parity bit without making an error except when outputting the mouse key status.

As shown in FIG. 5, the CPU 12 determines a parity error in the interrupt routine, and if it is an error, it identifies that the input data is the mouse key status. At this time, set the mouse key status in register 15, and then set the mouse operation flag of the mouse key status.
Check MMF to determine whether mouse 3 has moved. Then, when the mouse 3 moves, "2" is set in the key counter 18, and when it does not move, "0" is set. If the bit is not in error, the contents of the key counter 18 are decremented after processing the input data. Therefore, if the contents of the key counter 18 are "2", "1", or "0", the input data is identified as mouse X data, mouse Y data, and key code, respectively, and the CPU 12 reads the data. Perform each process at the time of input. For example, mouse X data and mouse Y data are added to or subtracted from X and Y data indicating the current mouse position according to the direction of movement, and the X and Y data after movement are set in registers 16 and 17, respectively. . The key code is referred to the conversion table 13 based on the set mouse key status, is converted into a character code by the conversion table 13, and is stored in the key buffer 14.

By the way, in this embodiment, USART is used as the communication interface 11, but it is only necessary to have a shift register that receives serial data, and when one piece of keyboard data is received in this shift register, it is sent to the CPU 12. All you have to do is interrupt. Also, connect the signal line 20 to the CPU
12 ports may be directly connected.

(G) Effects of the Invention According to the present invention, the data sent from the keyboard is accurately captured without making a mistake in the order, so that malfunctions do not occur in the processing of the CPU in the information processing section. Furthermore, since no identification information is inserted into each data section, effective data transfer is possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a diagram showing the format of keyboard data, FIG. 3 is a flowchart showing the processing contents of the keyboard controller, and FIG. 4 is a level check routine. Flowchart showing the contents, Figure 5 is a flowchart showing the processing contents of the CPU, Figure 6
7 and 7 are timing charts showing how data is transferred between the keyboard and the information processing section. Explanation of main figure numbers: 1...Keyboard, 2...Information processing section, 3...Mouse, 10...Keyboard controller, 12...CPU, 18...Key counter.

Claims (1)

[Claims] 1 Status regarding the pointing device and keys including operation information indicating whether the pointing device is operating, X data and Y data indicating the amount of movement of the pointing device in the X direction and Y direction, respectively, and corresponding to the pressed key. A keyboard that sequentially prioritizes key codes and serially outputs only data related to the operation from among the plurality of input data when a pointing device or key is operated; and an information processing unit that receives data from the keyboard. and setting the parity bit to error or normal only when the status is sent from the keyboard, and providing means for determining the parity bit when inputting data in the information processing section, and identifying the status based on the determination, Furthermore, if the input data is determined to be in the above-mentioned status, a predetermined value is set according to the operation information, and if it is determined that the input data is not in the above-mentioned status, a value corresponding to the data of the next priority is set. 1. An input data identification method comprising: a key counter; the X data, Y data, and key code are each identified according to the contents of the key counter.