JPH044U - - Google Patents

Info

Publication number
JPH044U
JPH044U JP4092790U JP4092790U JPH044U JP H044 U JPH044 U JP H044U JP 4092790 U JP4092790 U JP 4092790U JP 4092790 U JP4092790 U JP 4092790U JP H044 U JPH044 U JP H044U
Authority
JP
Japan
Prior art keywords
processor
sequence
device memory
special function
calculation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4092790U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4092790U priority Critical patent/JPH044U/ja
Publication of JPH044U publication Critical patent/JPH044U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Programmable Controllers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この考案の一実施例によるプログラ
マブルコントローラを示す図、第2図はこの考案
の一実施例によるプログラマブルコントローラを
示す図、第3図、第4図は従来のプログラマブル
コントローラを示す図である。 図において、1……シーケンス演算用プロセツ
サ、2……デバイスメモリ、3……特殊機能用プ
ロセツサ、4……共用メモリ、……特殊機能用
デバイスメモリを示す。なお、図中、同一符号は
同一、または相当部分を示す。
FIG. 1 is a diagram showing a programmable controller according to an embodiment of this invention, FIG. 2 is a diagram showing a programmable controller according to an embodiment of this invention, and FIGS. 3 and 4 are diagrams showing a conventional programmable controller. It is. In the figure, 1: a sequence calculation processor, 2: a device memory, 3: a special function processor, 4: a shared memory, and a special function device memory. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] シーケンス演算を実行するシーケンス演算用プ
ロセツサと特殊機能を司どる特殊機能用プロセツ
サと前記シーケンス演算用プロセツサの演算入力
結果を格納するデバイスメモリの一部に前記特殊
機能用プロセツサのデバイスメモリを備えたこと
を特徴とするプログラマブルコントローラ。
A sequence calculation processor for executing sequence calculations, a special function processor for managing special functions, and a device memory for the special function processor as a part of the device memory for storing calculation input results of the sequence calculation processor. A programmable controller featuring:
JP4092790U 1990-04-17 1990-04-17 Pending JPH044U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4092790U JPH044U (en) 1990-04-17 1990-04-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4092790U JPH044U (en) 1990-04-17 1990-04-17

Publications (1)

Publication Number Publication Date
JPH044U true JPH044U (en) 1992-01-06

Family

ID=31551149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4092790U Pending JPH044U (en) 1990-04-17 1990-04-17

Country Status (1)

Country Link
JP (1) JPH044U (en)

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