JPS647302U - - Google Patents

Info

Publication number
JPS647302U
JPS647302U JP10190687U JP10190687U JPS647302U JP S647302 U JPS647302 U JP S647302U JP 10190687 U JP10190687 U JP 10190687U JP 10190687 U JP10190687 U JP 10190687U JP S647302 U JPS647302 U JP S647302U
Authority
JP
Japan
Prior art keywords
external device
cpu unit
programmable controller
memory
accessed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10190687U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10190687U priority Critical patent/JPS647302U/ja
Publication of JPS647302U publication Critical patent/JPS647302U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Selective Calling Equipment (AREA)
  • Programmable Controllers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例によるプログラマ
ブルコントローラを示す図、第2図は従来のプロ
グラマブルコントローラを示す図である。 図において、1はプログラマブルコントローラ
、2はCPUユニツト、3は外部インターフエイ
スユニツト、4は外部機器、6はメモリである。
なお、図中同一符号は同一又は相当部分を示す。
FIG. 1 is a diagram showing a programmable controller according to an embodiment of this invention, and FIG. 2 is a diagram showing a conventional programmable controller. In the figure, 1 is a programmable controller, 2 is a CPU unit, 3 is an external interface unit, 4 is an external device, and 6 is a memory.
Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] CPUユニツトと、外部機器と通信できる外部
機器インターフエイスユニツトを具備するプログ
ラマブルコントローラにおいて、上記外部機器イ
ンターフエイスユニツトに、上記CPUユニツト
からアクセスできるメモリを備え、上記CPUユ
ニツトからの上記メモリへのアクセスにより、上
記外部機器からのメツセージ受信時の終了コード
を可変にできる手段を有するプログラマブルコン
トローラ。
In a programmable controller equipped with a CPU unit and an external device interface unit capable of communicating with external devices, the external device interface unit is provided with a memory that can be accessed from the CPU unit, and the memory can be accessed by the CPU unit. , a programmable controller having means for making variable an end code when receiving a message from the external device.
JP10190687U 1987-07-02 1987-07-02 Pending JPS647302U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10190687U JPS647302U (en) 1987-07-02 1987-07-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10190687U JPS647302U (en) 1987-07-02 1987-07-02

Publications (1)

Publication Number Publication Date
JPS647302U true JPS647302U (en) 1989-01-17

Family

ID=31331324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10190687U Pending JPS647302U (en) 1987-07-02 1987-07-02

Country Status (1)

Country Link
JP (1) JPS647302U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5987509A (en) * 1982-11-10 1984-05-21 Toshiba Corp Programmable controller
JPS62121562A (en) * 1985-11-22 1987-06-02 Nec Corp Data communication system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5987509A (en) * 1982-11-10 1984-05-21 Toshiba Corp Programmable controller
JPS62121562A (en) * 1985-11-22 1987-06-02 Nec Corp Data communication system

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