JPH0447888A - Recording and reproducing system for digital signal - Google Patents

Abstract

PURPOSE:To record/reproduce a digital video signal for a moving picture and a digital video signal for a still picture by forming selectively a moving picture area and a still picture area to a picture area. CONSTITUTION:After a moving picture compression data is arranged, a still picture data is recorded. Then a picture data of each frame inputted sequentially to RAMs 17a-17c is read and arranged as a still picture data in a data area and recorded therein. In this case, the still picture data is subjected to compression processing at a picture compression processing section 19 to make a reference picture data the same as that for the moving picture and the still picture is recorded with less compression rate or with no compression so as to magnify the area thereby recording the picture data for a still picture with higher picture quality.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording and reproducing method for simultaneously recording and reproducing digital video signals and digital audio signals.

[Prior art] The current digital audio recorder (hereinafter referred to as “D
(referred to as "AT") is designed to record and reproduce only digital audio signals.

[Means for Solving the Problems] It would be very convenient if not only digital audio signals but also other signals, such as digital video signals for moving images or still images, could be simultaneously recorded and reproduced.

Therefore, in the present invention, it is possible to simultaneously record and reproduce digital video signals and digital audio signals for moving images or still images.

[Means for Solving the Problems] The present invention records and reproduces a digital signal of N bits (N is an integer), and a part of the N bits forms an image area, an audio area, and a control area, respectively. , a moving image area section and a still image area section are selectively formed in the image area, compressed digital video signals for a plurality of screens constituting the moving image are sequentially arranged as one unit in the moving image area section, In the still image area, digital video signals for one screen forming a still image are sequentially arranged as one unit.

Furthermore, data for identifying the moving image area and the still image area of the image area is arranged in the control area.

[Function] In the above configuration, by selectively switching the image area to the moving image area and the still image area, it is possible to record and reproduce a digital video signal for moving images and a digital video signal for still images.

In this case, digital video signals for moving images require compression processing due to the nature of the transmission, but digital video signals for still images do not necessarily require compression processing, and can be used as high-quality still images. It is possible to record and play back digital video signals.

In other words, in a screen portion where high image quality is desired, the image area can be set as a still image area, and digital video signals for still images can be recorded and reproduced.

[Embodiment] An embodiment of the present invention will be described below with reference to the drawings. In this example, a DAT is used as the recording/reproducing device.

FIG. 2 shows the format of the digital signal recorded and reproduced in this example. 16 bits) [b15~b
O], bits [b 15 to b4], bit [b3
~b1 and bit[bO] are an image area, an audio area, and a control area, respectively.

Here, the conventional audio sampling clock is 48k
Hz, and the transmission rate is 48kHzX2X16bit = 1536kbps, as in the case of recording left and right two-channel digital audio signals, the transmission rate in the image area is 48kHzX2X12bit DAT = 1152kbps, and the transmission rate in the audio area is , 48kHzX2X3bit=288kbps, and the transmission rate in the control area is 48kHzX2X1bit=96kbps (see Figure 3@).

The recorded data is configured for a predetermined period, in this example, one second as a unit period (hereinafter referred to as "compression reference period").

That is, in each compression reference period, the image area is 115
The audio area is 288,000 bits, and the control area is 96,000 bits.

In this example, an NTSC video signal is used, and image data for 30 frames is arranged in the image area in each compression reference period. In this case, the image data for 30 frames has too much information as it is. For example, the painting data for l frame is 256H x 240V,
And when the luminance signal Y, the red difference signal, and the blue difference signal V are each 8 bits, the amount of information for 30 frames is 2
56X240X8X30X3 = 44236800 bits.

Therefore, the image data for 30 frames is 115,200
It is compressed to within 0 bits.

For example, pixel data of 256H x 240V is set to 172 by subsampling processing.

Furthermore, a total of 24 bits of the luminance signal Y, red difference signal U, and blue difference signal V are compressed into 9 bits.

As a result, the amount of information for l frames is 256×24
0X1/2X9 = 276480 pits.

Further, the image data of the second to 29th frames are each differentially compressed image data using the image data of the first frame as reference image data, and the information amount of this differentially compressed image data is, for example, 27,200 bits. .

Therefore, the amount of information for 30 frames is 276,480
X1+27200X29=1065280 bits, which is within 1152000 bits.

Note that the remaining 86,720 bits are used for fixed length adjustment.

FIG. 4 shows an example of the structure of recorded data. At the beginning of the image area of each compression reference period are reference image data corresponding to the image data of the first frame, VBI, VB2, etc.
・ is arranged, followed by differentially compressed image data Δcl ΔC2, ・ corresponding to the image data of the 2nd to 29th frames.
- Δc29 is sequentially distributed.

Furthermore, audio data for this compression reference period is arranged in the audio area for each compression reference period.

This audio data is data within 288,000 bits.

For example, the ADPCM method is adopted as the audio data encoding method, and the data is compressed.

As a result, when the sampling frequency is 32kHz, 1 sample is 4 bits, and 2 channels (stereo or monaural 2 channels), the amount of information is 32kHz2 x 4 bits x 2.
The channel is 256,000 bits, and the data is within 288,000 bits.

Note that the remaining 32,000 bits are used for frequency adjustment.

As mentioned above, the 16 bits b15 to b15 of the digital signal
A voice region is formed by 3 bits b3 to bl of bO, and the transmission rate of the voice region is 96 kHz×3 bits=288 kb, ps (see FIGS. 2 and 3).

This can also be considered as 32kHz x 9 bits = 288kbpS. Therefore, for example, as shown in FIG. 5, audio data is allocated to 8 of each 9 bits, and the bit rate is adjusted. That is, 32k
Hz x 8 hits = 256 kbps.

Further, a synchronization coat section, a mote code section, and a control code section are provided in the control area in each compression reference period.

A plurality of synchronization coat sections are provided in each compression reference period, and in this example, four synchronization coat sections are provided at intervals of 0.25 seconds. For example, a 64×1 bit area is secured in each synchronization code section. A framing code is used as a synchronization code,
Different types of synchronization codes F'1 to F'4 are arranged in the four synchronization code sections, respectively.

As shown in FIG. 4, the synchronization code l is arranged in the synchronization code section immediately before the next compression reference period, and the three synchronization code sections before that correspond to the synchronization code sections 4 to 2, respectively.
will be arranged.

A moat coat section is provided following each synchronous coat section. That is, in each compression reference period, 4
Each is provided. For example, each mote code section has a 64x1
Human area is secured.

In this case, the last of the mode coat sections arranged following the synchronization code section having the synchronization coat I is arranged so as to be located at the beginning of the next compression reference period.

The same data is allocated to the four mote code F sections in each compression reference period. In this mode code section, data between image data, audio data, etc. to be arranged in the next compression reference period is arranged.

The following data can be considered as data between image data.

■Resolution data 256H x 240V 512H x 480V 768H Difference signal V Red signal R1
Green signal G, blue signal B Other bit data 24 bits (8 [Y, R] + 8 [U, G] + 8 [
V, B] ') 16 bits (6 [Y] + 5 [U co + 5 [V co) 9 bits (Y, U, V or R, G, B (7) compressed data) Other data related to audio data The following can be considered.

■Encoding method data AD PCM or more PCM (linear) PCM (nonlinear) Others ■Bit data 4 bits, 6 bits, 8 bits, 10 bits 12 bits, 16 bits, etc. ■Sampling frequency data 16 kHz, 32 kHz, 44.1kHz.

48 kHz, Others■ Channel number data 1 channel, 2 channels, etc. In addition to the data between the image data and audio data mentioned above, the scene change data in the next compression reference period is also included in the mode code section, as described later. If there is a scene change, data indicating the presence or absence of a scene change is also arranged.

A control code section is provided following each mode code section. That is, four are provided for each compression opening/closing.

For example, an area of 23136 x 1 bit is secured in each control code section.

The same data is placed in the four control coat sections in each compression reference period. This control coat section is provided with a microcode for decompressing image data to be placed in the next compression standard period, so that it can support any compression method during playback.

Although not shown in FIG. 4, a 736-bit guard area in which each bit is set to "0" is provided between the control code section and the synchronization code section.

As mentioned above, by distributing the same data to the four mode code sections and the control code section, during playback, the mode code and control code can be efficiently obtained even if the playback starts from the position. The operation of the reproduced signal processing system, which will be described later, can be smoothly controlled.

FIG. 6 shows the structure of recorded data when there is a scene change.

When there is a scene change, the recording state of the image data is reset at a point in the middle of the compression reference period (see time point tc in FIG. 6). That is, from time tc, the reference image data VBN+2 after the scene change, differentially compressed image data Δc1, ΔC2, . . . are sequentially arranged and recorded in the image area.

In addition, along with this, the recording state of data in the control area is also reset, and a synchronization coat section having a synchronization coat 1 is provided immediately before the reference image data V B N+2. Then, data indicating that there is a scene change is placed in the morte coat portion of the compression reference period before the scene change.

FIG. 1 shows an example of a signal processing device used when recording and reproducing recorded data as shown in FIGS. 4 and 6 using DAT.

First, the recording system will be explained.

The NTSC color video signal S2 supplied to the video in terminal 11 is amplified by an amplifier 12 and then supplied to a decoder 13. The decoder 13 outputs a luminance signal Y, a red difference signal U, and a blue difference signal ■, and supplies them to the A/D converter 14, respectively.

Further, the video signal S■ outputted from the amplifier 12 is supplied to a synchronization separation and clock generation circuit 15. circuit 1
From 5, frequency 8 synchronized with the synchronization signal of video signal S■
fsc/3 (fsc is the color subcarrier frequency of 3.58MH
z) clock CKRI is output, and this clock CK
RI is supplied to the A/D converter 14 as a sampling clock.

The A/D converter 14 samples each of the signals Y, Ll, and V so that the number of samples per effective horizontal visit is 256, and converts them into digital signals with 8 hits per sample.

Signals Y, U, and ■ output from the A/D converter 14 are supplied to a movable terminal of a changeover switch 16.

Although the control line is not shown, the changeover switch 16 is controlled by a controller 110 including a CPU.
For each frame period, a side, ba, a side, a side, ...
are connected sequentially.

The fixed terminal on the -a side of the selector switch 160a is the RAM
It is connected to the input side of 17a to 17c. RAM 17
Writing and reading of a to 17c is controlled by the RAM controller 120. Note that the operation of RAM controller 120 is controlled by controller 11.0.

The RAM controller 120 is supplied with the clock CKRI output from the circuit 15, and also supplied with the vertical synchronization signal VDR1 and the horizontal synchronization signal HDR as reference synchronization signals. Further, the controller 110 is supplied with a clock CKR2 having a frequency of 8 fsc output from the circuit 15 as a master clock, and a vertical synchronization signal VD.
R1 horizontal synchronization signal HDR is supplied as a reference synchronization signal.

Furthermore, the controller 110 receives a bit clock BCK (shown in FIG. 7B) and a clock LRCK (shown in FIG. Supplied as a reference clock.

Note that the operation of the DAT 130 is controlled by the controller 110.

The RAMs 17a to 17c receive signals Y, Y, and Y during the l frame period connected to the changeover switch mill C side, respectively.
256 pieces in the horizontal direction between each of U and V,
240 sample data are written in the vertical direction.

Signals Y written in these RAMs 17a to 17c,
The 256H x 240V data between each of U and V is repeatedly read out twice during the next two frame periods.

The signal read out from the RAM 17a is transferred to the selector switch 1.
It is supplied to fixed terminals 8a, 18b, and 18c on the a side, the a side, and the a side, respectively. The signals read from the RAM 17b are supplied to fixed terminals on the b side, b side, and a side of the changeover switches 18a, 18b, and 18c, respectively. RAM
The signal read out from 17c is the changeover switch 18a,
It is supplied to fixed terminals on the a side, a side, and b side of 18b and 18c, respectively.

Although the control lines are not shown, there are changeover switches 18a to 18c.
are switched and controlled by the controller 110. These changeover switches 18a to 18c change the changeover switch 16 to the all, b side, a side, a side, etc. every frame period.
・When connected sequentially to a side, a side, b side, c Il
l, . . . are sequentially connected to changeover switches 18a to 1.
The output signals 8c are each supplied to an image compression section 19. The operation of this image compression section 19 is controlled by a controller 110.

The image compression unit 19 performs the following processing on the first frame of image data among the 30 frames of image data constituting each compression reference period (1 second). First, subsampling processing is performed, and the signals y, u,
The number of samples in one frame between each of v is 1
/2. Next, the 24-hit data is compressed to 9 bits. Thereby, reference image data VBN is formed.

Moreover, for the image data of the 2nd to 30th frames,
The following processing is performed respectively. First, subsampling processing is performed to obtain signals Y and U.

The number of samples in one frame between each of ■ is 1/2
It is said that Next, the 24-bit data is compressed to 9 bits. Furthermore, a difference from the reference image data is taken.

As a result, differentially compressed image data Δcl to Δc29 are formed.

Reference image data VBN and differentially compressed image data Δcl to Δc2 formed by the image compression unit 19 in each compression reference period
9 are supplied to the video RAMs 22a to 22c via the connection switch 20 and the changeover switch 21, and are sequentially written to predetermined addresses.

Although the control lines are not shown, the connection switch 20 and the changeover switch 21 are switched and controlled by the controller 110. The connection switch 20 is turned on during recording. The changeover switch 21 is set to the a side, the b side,
A side, a side, , , , l,: connected in sequence.

Writing/reading of the video RAMs 22a to 22c is performed by R.
Controlled by AM controller 120.

The video RAMs 22a to 22c each have a changeover switch 21 connected to azc@ during the compression reference period.
The reference image data VBN formed by the image compression section 19 and the differentially compressed image data ΔC1 to Δc29 are written.

Reference image data VBN and differentially compressed image data Δcl to Δ written in these video RAMs 22a to 22c
c29 is read out during the following l compression reference period.

Reference image data VBN and differentially compressed image data Δcl to Δc2 read from video RAMs 22a to 22c
9 is supplied to the mixing circuit 24 via the changeover switch 23 and arranged in the image area of the recording data.

Although the control line is not shown, the changeover switch 23 is controlled by the controller 110. Changeover switch 23
are connected to the all to C sides, respectively, during the period when image data is read from the video RAMs 22a to 22b. The operation of mixing circuit 24 is controlled by controller 1]0.

Further, the left and right channel audio signals SAL and SAR supplied to the audio in terminal 31 are amplified by an amplifier 32 and then supplied to an audio digital signal processor (audio DSP) 33.

The operation of the audio DSP 33 is controlled by the controller 110. In this audio DSP 33, the left and right channel audio signals SAL and SAR are each sampled with a 32 kHz clock, and further encoded using the RAM 34 using the ADPCM method so that each sample has 4 bits.

As a result, 256,000 bits of audio data are formed corresponding to each compression reference period.

The audio data formed by the audio DSP 33 is supplied to the mixing circuit 24, and is added to the audio area of the recorded data by the fifth
1! They are arranged as shown in I.

In this case, the audio data output from the audio DSP is controlled so that it corresponds to the image data supplied to the mixing circuit 11fi24.

Further, 25 is a circuit for generating control data such as a synchronization code, a mode code, and a control code. The operation of this generating circuit 25 is controlled by the controller 110! ! FJIj is done. The control data output from the generation circuit 25 is supplied to the mixing circuit 24 and arranged in the control area of recording data.

In this way, recording data as shown in FIG. 4 is formed in the mixing circuit 24, and this recording data is transferred to DAT1.
30 and recorded in DAT format.

Further, 26 is a scene change detection circuit.

The detection circuit 26 is supplied with two consecutive frames of signals supplied to the image compression section 19 from the changeover switches 18a to 18c. Then, data at a plurality of sample points are compared based on the comparison position signal from the RAM controller 120, and it is determined whether the difference exceeds a specified value. When the number exceeds the specified value,
It is determined that it is a scene change, and the determination signal is supplied to the controller 110 and the RAM controller 120.

When a scene change occurs, the signal processing state is reset even during the 1 second compression reference period. In other words,
The image compression unit 19 starts forming the reference image data VBN using the image after the scene change, and the changeover switch 21 is also switched to the next video RAM.

Note that the signal processing state of the audio system is also reset in the same way as the video system. The operation of the control data generation circuit 25 is also controlled, the generation timing of the synchronization code is controlled, and data indicating that a scene change has occurred is allocated to the mode code of the compression reference period before the scene change.

In this way, when there is a scene change, the mixing circuit 2
4, recorded data as shown in FIG. 6 is formed, and this recorded data is supplied to the DAT 130 and
It is recorded in this format.

FIG. 8 shows a timing chart of a recording system between a video signal and an audio signal.

A and B in the figure are a video signal SV and audio signals SAL and SAR supplied to the terminal 1131, respectively. VGI, VG2,---AGI, AC3,...
.are the video signal and audio signal of each compression reference period, respectively.

As shown in FIG.
I, CV G2, . . . are written sequentially.

In addition, although not mentioned above, the RAM 34 also contains the above-mentioned video R.
Similar to AM22a to 22c, RAM a to C areas are provided, and as shown in the figure, audio DSP3
Compressed audio data CAGI, CA converted to ADPCM in 3.
G2, battle, etc. are written sequentially.

In this way, the video signal and the audio signal are processed at the same timing, and even if there is a scene change, the DAT 130 can store the compressed image data CV of each compression reference period.
GI, CVG2, ... and compressed audio data CAGI, C
AG2, . . . are recorded in correspondence (see El in the same figure).

Next, the reproduction system will be explained.

Data as shown in FIGS. 4 and 6 reproduced from the DAT 130 is supplied to the separation circuit 41. The operation of the separation circuit 41 is controlled by the controller 11O, and image data, audio data, and control data are separated from the reproduced data.

The control data separated by the separation circuit 41 is supplied to a control data discrimination circuit 42, where a synchronization code, a morte code, and a control code are discriminated, and the discrimination result is supplied to the controller 110.

Under the control of this controller 110, a reproduction signal processing system such as an image decompression section and an audio DSP 33, which will be described later, performs processing corresponding to the format and compression method of the reproduced image data and audio data.

This makes it possible to deal with any situation regarding the image data and audio data to be reproduced. In the following, a case will be described in which data as shown in FIG. 4 or 6 is reproduced.

Further, 43 is a synchronization signal and clock generation circuit. The operation of this generating circuit 43 is controlled by a controller 110. Then, from the generation circuit 43, the frequency 4
f sc/3 clock CKPI, vertical synchronization signal V
DP, a horizontal synchronizing signal HDP, and a clock CKP2 with a frequency of 8 fsc are output.

The RAM controller 120 is supplied with the clock CKPI output from the generation circuit 43, and also supplied with the vertical synchronization signal VDP and the horizontal synchronization signal HDP as reference synchronization signals. The controller 110 also has a clock CKP2 with a frequency of 8fsc output from the generation circuit 43.
is supplied as a master clock, and a vertical synchronization signal VDP and horizontal synchronization signal HDP are supplied as reference synchronization signals.

Further, reference image data VBN and differential compressed image data Δcl~ of each compression reference period are separated by the separation circuit 41.
Δc29 is the connection switch 44 and the changeover switch 45
The data is supplied to the video RAMs 22a to 22c via the video RAMs 22a to 22c, and sequentially written to predetermined addresses.

Although the control lines are not shown, the connection switch 44 and the changeover switch 45 are controlled by the controller 110. The connection switch 44 is turned on during playback. The changeover switch 45 selects all, bl for each compression reference period.
M, c side, a side, @ * & d are connected sequentially.

Writing/reading of the video RAMs 22a to 22c is performed by R.
Controlled by AM controller 120. RAM2
2a to 22c have changeover switches 45 for a to c, respectively.
During the l compression reference period connected to g4, the separation circuit 41
The reference image data VBN and differentially compressed image data Δc1 to ΔC29 separated by are written.

Reference image data VBN and differentially compressed image data Δc1 to Δ written in these video RAMs 22a to 22c
c29 is read out during the following l compression reference period.

Reference image data VBN and differentially compressed image data Δcl to Δc2 read from video RAMs 22a to 22c
9 is supplied to the image decompression section 46 via the changeover switch 23. Although the control line is not shown, the changeover switch 23 is controlled by the controller 110. The changeover switch 23 is connected to the a side to the C side, respectively, during a period when image data is read from the video RAMs 22a to 22c.

The operation of the image decompression section 46 is controlled by the controller 110 based on the control code as described above, and performs the opposite process to that of the image compression section 19.

In the image decompression unit 46, the following processing is performed on the reference image data VBN. First, 9-bit data is expanded to 8 bits for each of the signals Y, U, and V. Then, interpolation processing is performed to obtain the signals Y, U, and V.
The number of samples in one frame for each of V is doubled. This forms the first frame of image data.

Further, the following processing is performed on each of the differentially compressed image data Δcl to Δ(・29. First, the differential data is returned to 9-bit data using the reference image data. Next, the 9-bit data is converted back to 9-bit data. The data of signals Y, U,
V is expanded to 8 bits each.

Furthermore, interpolation processing is performed, and the signals Y, U, V
The number of samples in one frame between each is doubled. As a result, image data of the second frame to the 30th frame is formed.

Signals Y, U, V output from the image decompression unit 46
are supplied to a matrix circuit 47, and primary color signals R, G, and B output from this matrix circuit 47 are supplied to a D/A converter 48. The D/A converter 48 is supplied with a clock CKPI from the generation circuit 43. And D
/A converter 48 outputs an analog primary color signal R,
G and B are video out terminals 49R14, respectively.
9G and 49B.

The terminal 50 is a synchronization signal output terminal, and this terminal 50 receives the decoded synchronization signal 5YNC output from the generation circuit 43.
is derived.

Furthermore, the audio data separated by the separation circuit 41 is supplied to the audio DSP 33, where the ADPCM signal is demodulated. The left and right audio signals SAL and SAR output from the audio DSP 33 are led to an audio out terminal 36 via an amplifier 35.

Note that when a scene change occurs, the signal processing state is reset even during the 1 second compression reference period. In other words, the selector switch 45b is switched and writing to the next video RAM is started. Even during the processing performed by the image decompression unit 46 after one compression reference period, the formation of the first frame of image data is started from the reference image data VBN of the scene change forest.

Note that the signal processing state of the audio system is also reset in the same way as the video system.

FIG. 9 shows a timing chart of a reproduction system regarding video signals and audio signals.

From DAT 130, compressed image data CVGI, CV G2, etc. of each compression reference period and compressed audio data CA
GI, CAG2, and fistfight are played in correspondence (see FIG. 9A).

The video RAMs 22 a to 22 c contain reproduced compressed image data CVGI, CV
G2, . . . are written sequentially.

In addition, in the RAM a - c area of the RAM 34, as shown in FIG.
, CAG2, . . . are sequentially written.

In this way, compressed image data and compressed audio data are processed at the same timing, and terminals 49R to 49B and 36
are the video signals VGI and V of each compression reference period, respectively.
G2, . . . and audio signals AGI, AC3, .

FIG. 10 is a flowchart showing the operation of the video system during normal playback.

In the figure, when the playback key of the keyboard 140 is turned on, it is determined in step 51 whether synchronization code 2, 3, or 4 has been entered manually.

When any of these sync codes are human-powered,
At step 52, the mode code and control code placed following the synchronization code are loaded into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 53, it is determined whether synchronization code 1 has been input. When the synchronization code l is input, in step 54, one of the video RAMs (video RAM
(M22a to M22c are used sequentially), input of compressed image data for one compression reference period is started.

Next, in step 55, it is determined whether synchronization code 1 was entered manually. When synchronization code 1 is input, input of compressed image data for one compression reference period to the next video RAM is started in step 56.

Next, in step 57, the video RA
The compressed image data written in M is sequentially read out and the image decompression section 46 starts decompression processing.

The image is then displayed on a monitor (not shown) connected to the terminals 49R to 49B.

Next, in step 58, it is determined whether synchronization code 1 has been input. When synchronization code 1 is input, it is determined in step 59 whether or not the stop key of keyboard 140 is on.

When the stop key is not on, the process returns to step 56 and repeats the above-described operation, while when the stop key is on, the playback operation is stopped.

Note that the decompression processing in step 57 is performed after the decompression processing of the compressed image data written in any of the video RAMs 22a to 22c between the previous compression reference ribs is completed, and then processing outside the subsequent compression reference period is started. .

Therefore, when there is a scene change in the middle, while the compressed image data of a certain compression reference period is being read out from the - video RAM and decompressed, the writing process of the compressed image data is performed across the other two video RAMs. is performed (see the scene change section in FIG. 9C9D). In other words, the compressed image data before the scene change (CVGN+1) is written to one of the two video RAMs, and the compressed image data after the scene change (CVGN+1) is written to the other.
+2) is written. In this sense, three video RA
M22a-22c are used.

Although not mentioned above, an example of an IC that performs compression processing in the image compression section 19 and decompression processing in the image decompression section 46 is Intel Corporation's ICE82750PB for compression and decompression.

Next, special playback such as still playback and strobe playback will be explained.

First, still playback will be explained. The playback tape running speed in still playback is the same as in normal playback.

FIG. 11 is a flowchart showing the operation of still playback (first still playback) in which still images based on reference image data are sequentially displayed by manual operation.

In the figure, when the first still playback is designated by operating the keyboard 140, it is determined in step 61 whether synchronization code 2, 3, or 4 has been input.

When any of these sync coats are entered,
At step 62, the mode code and control code placed following the synchronization code are loaded into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 63-, it is determined whether the synchronization coat l has been manually applied. When synchronization code l is input,
At step 64, one of the video RAMs (Video RAM
Reference image data is written into M22a to M22c (used sequentially).

Next, in step 65, the reference image data is read from the video RAM, and the image decompression section 46 performs decompression processing to form image data for one frame, and this image data for one frame is stored in the memory. Store.

Then, image data for one frame is repeatedly read out from this memory, and a still image based on the reference image data is displayed on the monitor connected to the terminals 49R to 49B.

Next, in step 66, DAT 130 is placed in a playback pause.

Next, in step 67, it is determined whether the playback key on keyboard 140 is on. If the playback key is on, the playback pause state of the DAT 130 is released in step 68, and the process returns to step 61. Then, by the same operation as described above, a still image based on the reference image data of the next compression reference period is displayed.

If the playback key is not on in step 67, it is determined in step 69 whether the stop key on keyboard 140 is on. If the stop key is not on, the process returns to step 67.

In step 69, when the stop key is on, the first
Stops the still playback operation.

FIG. 12 is a flowchart showing the operation of still playback (second still playback) in which still images based on reference image data immediately after a scene change are sequentially displayed by manual operation.

In the figure, when the second still playback is designated by operating the keyboard 140, it is determined in step 71 whether synchronization code 2, 3, or 4 has been input manually.

When any of these sync codes are entered,
In step 72, the mode code placed following the synchronization code is loaded into the control area, and in step 73, based on the data indicating the presence or absence of a scene change in the mode code,
It is determined whether there is a scene change or not. If there is no scene change, the process returns to step 71.

When there is a scene change, the control code following the mode code is fetched in step 74.

Then, based on the mode code and the control code, the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 75, it is determined whether synchronization code 1 was entered manually. When the synchronization code l is input, in step 76, one of the video RAMs (Video RAM
22a to 22c are sequentially used) to write the reference image data immediately after the scene change.

Next, in step 77, the reference image data is read from the video RAM, and the image expansion section 46 performs expansion processing to form one frame of image data, and this one frame of image data is stored in the memory. .

Then, one frame worth of image data is repeatedly read out from this memory, and a still image based on the reference image data immediately after the scene change is displayed on the monitor connected to the terminals 49R to 49B.

Next, in step 78, DAT 130 is placed in a playback pause.

Next, in step 79, it is determined whether the playback key on keyboard 140 is on. If the playback key is on, the playback pause state of the DAT 130 is released in step 80, and the process returns to step 71. Then, by the same operation as described above, a still image based on the reference image data immediately after the next scene change is displayed.

If the playback key is not on in step 79, it is determined in step 81 whether the stop key on the keyboard 140 is on. If the stop key is not on, the process returns to step 79.

Step 81, when the stop key is on, the second
Stops the still playback operation.

Figure 13 shows still playback (3rd stage) in which still images based on reference image data are automatically displayed sequentially at predetermined time intervals.
12 is a flowchart showing the operation of still playback. Steps corresponding to those in FIG. 11 are indicated with the same reference numerals.

In the figure, after the DAT 130 is placed in a playback pause state in step 66, it is determined in step 91 whether or not time t has elapsed.

When time t has elapsed, it is determined in step 92 whether the stop key of keyboard 140 is on. If the stop key is not on, then in step 68 the DAT
The playback pause state of 130 is released and the process returns to step 61.

In step 92, when the stop key is on, the third
Stops the still playback operation.

The rest is the same as the example in FIG. 11.

In this third still playback, still images based on reference image data of each compression reference period are automatically displayed on the monitor one after another at time intervals determined by time t.

Figure 14 shows still playback (fourth stage) in which still images based on standard image data immediately after a scene change are automatically displayed one after another.
12 is a flowchart showing the operation of still playback. Steps corresponding to those in FIG. 12 are indicated with the same reference numerals.

In the figure, after the DAT 130 is placed in a reproduction pause state in step 78, it is determined in step 94 whether or not time mt has elapsed.

When time t has elapsed, it is determined in step 95 whether the stop key of keyboard 140 is on. If the stop key is not on, at step 80, the DAT
The playback pause state of i30 is released and the process returns to step 71.

In step 95, when the stop key is on, the fourth
Stops the still playback operation.

The rest is the same as the example in FIG. 12.

In this fourth still playback, the next scene change is detected after time t has elapsed, and still images based on the reference image data immediately after the scene change are automatically displayed on the monitor one after another.

It should be noted that when the normal playback operation shown in the flowchart of FIG. It is also possible to configure a still image to be displayed on a monitor so that a still image of an arbitrary frame can be monitored.

Next, strobe playback will be explained. The playback tape running speed in strobe playback is the same as in normal playback.

FIG. 15 is a flowchart showing the operation of strobe playback.

In the figure, when strobe playback is designated by operating the keyboard 140, it is determined in step 151 whether synchronization code 2, 3, or 4 has been entered manually.

When any of these sync coats are entered,
At step 152, the mode code and control code placed following the synchronization code are taken into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 153, it is determined whether synchronization code 1 was entered manually. When synchronous code 1 is input,
In step 154, one of the video RAMs (Video R
AM 22a to 22c are used sequentially) to start manually processing compressed image data for one compression reference period.

Next, in step 155, it is determined whether the synchronization code t"1 has been manually input. When the synchronization code l is manually input, N=0 is set in step 156, and L=1 is set in step 157. set, and step 15
At step 8, manual input of compressed image data for one compression reference period to the next video RAM is started.

Next, in step 159, the video R is
The reference image data written in the AM is read out and expanded by the image expansion section 46. And terminals 49R to 49
A still image based on the reference image data is displayed on a monitor (not shown) connected to B.

Next, in step 160, N:N+1 is set, and the differentially compressed image data ΔcN is read out from the video RAM and decompressed.

Next, in step 161, it is determined whether N is equal to LXM+1. Here, M is the number of frame skips in strobe display, and is set in advance using the keyboard 140.

In step 161, if they are not equal, in step 16
Returns to 0 and performs the same processing as described above. On the other hand, if they are equal, a still image based on the differentially compressed image data ΔcN is displayed on the monitor in step 162.

Next, in step 163, it is determined whether synchronization code 1 was entered manually. When synchronization code 1 is not manually input, L=L+1 is set in step 164, and step 1
Returning to step 60, the same operation as described above is performed.

When the synchronization code 1 is entered manually in step 163, it is determined in step 165 whether or not the stop key of the keyboard 140 is on.

When the stop key is not on, the process returns to step 156 and the same operation as described above is repeated, while when the stop key is on, the strobe playback operation is stopped.

In such a strobe playback operation, in each compression reference period, still images based on image data of every M frame are sequentially displayed on the monitor, so-called strobe display.

Next, fast-forward playback will be explained.

FIG. 16A shows reproduced image data during normal reproduction, and VBI, VB2, . . . are reference image data of each compression reference period, and are reproduced at 1 second intervals during normal reproduction.

In this example, when certain reference image data, for example VBI, is played back, the playback tape running speed of the DAT 130 is doubled from the normal speed and run for 2 seconds, and then the playback tape running speed is returned to the normal speed and the next The reference image data is reproduced (as shown in Figure B).

Thereafter, similar operations are repeated.

The reason why the reproduction tape running speed is returned to normal before reproducing the reference image data is to allow the rotary head to scan correctly without crossing the recording track.

As shown in FIG.
6, V B 11. ... is played.

Note that in the portion shown by the broken line, the rotary head scans across the recording track, and correct image data cannot be obtained.

The reference image data VBI, VB6, reproduced in this way
V B 11, . . . are sequentially written into the video RAMs 22a to 22c, as shown in the figure.

Then, the reference image data written in the video RAMs 22a to 22c is read out, supplied to the image decompression section 46, and decompressed, thereby forming image data for one frame. Then, this still image based on the image data for one frame continues to be displayed until the image data for one frame is formed using the next reproduced reference image data (
(Illustrated in Figure E).

2, during normal playback, the content displayed at 5-second intervals (for example, the image Ii based on the reference image data VBl and VB6) is changed to 3 by the above-described playback operation.
．． Displayed at intervals of 15 seconds. Therefore, 5/
3.15''i Fast-forward playback of about 1.6 times is performed.

FIG. 17 is a flowchart showing the operation of this fast-forward playback.

In the figure, when fast-forward playback is specified by operating the keyboard 140, the controller 110 moves to step 171.
The DAT 130 is controlled to be in a normal speed playback state.

Next, in step 172, it is determined whether synchronization code 2, 3, or 4 has been input.

When any of these sync codes are entered,
At step 173, the mode code and control code placed following the synchronization code are loaded into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 174, it is determined whether the synchronization court 1 has been manually operated. When sync code 1 is manually generated,
In step 175, one of the video RAMs (Video R
A M 22 a to 22 c are used sequentially) to write reference image data.

Next, in step 176, the reference image data is read from the video RAM, and the image decompression unit 46 performs decompression processing to form image data for one frame, and stores the image data for one frame in the memory. Store. Then, image data for one frame is repeatedly read out from this memory, and a still image based on the reference image data is displayed on the monitor connected to the terminals 49R to 49B.

Next, in step 177, the controller 110 controls the DAT 130 to double the tape running speed.

Next, in step 178, it is determined whether two seconds have elapsed. When two seconds have elapsed, it is determined in step 179 whether the stop key on keyboard 140 is on.

When the stop key is not on, the process returns to step 171 and the same operation as described above is performed, and when the stop key is on, fast-forward playback is stopped.

In the above description, an example has been shown in which fast-forward playback is performed at a speed of approximately 1.6 times, but by adjusting the speed of the playback tape running speed and the closed position during running, fast-forward playback can be performed at any speed.

Next, slow playback will be explained.

FIG. 18A shows reproduced image data during normal reproduction, and CVGI, CV G2, . . . are compressed image data of each compression reference period (reference image data VBN and differential compressed image data Δcl to Δc29). During normal playback, the images are played back sequentially every second.

In this example, the DAT 130 is put into a normal speed playback state for three compression reference periods, then put into a playback pause state for the same period as that period, and this is repeated thereafter.

By the operation of the AT 130 as described above, as shown in FIG.
I-CVG3) is played back consecutively, and then after the same period, the compressed image data (CVG4
~CVG6) are played continuously. Hereinafter, the same process will be repeated.

Each compressed group reproduced in this way /! S-period leap period reduction fR
-F-Evening CVG1. CVG2.661+ is C in the same figure.
As shown in FIG. 3, the data are sequentially written into the video RAMs 22a to 22c.

The compressed image data written in the video RAMs 22a to 22c is then read out and supplied to the image decompression section 46 for decompression processing. In this case, compressed image data CVG1. CVG2, ◆War, image data for 30 frames each, VGI, VO2,
... is formed.

Then, a moving image based on the image data VGI, VO2, . . . is displayed on the monitor, but the same screen is displayed continuously two frames at a time. In other words, image data VG
The time axes of the moving images of I, VO2, ◆, etc. are expanded twice and displayed (as shown in the figure).

In this way, the time axis of the moving image displayed on the monitor is expanded by twice, so that a 1/2 slow-motion image is displayed on the monitor.

FIG. 19 is a flowchart showing the operation of this slow playback.

In the figure, when slow playback is specified by operating the keyboard 140, in step 181, the controller 110
The DAT 130 is controlled to be in a normal speed playback state.

Next, in step 182, it is determined whether synchronization court 2, 3, or 4 has been manually operated.

When any of these sync codes are entered,
At step 183, the mode code and control code placed following the synchronization code are taken into the control area, and the image decompression section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 184, N=0 is set, and then in step 185, it is determined whether synchronization code 1 has been input.

When synchronization code 1 is input manually, N=N+1 is set in step 186, and then N=2 is set in step 187.
It is determined whether or not. If N=2, step 1
Go directly to step 88 and when N=2, step 18
9 to step 188.

In step 189, reading of compressed image data for three compression reference periods that are successively written into the video RAMs 22a to 22c is started, and the image decompression section 46 starts decompression processing, and the monitor ( (not shown)
Display video images.

In this case, the same screen is displayed continuously two frames at a time.

In step 18B, input of compressed image data for one compression reference period to one of the video RAMs (the video RAMs 22a to 22c are sequentially used) is started.

Next, in step 190, it is determined whether synchronization code 1 has been input. When the synchronization code l is manually input,
At step 191, it is determined whether N=3. N
If not equal to 3, the process returns to step 186 and the same operations as described above are repeated.

When N=3, in step 192, the DAT 130 is controlled by the controller 110 to enter a reproduction pause state. At this point, the video RAMs 22a to 22
Compressed image data for three consecutive compression reference frames is written in c.

Next, in step 193, it is determined whether or not the same time T3 as the above-mentioned three compression reference periods has elapsed.

Here, the reason why it is not set to 3 seconds is because the 3 compression reference periods may become shorter than 3 seconds when there is a scene change as described above.

Next, in step 194, the DAT 130 is controlled by the controller 110, the reclaimed water state is canceled, and in step 195, N=0 is set, and then in step 1
At step 96, it is determined whether the stop key of the keyboard 140 is on.

When the stop key is not on, the process returns to step 186 and repeats the above-described operation, while when the stop key is on, the slow playback operation is stopped.

In addition, although the above description is based on an example in which the normal speed playback state for 1 period based on 3 compressions and the playback pause state for the same period are repeated, the 3 compression reference periods are based on the three video RAMs 22a to 22C. It is determined in accordance with the above, and is not limited to this. For example, it may be one compression reference period or two compression reference periods.

Furthermore, although the above example shows an example in which 1/2 slow playback is performed, slow playback at any speed is possible by adjusting the pause period. For example, if the pause period is twice the compression reference period played back at normal speed,
If the same screen is displayed for three frames, the time axis of the moving image displayed on the monitor will be expanded three times, resulting in slow playback of 173.

Next, reverse playback will be explained.

In order to realize reverse playback, the recorded data is structured as shown in FIG. The data structure of the control area is changed with respect to the example in FIG. 4.

That is, four synchronous coats IA~4 in each compression reference period
A and mode codes IA to 4A are arranged. These are similar to the synchronization code and mote code in the example of FIG.

In the one shown in FIG. 20, the synchronization code IA
~4A, Mortco-F' I In a position symmetrical to A~4A (the control coat area in the example in Figure 4), there is a synchronization coat IB.
~4B and mode code IB~4B are arranged.

Same passage 1i ko-1'lA ~ 4A, %-t-t-F'I
A to 4A are made detectable during normal playback, while
Dokoh Co-FIB ~4B, %-F'Co-FIB ~4
B can be detected during reverse playback.

Similar to the mode codes in the example of FIG. 4, mode codes IA to 4A contain data corresponding to the next compression reference period in the normal playback direction.

Mode codes IB to 4B contain data corresponding to the next compression reference period in the reverse playback direction.

In addition to data similar to mode codes IA to 4A, this includes differential compressed image data ΔC in the next compression period.
Variation data of the data amount from 1 to Δc29, data as to whether or not the period is immediately before the occurrence of a scene change, data on the period in that case, etc. are arranged.

In the above description, the amount of data of the differentially compressed image data Δcl to Δc29 is fixed, and therefore the arrangement position of each differentially compressed image data is fixed. However, as described later, differentially compressed image data Δc1 to Δ
The amount of data of c29 may be varied to improve the performance of image data. In this case, the arrangement position of each differentially compressed image data changes. Therefore, as will be described later, in order to control the addresses of the video RAMs 22a to 22c during reverse playback and write playback data from the reverse direction to exactly the same address as during normal playback, each differentially compressed image data Δcl
It is necessary to consider the data amount of ~Δc29.

This is the differentially compressed image data Δcl~
This is the reason why the fluctuation data of the data amount of Δc29 is arranged.

This variation in data amount will be described later.

By configuring the recorded data as shown in FIG. 20, during normal playback, the synchronization codes IA to 4A and the remote code are
A reproducing operation is performed using F'IA to 4A.

Also, during reverse playback, synchronization codes IB to 4B are used.

A reproducing operation is performed using moat coats IB to 4B. In this case, based on the data amount fluctuation data of the differentially compressed image data arranged in mode codes IB to 4B,
The addresses of the video RAMs 22a to 22c are controlled, and playback data is written from the opposite direction to exactly the same address as during normal playback.

As a result, the subsequent decompression processing in the image decompression section 46 is performed in the same manner as during normal playback, and a reverse playback screen is displayed on the monitor.

It should be noted that with the structure of the recorded data as shown in FIG. 20, still playback in the reverse direction, fast forward playback, and slow playback can be performed in the same way.

Next, fluctuations in the amount of data of the differentially compressed image data Δc1 to Δc29 will be explained.

FIG. 21 shows an example of realizing variation in data amount.

As the area of reference image data, 276,480 hits are provided as in the case where the amount of data is fixed as described above.

Also, the area of differentially compressed image data Δcl to Δc29 is defined as 31 areas 81 of 27200 bits each.
~B31 are provided. The total area is 843,200 bits.

27200X31 = 843200 bits The image area for one compression reference period is 1152000 bits as described above.
The remaining 32320 bits are used for fixed length adjustment.

Reference image data is arranged in the reference image data area. This is similar to the case where the amount of data is fixed as described above.

Also, basically, the differentially compressed image data Δcl to Δc2
9 are placed in area B1-829, respectively. However, if the image changes rapidly from an image with little movement to an image with large movement, and the differentially compressed image data cannot be accommodated in the 27200-bit area, 2WA or more space is used.

In this way, when two or more areas are used for one piece of differentially compressed image data, the information is placed and recorded at the beginning of the control code, for example, as shown in the figure.

Data 1 to 29 indicating differentially compressed image data using two or more areas are arranged in the block number section. Also,
In the number part, data indicating the number of areas to be used (for example, 2 is "0", 311N is "IJ") is arranged.

For example, when two areas are used for each of the differentially compressed image data Δc5 and Δc20, the first block number part data is "6" and the number part data is "6".
0'', ``20'' as the next block number part data, and ``0'' as the number part data.

As a result, image data Δc1 to Δc4 are arranged in regions B1 to B4, respectively, image data Δc5 is arranged in regions B5 and B6, image data Δc6 to Δc19 are arranged in regions B7 to B20, respectively, and image data Δc20
is arranged in areas B21 and B22, and image data Δc2
1 to Δc29 are shown to be arranged in regions 823 to B31, respectively.

During playback, this information is taken into the controller 110, the addresses of the video RAMs 22a to 22c are controlled, and the playback signal processing is performed correctly in the same way as in the case where the data amount of each differentially compressed image data is fixed. It will be done like this.

FIG. 22 shows another example of realizing variation in data amount.

As in the case where the amount of data is fixed, 276,480 bits are provided as the area for the reference image data.

Moreover, the area of differentially compressed image data Δc1 to Δc29 is
Only the bits corresponding to the amount of data are provided.

Then, differentially compressed image data ΔC provided in the image area
1 to Δc29, the control area includes video RAMs 22a to 22 which are written during playback.
The address information of 2c is arranged as, for example, 18-bit data.

During playback, this address information is taken into the controller 110, and the addresses of the video RAMs 22a to 2-2c are controlled to ensure that playback signal processing is performed correctly, as in the case where the data amount of each differentially compressed image data is fixed. be made to be

By varying the amount of data as shown in FIGS. 21 and 22, it is possible to record and reproduce differentially compressed image data with an amount of data that corresponds to the image condition, thereby improving the performance of the image data. can.

In addition, from the perspective of being able to use the image area effectively, the second
The example in FIG. 2 is better, but the example in FIG. 21 is better from the viewpoint of effective use of the v control area.

Next, time code will be explained.

Although not mentioned above, it is conceivable to arrange a time code in the control area of recording data.

In the above example, the synchronization code section is 64 bits, but as shown in FIG. establish.

Similarly to the synchronization code section and the mote code section, this time code section also receives 4W, for example, in one compression reference period (1 second).
A is provided, but the same data is allocated to four of them.

The 16-bit data in the time code F section represents, for example, absolute time (seconds). In this case, each digit of the decimal number is represented by a 4-bit binary number, so-called BCD (2
If it is data (evolved decimal), it can represent time from 0 to 9999 seconds. Also, if it is 16-bit binary data, O
It can represent a time of ~(2''-1) seconds.

During playback, by importing the time code recorded in this way, it can be used to control searches, display of remaining tape capacity, position adjustment during editing, etc.

In addition, by using the time code mentioned above, 1
It is possible to perform a search with an accuracy of a second, but by using different types of synchronization codes 1-4, it is also possible to perform a search with an accuracy of 1/4 second.

Furthermore, by using the variation data of each differentially compressed image data placed in the control area as described above,
This makes it possible to search with frame precision, making it useful for screen adjustment during editing, for example.

Note that the structure, arrangement position, and number of bits of the time code are not limited to the example shown in FIG. 23. For example, the time court structure may be expressed in hours, minutes, and seconds.

Next, by using the signal processing device shown in FIG.
The signal with the data structure of the example in Figure 4 or the example in Figure 20 is DA
An example will be described in which a tape recorded with T is digitally dubbed using two DATs.

FIG. 24 shows a configuration for digital dubbing using two DATs.

In the same figure, 201 is the DAT on the master side, and 201 is the DAT on the master side.
02 is a DAT on the slave side. These DAT201
and 202 are connected with a so-called digital audio interface DAI, and DAT2
From 01 to DAT202, in order to synchronize both,
A synchronizing signal such as a pit clock BCK is supplied. Further, the DAT 201 supplies the DAT 202 with various control flags for controlling the operation of the DAT.

Further, the DAT 201 is equipped with at least a video reproduction circuit of the signal processing device shown in the example of FIG. 1, and a monitor 203 is connected to the video out terminal.

Further, the DAT 201 is provided with a dubbing start key 201a, a dubbing stop key 201b, and a dubbing period setting key 201C in addition to normal recording/reproducing keys (not shown).

First, an example will be described in which dubbing is performed for an arbitrary period while monitoring the playback screen along the flowchart of FIG. 25. In this dubbing example, in addition to the synchronization codes F'I A to 4A, it is necessary to arrange and record synchronization codes IB to 4B for reverse playback, as in the example in FIG. .

While the DAT 201 is in normal playback mode and a moving image is displayed on the monitor 203, press the dubbing start key 201a.
is turned on and dubbing is instructed, step 21
1, a recording pause flag is supplied from DA'T2O1 to 202, and DAT 202 is placed in a recording pause state.

Next, in step 212, the frame image data at the time when the dubbing start key 201a was turned on is sequentially read out from the image expansion section 46, and a still image is displayed on the monitor 203.

Next, in step 213, the DAT 201 starts reverse playback. Even during this reverse playback, still images continue to be displayed on the monitor 203.

Next, in step 214, it is determined whether the synchronization code IB has been input. When synchronization code IB is input, it is determined in step 215 whether synchronization code 4B has been input. When synchronization code 4B is input, it is determined in step 216 whether synchronization code 3B has been input.

At step 216, when synchronization code 3B is input, step 21? Then, the reverse playback of the DAT 201 is stopped.

Next, in step 218, a pause release flag is supplied from the DAT 201 to the DAT 202, and the DAT 202 is placed in a recording state.

At step 219, normal playback of the DAT 201 is started, and the digital audio interface DA
Reproduction data is supplied to the DAT 202 via I, and recording is started.

Then, in step 220, display of a moving image is started on the monitor 203.

Next, in step 221, it is determined whether the dubbing stop key 201b is on. When the dubbing stop key 201b is on, in step 222, the synchronization code F'
It is determined whether IA has been input. Synchronous court IA
is input, in step 223, the synchronization code F
'2 It is determined whether or not A has been input.

When the synchronization code F' 2 A is input, a recording stop flag is supplied from the DAT 201 to the DAT 202 in step 224, the DAT 202 is placed in a stopped state, and recording is stopped.

Then, in step 225, reproduction of the DAT 201 is stopped, and the dubbing operation is ended.

According to the dubbing example shown in FIG. 25, a still image based on the frame image data at the time when the dubbing start key 201a is turned on is displayed, so that it is possible to confirm the image at which dubbing is to be started. Also, by control based on the synchronization code, the synchronization code 4A.

It is recorded from the part immediately before F2A of synchronous code F2A.
, 2B, the necessary parts can be recorded efficiently.

Next, an example will be described in which dubbing for an arbitrary period is executed while monitoring the playback screen along the flowchart of FIG. 26. It should be noted that this dubbing example can be applied to recording in either the configuration shown in the example shown in FIG. 4 or the example shown in FIG. 20. In the example in FIG. 20, synchronization codes 1 to 4 are synchronization codes IA to 4A.
corresponds to

When the dubbing start key 201a is turned on and dubbing is instructed while the DAT 201 is in the normal playback state and a moving image is displayed on the monitor 203, step 231
Then, the recording pause flag is supplied from the DAT 201 to the recording pause flag 202, and the DAT 202 is placed in a recording pause state.

Next, in step 232, it is determined whether synchronization code 3 has been input. When Synchronous Court 3 is manually operated,
In step 233, a pause release flag is supplied from the DAT 201 to the DAT 202, and the DAT 202 is placed in a recording state. As a result, recording of playback data supplied from the DAT 201 via the digital audio interface DAI is started.

Next, in step 234, it is determined whether the dubbing stop key 201b is on. When the dubbing stop key 201b is on, it is determined in step 235 whether synchronization code 1 has been input. When synchronization code 1 is input manually, it is determined in step 236 whether synchronization code 2 has been input.

When the synchronization court 2 is manually operated, a recording stop flag is supplied from the DAT 201 to the DAT 202 in step 237, the DAT 202 is brought into a stopped state, and recording is stopped.

Then, in step 238, reproduction of the DAT 201 is stopped, and the dubbing operation is ended.

In the dubbing example shown in FIG. 26 as well, the control based on the synchronization code records from the part immediately before synchronization code 4, and also records up to the part immediately after synchronization code 2, so that necessary parts can be efficiently recorded.

Next, an example in which dubbing is performed during a set dubbing period will be described along the flowchart of FIG. 27. Note that this dubbing example can be applied to a dubbing in which a time code is recorded, as shown in FIG.

First, in step 241, the dubbing period setting key 201
The dubbing start time and dubbing end time are set using c. For example, the time is input in "hours, minutes, seconds".

Next, in step 242, when the dubbing start key 201a is turned on, in step 243, a recording pause flag is supplied from the DAT 201 to the DAT 202, and the DAT
202 is in a recording pause state.

Next, in step 244, reproduction of the DAT 201 is started, and in step 245, it is determined whether the time code detected from the control area of the reproduced data is "dubbing start time - 1 second". When the time code is "dubbing start time - 1 second", it is determined in step 246 whether synchronization code 3 has been input.

When synchronization code 3 is input in step 246, a pause release flag is supplied from DAT 201 to 202 in step 247, and DAT 202 is placed in a recording state. As a result, recording of playback data supplied from the DAT 201 via the digital audio interface DAI is started.

Next, in step 248, it is determined whether the time coat detected from the control area of the reproduced data is "dubbing end leap +1 second". When the time coat is "dubbing end time + 1 second", in step 249, the DA
A recording stop flag is supplied from T201 to 202, and DA
T202 is set to a stopped state, and recording is stopped.

Then, in step 250, reproduction of the DAT 201 is stopped and the dubbing operation is completed.

According to the dubbing example shown in FIG. 27, dubbing for a set period can be automatically performed. Further, by controlling based on the synchronization coat, the data is recorded from the part immediately before the synchronization code 4, and also the part immediately after the synchronization code 2, so that the necessary part can be efficiently recorded.

In addition, in the example in FIG. 24, the DAT20 on the master side
Although the DAT 202 on the slave side is provided with an operation key, it is also possible to configure the DAT 202 on the slave side so that the key is operated.

By the way, in the above example, only image data for a moving image is recorded, but it is also possible to record image data for a still image by switching.

In this case, as shown in FIG. 28, after certain moving image compressed image data is arranged, still image image data S1, S
2,... are recorded.

In this way, image data for still images Sl, S2,...
The recording of can be easily realized using the signal processing device shown in FIG.

That is, the image data of each frame that is sequentially input to the RAMs 17a to 17c is read out and recorded as still image data in the data area.

In this case, the image compression unit 19 performs compression processing to make the still image image data Sl, S2, . . . Alternatively, image data for still images of higher image quality can be recorded by expanding the area and recording without compression.

According to the signal processing device shown in FIG. 1, the RA for three frames is
Since the M17a to M17c are included, even if the image data for still images is of high image quality, it is possible to record at least three continuous frames, or so-called three snapshots.

In addition, as shown in FIG. 28, image data S for still images
A synchronization code section and a mode code section are provided in the control area immediately before the start of each of t, S2, . . . . Data indicating that the mode is a still image mode is arranged in the Morco F section.

During playback, control is performed to shift from moving image playback processing to still image playback processing based on data indicating that the still image mode is detected from the control area of the playback data.

In the example shown in FIG. 28, image data S for still images
1. S2. ... are arranged consecutively, but they may be arranged at predetermined intervals.

In the above embodiment, for the total number of bits of the digital signal recorded and reproduced in the DAT, which is 16 bits,
Although 12 bits are used as an image area, 3 bits are used as an audio area, and 1 bit is used as a control area, it goes without saying that the number of hints and the arrangement device are not limited to these.

In the above embodiment, the video signal is NTSC.
This is an example of handling C method, but PA
Video signals of other systems such as L system or S E CAM system can also be handled in the same way. In that case,
Changes are required depending on the number of frames, etc. For example, when the number of frames is 25 frames/second, there are 24 pieces of differentially compressed image data ΔC1 to Δc24.

Further, in the above-described embodiments, the recording/reproducing apparatus is a DAT, but the present invention can be similarly applied to a disc or an optically recorded recording medium.

[Effects of the Invention] As explained above, according to the present invention, not only audio signals but also video signals for moving images or still images can be simultaneously digitally recorded and reproduced. Therefore, a very convenient recording and reproducing device, such as a DAT, can be obtained.

In addition, by selectively switching the image area to a moving image area and a still image area, digital video signals for moving images and digital video signals for still images can be recorded and played back. Partly, the image area is a still image area, and a digital video signal that reproduces a high-quality still image can be recorded and reproduced.

Furthermore, data that identifies the moving image area and the still image area is placed in the control area (for example, the moat coat area), so that during playback, the processing from the moving image playback process to the still image playback process is performed based on this data. can be controlled to automatically shift to

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a signal processing device according to the present invention, FIGS. 2 to 6 are diagrams for explaining recorded data, and FIGS. 7 to 9
The figure is a diagram for explaining the example in Figure 1, Figure 10 is a flowchart showing the operation during normal playback, Figures 11 to 15 are flowcharts showing the operation in still playback, and Figure 16 is the operation in fast forward playback. Figure 17 is a flowchart showing the operation of fast-forward playback, Figure 18 is an explanatory diagram of the operation of slow playback, Figure 19 is a flowchart showing the operation of slow playback, and Figure 20 is a flowchart showing the operation of slow playback. A configuration diagram of recorded data, Figures 21 and 22 are diagrams showing the configuration of recorded data when changing the amount of data, Figure 23 is a diagram for explaining time code, and Figure 24 is for digital dubbing. FIGS. 25 to 27 are flowcharts showing the dubbing operation, and FIG. 28 is a diagram showing the structure of recording data when switching between moving images and still images. 17a-17c. 22a to 22c -RAM ・・Image compression unit ◆ΦVidet RAM ・・Mixing circuit ・・Control data generation circuit ・・Scene change detection circuit 130° 33・War・Audio DSF 41 ・・Separation circuit 42 ・・Control data Discrimination circuit 46... Image decompression section 110... φ controller 1201 - RAM controller 201.202 - Pot/DAT 140... Keyboard 203 Tomonitor still playback (first still playback) Figure 11 Still playback (third still playback) Regeneration) Fig. 3 Fig. 7 Fig. A hood Fig. 23 S) shift) V9° pin 7° inertia rk Fig. 24 Fig.

Claims (2)

[Claims] (1) A digital signal of N bits (N is an integer) is recorded and reproduced, and a part of the N bits forms an image area, an audio area, and a control area, respectively, and the image area includes a moving image area. and a still image area are selectively formed; in the moving image area, compressed digital video signals for multiple screens constituting a moving image are sequentially arranged as one unit; in the still image area, A digital signal recording and reproducing method in which digital video signals for one screen that make up a still image are sequentially distributed as one unit. (2) Claim 1, wherein the control area includes data for identifying a moving image area and a still image area of the image area.
The recording and reproducing method of the digital signal described above.