JPH0446491B2 - - Google Patents

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Publication number
JPH0446491B2
JPH0446491B2 JP60057136A JP5713685A JPH0446491B2 JP H0446491 B2 JPH0446491 B2 JP H0446491B2 JP 60057136 A JP60057136 A JP 60057136A JP 5713685 A JP5713685 A JP 5713685A JP H0446491 B2 JPH0446491 B2 JP H0446491B2
Authority
JP
Japan
Prior art keywords
signal
high frequency
circuit
frequency signal
envelope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60057136A
Other languages
Japanese (ja)
Other versions
JPS61214825A (en
Inventor
Tsugio Hori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP5713685A priority Critical patent/JPS61214825A/en
Publication of JPS61214825A publication Critical patent/JPS61214825A/en
Publication of JPH0446491B2 publication Critical patent/JPH0446491B2/ja
Granted legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Transmitters (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、TDMA通信地上局相互で行うルー
ラル通信等における送信機等で用いられる高周波
電力増幅回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a high frequency power amplification circuit used in a transmitter and the like in rural communication between TDMA communication ground stations.

(従来の技術) 第8図は従来のこの種の高周波電力増幅回路の
ブロツク図である。この電力増幅回路で送信出力
信号がバーストスイツチングにより他の送信チヤ
ンネル或は、自局の受信チヤンネルに悪影響を及
ぼす程にスペクトラムが拡がるのを抑えるため
に、出力波形を制御する。スペクトルの拡がりが
少ない出力では、包絡線の立上がり及び立下がり
がなだらかであり、第7図にこのような好ましい
包絡線の一例を示す。第8図の高周波電力増幅回
路において、入力レベル制御回路10は入力高周
波信号121にレベル制御信号104に応じて減
衰を加え、減衰高周波信号110を出力する。増
幅器2は、減衰高周波信号110を電力増幅して
高電力高周波信号102を出力する。検波器3
は、高電力高周波信号102を包絡線検波し、包
絡線信号103を出力する。基準包絡線信号発生
回路5は、第7図の波形の正側半分又は負側半分
の如き直流の基準包絡線信号105を発生する。
基準包絡線信号105は包絡線信号103として
望まれる波形である。比較回路4は、包絡線信号
103と基準包絡線信号105との電波差の波形
のレベル制御信号104を出力する。レベル制御
信号104は、基準包絡線信号105に対する包
絡線信号103の誤差を現わす。第8図の回路
は、このように閉ループを構成し、高電力高周波
信号102の包絡線が基準包絡線信号105の波
形に相似になるように作動する。
(Prior Art) FIG. 8 is a block diagram of a conventional high frequency power amplifier circuit of this type. This power amplifier circuit controls the output waveform in order to prevent the spectrum of the transmission output signal from expanding to the extent that it adversely affects other transmission channels or the receiving channel of the own station due to burst switching. In an output with little spectral spread, the rise and fall of the envelope are gentle, and FIG. 7 shows an example of such a preferable envelope. In the high frequency power amplifier circuit shown in FIG. 8, the input level control circuit 10 attenuates the input high frequency signal 121 according to the level control signal 104 and outputs an attenuated high frequency signal 110. The amplifier 2 power amplifies the attenuated high frequency signal 110 and outputs a high power high frequency signal 102. Detector 3
performs envelope detection on the high power high frequency signal 102 and outputs an envelope signal 103. The reference envelope signal generating circuit 5 generates a DC reference envelope signal 105 having a positive half or a negative half of the waveform shown in FIG.
Reference envelope signal 105 is the desired waveform for envelope signal 103. The comparison circuit 4 outputs a level control signal 104 having a waveform of a radio wave difference between the envelope signal 103 and the reference envelope signal 105. Level control signal 104 represents the error of envelope signal 103 relative to reference envelope signal 105. The circuit of FIG. 8 thus constitutes a closed loop and operates so that the envelope of the high power, high frequency signal 102 is similar to the waveform of the reference envelope signal 105.

第9図は入力レベル制御回路10の回路図であ
る。従来の入力レベル制御回路は、本図に示すよ
うに、入力端子31と出力端子32との間に2つ
のピンダイオード15が直列に接続してあつた。
本図の回路では、第3図に特性図を示す如く、あ
る程度のバイアス値に達するまではピンダイオー
ド15はオンせずあるバイアス値に達した場合に
急にオンするというヒステリシスをもつている。
そこで、入力レベル制御回路10への入力高周波
信号121がヒステリシスの領域にかかると、ピ
ンダイオード15が急にオンとなり電力増幅器2
への入力レベルが急激に増加するので、電力増幅
器2の出力102の波形は第5図に示される如く
高電力高周波信号102の包絡線の立上り波形が
急峻となりその結果出力102のスペクトラムが
拡がつてしまう。
FIG. 9 is a circuit diagram of the input level control circuit 10. In the conventional input level control circuit, two pin diodes 15 are connected in series between an input terminal 31 and an output terminal 32, as shown in this figure.
The circuit shown in this figure has hysteresis, as shown in the characteristic diagram of FIG. 3, in that the pin diode 15 does not turn on until it reaches a certain bias value, and then suddenly turns on when it reaches a certain bias value.
Therefore, when the input high frequency signal 121 to the input level control circuit 10 enters the hysteresis region, the pin diode 15 suddenly turns on and the power amplifier 2
As the input level to the power amplifier 2 increases rapidly, the waveform of the output 102 of the power amplifier 2 becomes steep as shown in FIG. I get tired.

(発明が解決しようとする問題点) 従来、このスペクトラムの拡がりを抑えるため
に、ヒステリシス領域を避けるように制御信号1
04のレベルを調整していたが、ピンダイオード
15を完全にオフできないので、高電力高周波信
号102の包絡線は第6図のような波形となる。
そこで、従来の回路ではバーストオン時とバース
トオフ時のキヤリヤリーク比のダイナミツクレン
ジがとれなかつた。このように、従来の高周波電
力増幅回路には、高周波信号のバーストスイツチ
ング時におけるスペクトラムの拡がりが大きいと
いう問題点があつた。
(Problem to be Solved by the Invention) Conventionally, in order to suppress the spread of this spectrum, the control signal 1 is controlled so as to avoid the hysteresis region.
However, since the pin diode 15 cannot be completely turned off, the envelope of the high power high frequency signal 102 has a waveform as shown in FIG.
Therefore, in the conventional circuit, it was not possible to maintain a dynamic range of the carrier leak ratio during burst-on and burst-off. As described above, the conventional high frequency power amplifier circuit has a problem in that the spectrum spreads greatly during burst switching of a high frequency signal.

そこで、本発明の目的は、高周波信号のバース
トスイツチング時におけるスペクトラムの拡がり
が小さい高周波電力増幅回路の提供にある。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a high frequency power amplifier circuit in which the spectrum spread is small during burst switching of a high frequency signal.

(問題点を解決するための手段) 前述の問題点を解決するために本発明が提供す
る手段は、入力高周波信号にレベル制御信号に応
じた減衰を与えて減衰高周波信号を出力する入力
レベル制御回路と、この減衰高周波信号を増幅し
て高電力高周波信号を出力する増幅器と、この高
電力高周波信号を検波してその高電力高周波信号
の包絡線信号を出力する検波器と、前記包絡線信
号として望まれるなだらかに立上りなだらかに立
下る包絡線を表わす基準包絡線信号を発生する回
路と、前記包絡線信号と前記基準包絡線信号との
波形の相違を表わす前記レベル制御信号を生ずる
比較回路とからなる高周波電力増幅回路であつ
て、前記入力レベル制御回路は前記入力高周波信
号の入力端子と前記減衰高周波信号の出力端子と
の間に直列に接続した点接触型シリコンダイオー
ドとピンダイオードとを備えることを特徴とす
る。
(Means for Solving the Problems) In order to solve the above problems, the present invention provides an input level control system that applies attenuation to an input high frequency signal according to a level control signal and outputs an attenuated high frequency signal. a circuit, an amplifier that amplifies this attenuated high frequency signal and outputs a high power high frequency signal, a detector that detects this high power high frequency signal and outputs an envelope signal of the high power high frequency signal, and the envelope signal. a circuit for generating a reference envelope signal representing an envelope that rises gently and falls smoothly; and a comparison circuit for generating the level control signal representing a difference in waveform between the envelope signal and the reference envelope signal. The input level control circuit includes a point contact type silicon diode and a pin diode connected in series between an input terminal for the input high frequency signal and an output terminal for the attenuated high frequency signal. It is characterized by

(実施例) 次に、本発明の実施例について、図面を参照し
て説明する。第1図は本発明の一実施例を示すブ
ロツク図である。この実施例では、基準包絡線信
号発生回路5が発生するなだらかな立上りおよび
立下り波形をもつ基準包絡線信号105に従つ
て、電力増幅器2への入力101が入力レベル制
御回路1によつて制御され、さらに増幅器2の出
力102は検波器3によつて包絡線検波され、検
波器3の出力103は、比較回路4によつて、基
準包絡線信号発生回路5の出力105と比較さ
れ、両者の誤差信号がレベル制御信号104とし
て入力レベル制御回路1に入力されて動作すると
いう閉ループを構成し、電力増幅器2の出力信号
102の包絡線波形が基準包絡線信号発生回路5
の出力信号105と相似となるように制御される
ことによつて、バーストスイツチング時における
出力102のスペクトラムの拡がりを抑えてい
る。
(Example) Next, an example of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention. In this embodiment, the input 101 to the power amplifier 2 is controlled by the input level control circuit 1 in accordance with the reference envelope signal 105 having gentle rising and falling waveforms generated by the reference envelope signal generating circuit 5. Further, the output 102 of the amplifier 2 is envelope-detected by the detector 3, and the output 103 of the detector 3 is compared with the output 105 of the reference envelope signal generation circuit 5 by the comparator circuit 4. The error signal is input to the input level control circuit 1 as a level control signal 104 to operate, forming a closed loop, and the envelope waveform of the output signal 102 of the power amplifier 2 is input to the reference envelope signal generation circuit 5.
By controlling the signal to be similar to the output signal 105 of the output signal 105, the spread of the spectrum of the output signal 102 during burst switching is suppressed.

本実施例における入力レベル制御回路1は、第
2図に回路図で示すように点接触型のシリコンダ
イオード6と2段のピンダイオード7とを入力端
子31と出力端子32間に直列に接続して構成し
ており、従来のピンダイオード2段で構成された
入力レベル制御回路10と比較して、点接触型の
シリコンダイオード6を追加することによつて、
第4図に特性図で示すようにヒステリシスが大幅
に軽減されている。
The input level control circuit 1 in this embodiment has a point contact type silicon diode 6 and a two-stage pin diode 7 connected in series between an input terminal 31 and an output terminal 32, as shown in the circuit diagram in FIG. By adding a point contact type silicon diode 6, compared to the conventional input level control circuit 10 consisting of two stages of pin diodes,
As shown in the characteristic diagram in FIG. 4, hysteresis is significantly reduced.

このように、本実施例を用いれば、比較回路4
からのレベル制御信号104によつて、ピンダイ
オードをオンからオフに近い状態まで制御できる
ので、高電力高周波信号102は包絡線波形が第
7図に示す如くになる。第7図の如き包絡線波形
の高電力高周波信号102は、スペクトラムの拡
がることのない、なめらかな立上り、立下り波形
をもち、バーストオン時とバーストオフ時との出
力比のダイナミツクレンジが十分にとれている。
In this way, if this embodiment is used, the comparator circuit 4
Since the pin diode can be controlled from an on state to an almost off state by the level control signal 104 from the high power high frequency signal 102, the envelope waveform becomes as shown in FIG. The high-power high-frequency signal 102 with an envelope waveform as shown in FIG. 7 has smooth rising and falling waveforms without spectrum expansion, and has a sufficient dynamic range of output ratio between burst-on and burst-off. It's taken away.

(発明の効果) 以上説明したように、本発明によれば、高周波
信号のバーストスイツチング時におけるスペクト
ラムの拡がりが小さく、ひいてはバーストオン・
オフした時のキヤリヤリーク比を大幅に改善した
高周波電力増幅回路が提供できる。
(Effects of the Invention) As explained above, according to the present invention, the spread of the spectrum during burst switching of a high frequency signal is small, and furthermore, the burst switching
It is possible to provide a high frequency power amplification circuit that significantly improves the carrier leakage ratio when turned off.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロツク図、
第2図は第1図実施例における入力レベル制御回
路の具体例を示す回路図、第3図は従来の入力レ
ベル制御回路の制御信号に対する出力レベルの特
性を示す図、第4図は第2図の入力レベル制御回
路の制御信号に対する出力レベルの特性を示す
図、第5図及び第6図は従来の高周波電力増幅回
路における高周波出力の包絡線波形の例を示す
図、第7図は、第1図実施例における高周波出力
の包絡線波形の例を示す図、第8図は、従来の高
周波電力増幅回路の一例を示すブロツク図、第9
図は第8図の従来の高周波電力増幅回路における
入力レベル制御回路を示す回路図である。 1,10…入力レベル制御回路、2…増幅器、
3…検波器、4…比較回路、5…基準包絡線信号
発生回路、6…シリコンダイオード、7,15…
ピンダイオード、8…制御信号印加回路、9…コ
イル。
FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a circuit diagram showing a specific example of the input level control circuit in the embodiment shown in FIG. FIGS. 5 and 6 are diagrams showing examples of the envelope waveform of high-frequency output in a conventional high-frequency power amplifier circuit. FIG. FIG. 1 is a diagram showing an example of the envelope waveform of the high frequency output in the embodiment; FIG. 8 is a block diagram showing an example of a conventional high frequency power amplifier circuit;
This figure is a circuit diagram showing an input level control circuit in the conventional high frequency power amplifier circuit of FIG. 8. 1, 10...input level control circuit, 2...amplifier,
3... Detector, 4... Comparison circuit, 5... Reference envelope signal generation circuit, 6... Silicon diode, 7, 15...
Pin diode, 8...control signal application circuit, 9...coil.

Claims (1)

【特許請求の範囲】[Claims] 1 入力高周波信号にレベル制御信号に応じた減
衰を与えて減衰高周波信号を出力する入力レベル
制御回路と、この減衰高周波信号を増幅して高電
力高周波信号を出力する増幅器と、この高電力高
周波信号を検波してその高電力高周波信号の包絡
線信号を出力する検波器と、前記包絡線信号とし
て望まれるなだらかに立上りなだらかに立下る包
絡線を表わす基準包絡線信号を発生する回路と、
前記包絡線信号と前記基準包絡線信号との波形の
相違を表わす前記レベル制御信号を生ずる比較回
路とからなる高周波電力増幅回路において、前記
入力レベル制御回路は前記入力高周波信号の入力
端子と前記減衰高周波信号の出力端子との間に直
列に接続した点接触型シリコンダイオードとピン
ダイオードとを備えることを特徴とする高周波電
力増幅回路。
1. An input level control circuit that applies attenuation to an input high frequency signal according to a level control signal and outputs an attenuated high frequency signal, an amplifier that amplifies this attenuated high frequency signal and outputs a high power high frequency signal, and this high power high frequency signal. a detector that detects the high-power high-frequency signal and outputs an envelope signal of the high-power high-frequency signal; a circuit that generates a reference envelope signal that represents a gently rising and gently falling envelope that is desired as the envelope signal;
A high frequency power amplification circuit comprising a comparator circuit that generates the level control signal representing a difference in waveform between the envelope signal and the reference envelope signal, wherein the input level control circuit is connected to an input terminal of the input high frequency signal and the attenuator. A high-frequency power amplifier circuit comprising a point-contact type silicon diode and a pin diode connected in series between a high-frequency signal output terminal.
JP5713685A 1985-03-20 1985-03-20 High frequency power amplifying circuit Granted JPS61214825A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5713685A JPS61214825A (en) 1985-03-20 1985-03-20 High frequency power amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5713685A JPS61214825A (en) 1985-03-20 1985-03-20 High frequency power amplifying circuit

Publications (2)

Publication Number Publication Date
JPS61214825A JPS61214825A (en) 1986-09-24
JPH0446491B2 true JPH0446491B2 (en) 1992-07-30

Family

ID=13047142

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5713685A Granted JPS61214825A (en) 1985-03-20 1985-03-20 High frequency power amplifying circuit

Country Status (1)

Country Link
JP (1) JPS61214825A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63136429U (en) * 1987-02-25 1988-09-07

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57211835A (en) * 1981-06-23 1982-12-25 Kokusai Electric Co Ltd Automatic electric power controlling circuit for transmitter
JPS5999851A (en) * 1982-11-29 1984-06-08 Nec Corp Signal control circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57211835A (en) * 1981-06-23 1982-12-25 Kokusai Electric Co Ltd Automatic electric power controlling circuit for transmitter
JPS5999851A (en) * 1982-11-29 1984-06-08 Nec Corp Signal control circuit

Also Published As

Publication number Publication date
JPS61214825A (en) 1986-09-24

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