JPH0442826B2 - - Google Patents
Info
- Publication number
- JPH0442826B2 JPH0442826B2 JP2116784A JP2116784A JPH0442826B2 JP H0442826 B2 JPH0442826 B2 JP H0442826B2 JP 2116784 A JP2116784 A JP 2116784A JP 2116784 A JP2116784 A JP 2116784A JP H0442826 B2 JPH0442826 B2 JP H0442826B2
- Authority
- JP
- Japan
- Prior art keywords
- melting point
- point metal
- connecting pin
- low melting
- plating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000002844 melting Methods 0.000 claims description 30
- 230000008018 melting Effects 0.000 claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 238000007747 plating Methods 0.000 claims description 23
- 239000010931 gold Substances 0.000 claims description 16
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 11
- 238000003780 insertion Methods 0.000 claims description 8
- 230000037431 insertion Effects 0.000 claims description 8
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 238000000605 extraction Methods 0.000 claims description 4
- 229910052763 palladium Inorganic materials 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 238000007711 solidification Methods 0.000 claims description 2
- 230000008023 solidification Effects 0.000 claims description 2
- -1 and On top of this Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 27
- 239000000155 melt Substances 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 230000007797 corrosion Effects 0.000 description 6
- 238000005260 corrosion Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000011247 coating layer Substances 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000004090 dissolution Methods 0.000 description 3
- 238000004381 surface treatment Methods 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- 229910015363 Au—Sn Inorganic materials 0.000 description 2
- 229910001128 Sn alloy Inorganic materials 0.000 description 2
- RAHZWNYVWXNFOC-UHFFFAOYSA-N Sulphur dioxide Chemical compound O=S=O RAHZWNYVWXNFOC-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910000906 Bronze Inorganic materials 0.000 description 1
- RWSOTUBLDIXVET-UHFFFAOYSA-N Dihydrogen sulfide Chemical compound S RWSOTUBLDIXVET-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 239000010974 bronze Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000003779 heat-resistant material Substances 0.000 description 1
- 229910000037 hydrogen sulfide Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】
(a) 発明の技術分野
本発明はLSIモジユール用接続ピンの構成とそ
の表面処理方法に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a structure of a connecting pin for an LSI module and a surface treatment method thereof.
(b) 技術の背景
電算機の処理能力を向上する方法としてLSIな
どの半導体装置はこれを構成する単位素子の小型
化と大容量化が進められているが同時に実装方法
も改良されつつある。(b) Technical background As a way to improve the processing power of computers, the unit elements that make up semiconductor devices such as LSIs are becoming smaller and larger in capacity, and at the same time, the mounting methods are also being improved.
すなわち今までLSIなどの半導体装置は多層配
線が施されているセラミツク基板へチツプ毎に装
着してハーメチツクシールを施すパツケージ構造
がとられており、かかる半導体装置を直接にプリ
ント配線基板のスルーホール孔に装着する実装方
法がとられていた。 In other words, up until now, semiconductor devices such as LSIs have had a package structure in which each chip is attached to a ceramic substrate with multilayer wiring and hermetically sealed. The mounting method used was to attach it to a hole.
然し近年、新しい実装形態として多数のLSIを
一括してセラミツクなどの耐熱材料からなる多層
配線基板に搭載してLSIモジユールを作り、これ
を取替え単位として接続装置を介してプリント配
線基板に装着する実装方法がとられようとしてい
る。 However, in recent years, a new mounting method has been introduced in which a large number of LSIs are mounted all at once on a multilayer wiring board made of heat-resistant materials such as ceramics to create an LSI module, which is then mounted as a replacement unit on a printed wiring board via a connecting device. A method is being taken.
この場合接続装置はブリント配線基板に半田付
けなどの方法で固定されると共に、LSIモジユー
ルは接続ピンを備えて接続装置に挿抜可能な形態
をとる。 In this case, the connecting device is fixed to the printed wiring board by a method such as soldering, and the LSI module is provided with connecting pins so that it can be inserted into and removed from the connecting device.
本発明はLSIモジユールに使用される接続ピン
に関するものである。 The present invention relates to connection pins used in LSI modules.
(c) 従来技術と問題点
第１図はLSIモジユール１と接続装置２とプリ
ント配線基板３との関係を示す断面図であつて、
接続装置２は上面にLSIモジユール１の接続ピン
が挿抜されるガイド孔５が設けられており、この
ガイド孔５の底には接続ピン６が埋め込み成型さ
れている。またガイド孔５の中には低融点金属７
が充填されている。(c) Prior art and problems FIG. 1 is a cross-sectional view showing the relationship between an LSI module 1, a connecting device 2, and a printed wiring board 3.
The connecting device 2 is provided with a guide hole 5 on the upper surface thereof into which a connecting pin of the LSI module 1 is inserted and removed, and a connecting pin 6 is embedded and molded in the bottom of the guide hole 5. In addition, a low melting point metal 7 is provided in the guide hole 5.
is filled.
そしてLSIモジユールの接続ピン４の挿抜は接
続装置２の中に埋め込み形成されているヒータ８
に通電してガイド孔５の中に充填されている低融
点金属７を溶融した状態で行われている。 The insertion and removal of the connection pin 4 of the LSI module is performed using a heater 8 embedded in the connection device 2.
This is carried out in a state in which the low melting point metal 7 filled in the guide hole 5 is melted by applying electricity to the guide hole 5.
第２図は低融点金属が充填されているガイド孔
５に挿入する接続ピン４の拡大図である。 FIG. 2 is an enlarged view of the connecting pin 4 inserted into the guide hole 5 filled with a low melting point metal.
ここで本発明に係る低融点金属７の溶融凝固に
より接続を行うコネクタにあつては接続ピン４の
表面が溶融状態の低融点金属７と良好な濡れ性を
もつていることが必要である。 In the connector according to the present invention which performs connection by melting and solidifying the low melting point metal 7, it is necessary that the surface of the connecting pin 4 has good wettability with the molten low melting point metal 7.
そこで従来は第３図に断面を示すように接続ピ
ン４のベース材を銅合金９で形成すると共に低融
点金属７への挿入部分の表面上に順次ニツケル
（Ni）メツキ層１０、金（Au）メツキ層１１を
施して濡れ性と耐蝕性を改善していた。 Conventionally, the base material of the connecting pin 4 is formed of a copper alloy 9, as shown in the cross section in FIG. ) A plating layer 11 was applied to improve wettability and corrosion resistance.
ここでAuメツキ層１１は濡れ性と耐蝕性とを
改善するためのものであり、Niメツキ層１０は
銅合金とAuとの相互拡散を阻止するバリアとし
て働いている。すなわちこのバリアが存在しない
場合は高温状態で容易に合金が生じてしまう。 Here, the Au plating layer 11 is for improving wettability and corrosion resistance, and the Ni plating layer 10 functions as a barrier to prevent interdiffusion between the copper alloy and Au. That is, if this barrier does not exist, alloying will easily occur at high temperatures.
然しながら、このように厚めにAuメツキ層１
１が設けられている場合は低融点金属７と反応
し、その中に溶け込んで低融点金属の組成を変え
てしまうと云う問題がある。 However, in this way, the thicker Au plating layer 1
1 is provided, there is a problem that it reacts with the low melting point metal 7 and dissolves therein, changing the composition of the low melting point metal.
例えば低融点金属としてインジユーム・錫（In
−48％Sn）合金を用いる場合はAuメツキ層１１
はその中に溶け込むと共に表面に脆い性質をもつ
Au−Sn合金を生じてしまう。 For example, indium/tin (In
-48%Sn) When using an alloy, the Au plating layer 11
melts into it and has a brittle surface.
This results in the formation of an Au-Sn alloy.
それゆえにAu層１１は出来るだけ薄く形成す
ることが必要である。然し薄く形成するとピンホ
ールが生じて下のNi層１０が露出し易く、ピン
或いはLSIモジールの保管時の耐蝕性が問題とな
る。そのため濡れ性が良く且つ融液への溶け込み
が少ない表面処理機構の開発が望まれていた。 Therefore, it is necessary to form the Au layer 11 as thin as possible. However, if it is formed thinly, pinholes are likely to occur and the underlying Ni layer 10 is likely to be exposed, which poses a problem in corrosion resistance during storage of the pin or LSI module. Therefore, it has been desired to develop a surface treatment mechanism that has good wettability and little dissolution into the melt.
(d) 発明の目的
本発明は低融点金属からなる融液の組成変動の
原因となる接続ピンのAuメツキ層の厚さを極力
押さえ、且つ保管時に於いても耐蝕性の優れた接
続ピンの組成を提供すると共に多数回の繰り返し
接続が可能な表面処理方法を提供することを目的
とする。(d) Purpose of the Invention The present invention aims to minimize the thickness of the Au plating layer on the connecting pin, which causes compositional fluctuations in the melt made of a low-melting point metal, and to provide a connecting pin that has excellent corrosion resistance even during storage. It is an object of the present invention to provide a surface treatment method that provides a composition and allows repeated connections many times.
(e) 発明の構成
本発明の目的は低融点金属の溶融と凝固を利用
して低い挿抜力と良好な接触抵抗とを実現するコ
ネクタにおいて、雄コンタクトとして働くLSIモ
ジユールの接続ピンが銅合金をベース材として用
いると共に、この上に順次ニツケルメツキ、パラ
ジウムメツキおよび金のフラツシユメツキを施し
て構成されており、該接続ピンを雌コンタクトと
して働く溶融中の低融点金属中に挿入する際、該
接続ピンの表面に予め挿入時に表面へ付着する量
と等価量の低融点金属を予備被覆して使用するこ
とを特徴とするLSIモデユール用接続ピンにより
達成することができる。(e) Structure of the Invention The object of the present invention is to provide a connector that utilizes melting and solidification of a low melting point metal to achieve low insertion/extraction force and good contact resistance, in which the connecting pins of an LSI module that act as male contacts are made of copper alloy. It is used as a base material and is constructed by sequentially applying nickel plating, palladium plating, and gold flashing on this material, and when inserting the connecting pin into a molten low-melting metal that acts as a female contact, This can be achieved by using a connecting pin for an LSI model, which is characterized in that the surface is pre-coated with a low melting point metal in an amount equivalent to the amount that adheres to the surface during insertion.
(f) 発明の実施例
本発明はAuメツキ層１１とNiメツキ層１０と
の間にパラジユーム（Pd）メツキ層１２を設け
ることにより上記の問題を解決するものである。(f) Embodiments of the Invention The present invention solves the above problem by providing a palladium (Pd) plating layer 12 between the Au plating layer 11 and the Ni plating layer 10.
すなわちベース材であるCu合金９の上に従来
と同様にNiメツキ層１０を設けると共に、その
上にPdメツキ層１２を設け、Au層１１はフラツ
シユメツキ程度の厚さを留める。 That is, a Ni plating layer 10 is provided on the Cu alloy 9 that is the base material as in the conventional case, and a Pd plating layer 12 is provided thereon, and the thickness of the Au layer 11 is kept to the level of flash plating.
本発明はPdの優れた耐蝕性、低融点金属に対
する拡散防止効果および優れた濡れ性を利用する
もので、これによりAu層１１の厚さを最小限度
まで減らすものであつて、これにより接続ピン４
の表面にAu−Sn合金の形成やAuメツキ層１１の
溶解を最小限に抑制することができる。 The present invention utilizes Pd's excellent corrosion resistance, diffusion prevention effect on low melting point metals, and excellent wettability, thereby reducing the thickness of the Au layer 11 to a minimum, thereby making it possible to reduce the thickness of the Au layer 11 to a minimum. 4
Formation of an Au-Sn alloy on the surface and dissolution of the Au plating layer 11 can be suppressed to a minimum.
以後実施例について説明する。 Examples will be described below.
接続ピン４のベース材としては燐青銅９を用
い、この上に順次2μｍの厚さのNiメツキ層１０、
2μｍの厚さのPdメツキ層１２、0.05μｍの厚さの
Auフラツシユメツキ層１１と形成し、一方接続
ピン４が挿入されるガイド孔５の中の低融点金属
７としては、融点が117℃のIn−48％Sn合金を使
用した。 Phosphor bronze 9 is used as the base material of the connecting pin 4, and on top of this, a Ni plating layer 10 with a thickness of 2 μm is sequentially formed.
2 μm thick Pd plating layer 12, 0.05 μm thick
An In-48% Sn alloy having a melting point of 117 DEG C. was used as the low melting point metal 7 formed with the Au flashing layer 11 and in the guide hole 5 into which the connecting pin 4 was inserted.
そして端子電極１３を通じてヒータ８に通電し
て低融点金属７を溶融し、この中に接続ピン４の
挿抜を繰り返した。そして挿抜の都度接続が接触
抵抗が1Ω以下と云う良好な状態で安定して行わ
れているのを確認すると共に、In・Sn合金が接
続ピン６の表面との濡れ性が良いことが確認でき
た。また接続ピン６を相対湿度90％で硫化水素と
亜硫酸ガスを含む腐食雰囲気中に室温で1000時間
に互つて放置しても、ピンの腐食や濡れ性の低下
の現象は認められず、このことから本発明の効果
を確かめることができた。 Then, electricity was applied to the heater 8 through the terminal electrode 13 to melt the low melting point metal 7, and the connecting pin 4 was repeatedly inserted and removed therein. We confirmed that the connection was made stably with a contact resistance of 1Ω or less each time it was inserted and removed, and that the In-Sn alloy had good wettability with the surface of the connecting pin 6. Ta. Furthermore, even if the connecting pin 6 was left in a corrosive atmosphere containing hydrogen sulfide and sulfur dioxide gas at a relative humidity of 90% for 1000 hours at room temperature, no phenomena of pin corrosion or decrease in wettability were observed. From this, the effects of the present invention could be confirmed.
次に第１図に示すように接続ピン４を低融点金
属中に挿入してコネクタ接続を行う構成では、コ
ネクタ動作が常に同一の組合せで行われる場合は
問題がないが、接続ピン４が変わる場合には融液
が接続ピン４に付着して持ち出され、次第に減少
すると云う問題がある。 Next, in the configuration in which the connector connection is made by inserting the connecting pin 4 into a low-melting point metal as shown in Figure 1, there is no problem if the connector operation is always performed in the same combination, but the connecting pin 4 changes. In this case, there is a problem in that the melt adheres to the connecting pin 4 and is taken out, gradually decreasing.
例えばLSIモジユルに搭載されているLSI素子
が故障してモジユールごと交換する場合がこれに
あたる。 For example, this is the case when an LSI element installed in an LSI module breaks down and the entire module needs to be replaced.
この解決法として本発明においては接続ピン４
の融液への挿入部分に予め持ち出し量に等しい低
融点金属７を予備被覆しておけばよい。 As a solution to this problem, in the present invention, connection pin 4
The portion to be inserted into the melt may be pre-coated with a low melting point metal 7 in an amount equal to the amount taken out.
第２図はこの実施例を示すもので、接続ピン４
の挿入領域に低融点金属からなる予備被覆層１４
を設けた状態をしめ４ている。 Figure 2 shows this embodiment, with connection pin 4
A preliminary coating layer 14 made of a low melting point metal is placed in the insertion area of the
4 shows the state in which .
かかる処理を施すことにより、仮令接続ピン４
が更新される場合であつても、ガイド孔５の中の
低融点金属の量を常に一定に保つことができる。 By performing such processing, the temporary connection pin 4
Even when the guide hole 5 is updated, the amount of low melting point metal in the guide hole 5 can always be kept constant.
第５図は予備被覆層の有無の場合の影響を示す
もので、In−48％Snからなる低融点金属７に接
続ピン４の挿抜を繰り返し行い、その際のピンの
重量変化量を調べたものである。 Figure 5 shows the effect of the presence or absence of a preliminary coating layer, in which the connection pin 4 was repeatedly inserted into and removed from the low melting point metal 7 made of In-48% Sn, and the weight change of the pin at that time was investigated. It is something.
ここで融液の温度は130℃に保持し20回に互つ
て挿抜が行われている。 Here, the temperature of the melt was maintained at 130°C, and insertion and removal were performed 20 times.
なお接続ピン４の浸漬時間は２分であり、また
浸漬長は２mmである。 The immersion time of the connecting pin 4 was 2 minutes, and the immersion length was 2 mm.
図において破線１５は予備被覆層１４がない場
合で第１回の挿抜により90×10-6ｇの低融点金属
が接続ピン４に付着し、２回以後は略一定の重量
変化を示している。一方実線１６は予め約100×
10-6ｇの予備被覆層１４を設けた場合で当初より
略一定の変化量を示している。 In the figure, a broken line 15 indicates a case where there is no preliminary coating layer 14, and 90×10 -6 g of low melting point metal adheres to the connecting pin 4 during the first insertion/extraction, and shows a substantially constant weight change after the second insertion/extraction. . On the other hand, the solid line 16 is about 100×
When 10 -6 g of the preliminary coating layer 14 is provided, the amount of change is approximately constant from the beginning.
このことから本発明を実施することにより、接
続ピン４に付着して汲み出されることによる低融
点金属の減少がなくなり、接続装置２の寿命を大
幅に延長することができる。 Accordingly, by carrying out the present invention, there is no reduction in the low melting point metal due to it adhering to the connecting pin 4 and being pumped out, and the life of the connecting device 2 can be significantly extended.
(g) 発明の効果
本発明は接続ピンの表面に被覆されているAu
層の融液への溶解による低融点金属の劣化防止と
濡れ性の確保および低融点金属の汲み出しによる
減少を防ぐことを目的としてなされたもので、本
発明の実施により、これらの問題が解決でき、接
続装置の信頼性を向上することができた。(g) Effects of the invention The present invention is characterized by the fact that the surface of the connection pin is coated with Au.
This was done to prevent the deterioration of the low melting point metal due to dissolution of the layer into the melt, ensure wettability, and prevent reduction due to pumping out of the low melting point metal.By implementing the present invention, these problems can be solved. , the reliability of the connected device could be improved.
第１図は接続装置の構成を説明する断面図、第
２図は接続ピンの断面図、第３図と第４図は接続
ピンに設けられたメツキ層の構成図、第５図は予
備被覆層の効果を示す説明図である。
図において、２は接続装置、４，６は接続ピ
ン、５はガイド孔、７は低融点金属、９は銅合
金、１０はニツケルメツキ層、１１は金メツキ
層、１２はパラジユムメツキ層、１４は予備被覆
層である。
Figure 1 is a cross-sectional view explaining the configuration of the connecting device, Figure 2 is a cross-sectional view of the connecting pin, Figures 3 and 4 are configuration diagrams of the plating layer provided on the connecting pin, and Figure 5 is a preliminary coating. It is an explanatory view showing the effect of a layer. In the figure, 2 is a connecting device, 4 and 6 are connection pins, 5 is a guide hole, 7 is a low melting point metal, 9 is a copper alloy, 10 is a nickel plating layer, 11 is a gold plating layer, 12 is a palladium plating layer, and 14 is a spare. It is a covering layer.
Claims (1)
力と良好な接触抵抗とを実現するコネクタにおい
て、雄コンタクトとして働くLSIモジユールの接
続ピンが銅合金をベース材として用いると共に、
この上に順次ニツケルメツキ、パラジウムメツキ
および金のフラツシユメツキを施して構成されて
おり、該接続ピンを雌コンタクトとして働く溶融
中の低融点金属中に挿入する際、該接続ピンの表
面に予め挿入時に表面へ付着する量と等価量の低
融点金属を予備被覆して使用することを特徴とす
るLSIモジユール用接続ピン。1. In a connector that uses melting and solidification of a low-melting point metal to achieve low insertion/extraction force and good contact resistance, the connecting pins of the LSI module that act as male contacts use copper alloy as the base material, and
On top of this, nickel plating, palladium plating, and gold flashing are sequentially applied. A connecting pin for an LSI module, characterized in that it is pre-coated with a low melting point metal in an amount equivalent to the amount attached to the LSI module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2116784A JPS60165749A (en) | 1984-02-08 | 1984-02-08 | Connecting pin for lsi module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2116784A JPS60165749A (en) | 1984-02-08 | 1984-02-08 | Connecting pin for lsi module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60165749A JPS60165749A (en) | 1985-08-28 |
| JPH0442826B2 true JPH0442826B2 (en) | 1992-07-14 |
Family
ID=12047352
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2116784A Granted JPS60165749A (en) | 1984-02-08 | 1984-02-08 | Connecting pin for lsi module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60165749A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR930000330B1 (en) * | 1988-05-16 | 1993-01-15 | 스미도모덴기고오교오 가부시기가이샤 | Optical semiconductor device |
| JP2543619B2 (en) * | 1990-09-05 | 1996-10-16 | 新光電気工業株式会社 | Lead frame for semiconductor device |
| JP4853127B2 (en) * | 2006-06-20 | 2012-01-11 | マックス株式会社 | Heat exchange ventilator |
| JP5210907B2 (en) * | 2009-02-03 | 2013-06-12 | アルプス電気株式会社 | Manufacturing method of electrical contacts |
-
1984
- 1984-02-08 JP JP2116784A patent/JPS60165749A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60165749A (en) | 1985-08-28 |
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