JPH0442786Y2 - - Google Patents

Description

[Detailed description of the invention] (Field of industrial application) The invention attempts to more accurately determine the reception time position of an ultrasonic echo from a received signal obtained by an ultrasonic transducer, for example. The present invention relates to a signal processing device.

(Prior art) An ultrasonic transducer lowered into the water emits ultrasonic waves toward a target, receives echoes from the target (for example, a fish) as a detection liquid, and
Devices for determining the distance to a target by measuring the time from when an ultrasonic wave is emitted to when an echo is received are well known. In order to accurately measure such a distance, it is necessary to accurately determine the reception time position of the echo reflected from the target.

FIG. 5 shows a conventional received signal processing device for determining the receiving time position of the echo (detection wave). In the figure, reference voltage generation circuit 1
generates a reference voltage E ₀ at a constant voltage level, and applies this reference voltage E ₀ to the comparator 2.

On the other hand, an echo received by an ultrasonic transducer (not shown) is converted from a sonic signal to a received signal S as an electric signal, and the received signal S is amplified and then applied to a comparator 2. .

As shown in FIG. 6a, the comparator 2 compares the reference voltage _E0 and the received signal S, turns on the section where the voltage level of the received signal S is equal to or higher than the reference voltage _E0 , and turns on the section where the voltage level of the received signal S is equal to or higher than the reference voltage E0. A comparator signal C is output that turns off the section smaller than the reference voltage _E0 . Therefore, the time from the emission of the ultrasonic drive pulse P to the first rising position of the comparator signal C, that is, the echo reception time position Q, is the time required for the ultrasonic wave traveling back and forth between the ultrasonic transducer and the target. It means the propagation time T of a sound wave, and this propagation time T
By multiplying by the ultrasonic propagation speed and dividing by 1/2,
The distance from the ultrasonic transducer to the target is determined.

(Problems to be solved by the invention) As is well known, the echoes (detected waves) reflected from underwater targets are susceptible to scattering by floating objects in the sea and various other influences. As shown in FIGS. a and b, the received signal S has a signal waveform with various level fluctuations. Therefore, even if the received signals S are obtained from the target at the same position, the reception time positions (receiving positions) Q where the reference voltage E ₀ and the received signal S intersect vary for each received signal S.
There was a problem that the distance measurement could not be performed accurately. The present invention was made to solve the above-mentioned conventional problems, and its purpose is to create a received signal that enables accurate distance measurement by determining the receiving time position of the detected wave with as little variation as possible. The purpose of this invention is to provide a processing device.

(Means for solving the problems) In order to achieve the above object, the present invention is configured as follows. That is, the present invention includes a rectifier circuit that rectifies a received signal obtained by signal processing of a detected wave; and a rectifier circuit that divides the rectified signal into a plurality of time intervals;
an A/D converter that converts the signal level of each time interval into a digital value; a composite signal corresponding to the sum of the digital value of each time interval and the digital total value of the same time interval based on a plurality of past received signals; an addition processing circuit that outputs; a peak value detection circuit that detects a peak value by comparing digital values of each time interval from the composite signal; and a peak value detection circuit that detects a peak value from the peak value detected by the peak value detection circuit; A comparator level setting circuit that sets a comparator level value at a constant rate; Compares the comparator level value with the digital value of each time interval in the composite signal, and starts from the time interval in which the digital value is equal to or greater than the comparator level value. The received signal processing device includes: a comparator that determines a reception time position of the detected wave;

(Operation) In the present invention configured as above,
The reception time position of the detected wave is determined based on the received signal as follows.

First, a received signal obtained by signal processing of a detected wave is rectified into a DC signal by a rectifier circuit.

Then, this rectified signal is divided into a plurality of time intervals by an A/D converter, and the analog signal level of each time interval is converted into a digital value.

On the other hand, the addition processing circuit stores the digital total value for each time interval of a plurality of past received signals, and the addition processing circuit stores the digital total value and the digital total value obtained by the A/D converter. Addition with the numerical value is performed. Then, a value corresponding to this added value, for example, a composite signal consisting of the added value itself or an average value obtained by dividing the added value by the number of additions, is applied from the addition processing circuit to the peak value detection circuit. The peak value detection circuit compares the digital values of each time segment of the composite signal and detects the largest peak value among them. The comparator level setting circuit receives the peak value from the peak value detection circuit, and calculates the comparator level value by dividing the peak value by a certain ratio, for example, 1/n (n is a positive number greater than 1). and send this compare level value to the comparator.

The comparator compares the digital value of each time segment of the composite signal with a comparator level value,
Among the time segments in which the digital value of the composite signal is greater than or equal to the comparator level value, for example, the time segment at the shortest time position (the time segment of the composite signal that first intersects the comparator level value) is detected as the reception time of the wave. Determine the location. In this case, the composite signal is formed based on the addition process of multiple received signals (more specifically, integer signals), so the signal waveform is stable, and therefore the intersection position of the composite signal and the comparator level value is This reduces the variation and makes it possible to accurately determine the reception time position of the detected wave.

(Example) Hereinafter, an example of the present invention will be described based on the drawings. FIG. 1 shows a block diagram showing the structure of an embodiment of the present invention. In the figure, the device of this embodiment includes an ultrasonic transducer circuit 3 that receives an echo as a detected wave and outputs a received signal, a rectifier circuit 4, an A/D converter 5, and an addition processing circuit. 6
, a peak value detection circuit 7 , a comparator level setting circuit 8 , and a comparator 9 . The ultrasonic wave transmitting/receiving circuit 3 includes a keying circuit 10 that controls the timing of signal transmission and reception, and a transmission drive circuit 11 that receives a control signal from the keying circuit 10 and outputs an ultrasonic drive pulse.
and a transmitting amplifier 12 that amplifies the ultrasonic drive pulse, and receives the amplified ultrasonic drive pulse P (FIG. 2a) from the transmitting amplifier 12 and transmits the ultrasonic wave into the water toward a target (for example, a fish). emit, receive the echo as a detection wave from the target,
It consists of a transducer 13 that converts a sound wave signal into a received signal as an electric signal, and a receiving amplifier 14 that amplifies the received signal and adds the amplified received signal S (FIG. 2b) to the rectifier circuit 4. .

The rectifier circuit 4 rectifies the received signal S applied from the receiving amplifier 14 and applies this rectified signal (FIG. 2c) to the A/D converter 5.

As shown in FIG. 2d, the A/D converter 5 divides the rectified signal S' into minute time widths and converts the signal level in each time period of the rectified signal S' into digital numerical values. In the example, the signal level of the rectified signal is converted into an 8-bit numerical value.

These digital numerical values in each time interval are added to the addition processing circuit 6. The addition processing circuit 6
consists of a first memory circuit 17, an adder circuit 18, a second memory circuit 19, and an averaging circuit 20. The first memory circuit 17 is an A/D converter 5
The numerical value of each time interval digitized by is stored, and the stored numerical value is read out and sent to the adding circuit 18. On the other hand, the second memory circuit 19
stores the numerical values of each time interval digitized based on the received signal one cycle before, and the adder circuit 18 stores the digital numerical values read from the first memory circuit 17 and the second memory circuit 19. Both digital values are added for each time interval, and the total value is stored in the second memory circuit 19.

Then, when the digital numerical value based on the received signal of the next cycle is stored in the first memory circuit 17, the read value from the first memory circuit 17 and the total value read from the second memory circuit 19 are combined. and use the added value as the new total value for the second
is updated and stored in the memory circuit 19 of.

In this way, the adding circuit 18 adds the digital numerical values based on the received signals N times for each time interval, and stores the total value in the second memory 19. The second memory 19 adds the added value (total value) of the digital numerical values N times to the averaging circuit 20 . The averaging circuit 20 divides the added value added from the second memory 19 by the number of additions N, and calculates the average value for each time interval.

Each signal processing timing of the A/D converter 5 and the addition processing circuit 6 is performed in synchronization with the control signal of the keying circuit 10. Incidentally, the digital numerical values for each time interval averaged by the averaging circuit 20 are branched and supplied to the peak value detection circuit 7 and the comparator 9 as a composite signal.

The peak value detection circuit 7 compares the digital numerical values in each time period of the composite signal added from the averaging circuit 20, determines the value with the largest numerical value as the peak value, and sets the peak value to the comparator level. Add to setting circuit 8. The comparator level setting circuit 8 sets a comparator level value that is a certain proportion of the peak value (peak level), for example, 1/n (n is a positive number greater than 1), and Add to comparator (digital comparator) 9.

As shown in FIG. 3, the comparator 9 receives the composite signal R (third
In the figure, the composite signal R is shown in the form of a rectified waveform)
and the comparator level value, and find the point where the comparator level value cuts the composite signal R, that is, the shortest time position among the digital values of each time interval of the composite signal R that are greater than or equal to the comparator level value. The time interval is determined as the reception time position Q of the detected wave.

As described above, according to this embodiment, for example, as shown in FIG. 4, the rectified signals from the rectified signal of the received signal in the first period (FIG. 4 a) to the Nth period are added. Then, the rectified signal (Fig. 4 d) corresponding to this sum total value is 1/N to obtain the rectified waveform corresponding to the composite signal R (hereinafter referred to as composite rectified waveform S'') as shown in Fig. 4 e. ing.

Generally, the signal level of the rectified waveform of the echo reflected from the underwater target is random, as shown in Figures 4a to 4c.
N and averaged waveform, that is, composite rectified waveform
S'' is extremely close to the rectified waveform of the actual waveform with stable signal level. Therefore, the composite rectified waveform
By determining the reception time position Q of the detected wave based on the composite signal obtained by digitizing S'', the reception time position of the detected wave can be determined accurately without variation. Rectified signal S ₁
Even if noise components N ₁ , N ₂ and N ₃ are included in (i=1 to N), the levels of these noise components N ₁ , N ₂ and N ₃ are different from each rectified signal.
The values are sufficiently smaller than the addition levels of S ₁ , S ₂ , . . . S _{N -1} and S _N .

Therefore, the 1/N noise component N ₁ ,
N ₂ and N ₃ are also inevitably much smaller than the signal level of the composite rectified waveform S'', and the configuration of this embodiment can substantially eliminate the noise components N ₁ , N ₂ and N ₃ . There are benefits to be gained.

In the above embodiment, the averaging circuit 20 averages the N times of digital numerical values and outputs this average value as a composite signal, but this averaging circuit 20 is omitted and the N times of digital numerical values The second memory circuit 19 uses the summation value as it is as a composite signal R.
Even if the signal is branched and supplied to the peak value detection circuit 7 and the comparator 9, it is possible to accurately determine the reception time position of the detected wave as in the above embodiment.

(Effects of the invention) Since the present invention has the configuration and operation described above, it is possible to obtain the reception time position of the detected wave without any variation, for example, by using an ultrasonic transducer. It becomes possible to accurately measure the distance to a target, etc.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment according to the present invention, FIGS. 2a to 2d are explanatory diagrams showing examples of signal processing in this embodiment, and FIG. 3 is an operation of a comparator in this embodiment. FIGS. 4a to 4e are explanatory diagrams showing signal processing examples of the addition processing circuit. FIG. 5 is a block diagram showing the configuration of a conventional example. FIGS. 6a and 6b are conventional examples. FIGS. 7a and 7b are waveform diagrams of received signals. 1... Reference voltage generation circuit, 2... Comparator, 3... Ultrasonic transducer, 4... Rectifier circuit, 5
...A/D converter, 6... Addition processing circuit, 7...
Peak value detection circuit, 8...Comparator level setting circuit, 9...Comparator, 10...Keying circuit, 11...Transmission drive circuit, 12...Transmission amplifier, 13...Transducer, 14...Reception amplifier , 17...first memory circuit, 18...addition circuit, 19...second memory circuit, 20...averaging circuit, _E0 ...reference voltage, S...received signal, C...
…Comparator signal, P…Ultrasonic drive pulse,
Q...Reception time position, R...Synthesized signal, S'...Rectified signal, S''...Synthesized rectified waveform.

Claims (1)

[Claims for Utility Model Registration] (1) A rectifier circuit that rectifies a received signal obtained by signal processing of a detected wave; divides the rectified signal into multiple time intervals, and calculates the signal level of each time interval as a digital value. an A/D converter that outputs a composite signal corresponding to the sum of the digital value of each time interval and the digital total value of the same time interval based on a plurality of past received signals; a peak value detection circuit that detects a peak value by comparing digital values of each time interval from the composite signal; a comparator level value that is a certain percentage of the peak value from the peak value detected by the peak value detection circuit A comparator level setting circuit to be set; compares the comparator level value with the digital value of each time interval in the composite signal, and determines the reception time position of the detected wave from the time interval in which the digital value is greater than or equal to the comparator level value. A received signal processing device comprising: a comparator for determining; (2) The addition processing circuit includes a first memory circuit that stores the digital values of each time period digitized by the A/D converter; an adding circuit that adds the digital numerical value and the total value of the digital numerical value for each time interval based on the plurality of past received signals; and storing the total value of the digital numerical value for each time interval based on the plurality of past received signals; When the addition circuit adds the stored total value to the addition circuit, the addition value calculated by the addition circuit is updated and stored as a new total value of past data, and the addition A received signal processing device according to claim (1), characterized in that it comprises: a second memory circuit for adding a value to a peak value detection circuit; (3) The addition processing circuit includes a first memory circuit that stores the digital values of each time period digitized by the A/D converter; an adding circuit that adds the digital numerical value and the total value of the digital numerical value for each time interval based on the plurality of past received signals; and storing the total value of the digital numerical value for each time interval based on the plurality of past received signals; When the adding circuit adds the stored total value to the adding circuit, the added value calculated by the adding circuit is updated and stored as a new total value of past data, and the added value is a second memory circuit that outputs; an averaging circuit that divides the added value output from the second memory circuit by the number of additions to obtain an average value, and adds the average digital value to the peak value detection circuit; A received signal processing device according to claim (1) of the utility model registration claim, characterized in that: