JPH0441439Y2 - - Google Patents

Description

[Detailed description of the invention] [Industrial application field] The present invention detects a physical quantity to be measured by electrical means, for example in a control system of a chemical plant, and sends the measurement signal to a signal processing unit in a remote location. It relates to a field device used for sending out data.

[Conventional technology]

Generally, conversion elements (sensors) used in various types of transmitters, analyzers, etc. drift with the passage of time and changes in the environment, so it is necessary to perform zero point compensation at regular intervals. In this case, a method of compensating by creating a feedback loop using an analog integrator or the like and accumulating charge in a capacitor can be considered, but it is not suitable for long-term compensation due to leakage current and the like. That is, for example, in an analyzer such as a gas chromatograph, one analysis period ranges from several minutes to several tens of minutes.

Therefore, the conventional method has been to manually adjust the output using a variable resistor or the like while observing the output.

[Problem that the invention attempts to solve]

This method has the advantage of being able to quickly and reliably perform the desired compensation by freely changing the amount of adjustment, but in general, in systems that measure field data, the detection end is located at each remote site from the central panel room. Since the adjustment equipment is located in

[Means for solving problems]

In order to solve such problems, the present invention, as shown in FIG. are compared by a comparator 2, the up-down counter 3 is increased or decreased based on its output, and the counted value of this counter is converted by a digital-to-analog conversion circuit 4 and sent to the detection circuit 1 as a signal for zero adjustment of the conversion element. and a variation adjustment circuit 5 for adjusting the variation period or unit variation width of the zero adjustment signal according to the amount of deviation between the output value and the zero value.

[Effect]

When zero adjustment is required, a clock signal is sent to the counter.
When CLOCK is applied, the count value increases or decreases depending on the polarity of the output for each input, and as a result, the output value changes toward zero, and ultimately the accuracy is less than the equivalent of 1 bit of the output of the digital-to-analog converter circuit. However, the period of the clock signal or the conversion rate of the digital-to-analog conversion circuit is adjusted according to the amount of deviation. When the amount of deviation is large, the amount of change per unit time is large, and when the amount of deviation is small, the change per unit time is large. By making it smaller, it is possible to quickly and reliably converge to the above accuracy.

〔Example〕

FIG. 2 shows an example of the configuration of the detection circuit 1. Although omitted from the diagram, in this embodiment, the detection circuit has both conversion elements on the comparison side (reference side) and measurement side (sample side), and the detection circuit has both conversion elements on the comparison side (reference side) and measurement side (sample side). It is configured to obtain a voltage difference between the first and second detection input voltages, and the circuit shown in FIG. 2 amplifies this voltage difference and converts it into a current signal I for transmission.

In FIG. 2, 11 to 14 are operational amplifiers, 1
5 to 22 are resistors each having the resistance value shown in the figure, 23 and 24 are light emitting diodes that indicate the adjustment direction during manual zero adjustment, and 25 and 26 are operational amplifiers 13.
Transistors 27 and 28 for amplifying the output of are resistors inserted between each light emitting diode and the +V power source and the -V power source. First and second operational amplifier 1
When first and second input voltages e 1 , _{e 2 are} applied between the non-inverting input terminals 1 and 12 and the common terminal as detection outputs from conversion elements on the reference side and the sample side, for example, the outputs E ₁ , As is well known, equation (1) holds between E ₂ .

E ₂ −E ₁ = (1−2R ₁ /R ₂ ) (e ₂ −e ₁ ) …(1) Now, let the input terminal voltage of the third operational amplifier 13 be es
Assuming that the resistance value of the load 10 is R _L , on the [-] side E ₂ -es/R ₃ =es-(R _L +r) I/R ₄ ...( 2) [+] side E ₁ −es/R ₃ = es−R _L I/R ₄ …(3) holds, and from this, E ₂ −E ₁ /R ₃ = −rI/R _4. Therefore, the following equation holds true.

I = 1/r・R ₄ /R ₃ (E ₁ −E ₂ ) = 1/r・R ₄ /R ₃ (1+2R ₁ /R ₂ ) (e ₁ −e ₂
) …(4) From equation (4), the output current I is the difference in input voltage (e ₁ −
_e2 ), and is not affected by the common mode voltage at all. That is, the circuit shown in FIG. 2 constitutes a differential current output type amplifier. Conventionally, in field devices, the detection output is amplified to some extent in anticipation of the line resistance up to the signal processing section before being sent out, but in this case, the current signal is generally more resistant to noise than the voltage signal, so a voltage/current converter is used. However, with the circuit shown in FIG. 2, both functions can be realized with a simple configuration.

If zero adjustment becomes necessary, this detection circuit allows manual adjustment to be performed very easily by simply rotating the bridge balance volume knob so that both light emitting diodes 23 and 24 are turned off. However, automatic zero adjustment can be performed using the signal at the terminal 29 which is the output of the fourth operational amplifier 14. In other words, this terminal 2
The signal voltage V _A of 9 is at the same level as the non-inverting input of the operational amplifier 14, and is expressed by the following equation.

V _A = IR _L ...(5) Therefore, if we make V _A = 0,
I=0, that is, zero adjustment can be performed.

In the present invention, this is done using the configuration shown in FIG. That is, the above output is used as one input of a comparator 2 consisting of a fifth operational amplifier, the other input is connected to a common terminal (zero potential), and the up/down counter 3 is controlled up/down by its output. In other words,
Depending on the polarity of the output current I, for example, if it is positive, the counter 3 increments its count value by "1" each time a clock pulse arrives, and if it is negative, it decrements the count value by "1". On the other hand, the digital-to-analog conversion circuit 4 converts this count value into an analog signal at a predetermined conversion rate, and sends it to the detection circuit 1 as a zero adjustment signal. Therefore, when performing zero adjustment, if you send out the clock panel from the panel room while this field device is not in measurement operation, the output current I will change toward the zero value and the final value will be There is a digital
The accuracy is within the equivalent of 1 bit of the output D/A _put of the analog conversion circuit 4.

FIG. 4 shows a specific example of the configuration when this embodiment is applied to a gas crotograph. 101S in the diagram
is the sample side conversion element, 101R is the reference side conversion element, and 102 is the bridge balance volume.
V _S −V _r corresponds to e ₂ −e ₁ in FIG. During zero adjustment, a rectangular alternating waveform as shown in the figure is sent from the panel chamber side, and "0" is output via the photocoupler 103.
A clock pulse of "1" is supplied to the counter 3.
On the other hand, the D/A of the digital-to-analog conversion circuit 4
The A _OUT output changes the value of the current flowing through the reference side conversion element 101R, corrects errors due to changes in the conversion element over time, and performs zero adjustment.

Incidentally, a conversion element generally has a unique time constant, and cannot follow input changes faster than the time constant. Therefore, in the above configuration, if the cycle of the clock input, that is, the change cycle of the zero adjustment signal is significantly smaller than the time constant of the conversion element, overcompensation may be repeated and the situation may not converge forever. If the change is applied at a speed sufficiently slower than the above-mentioned time constant, compensation can be achieved reliably, but then it takes a long time to complete the adjustment.

Therefore, in this embodiment, as shown in FIG.
The digital-to-analog conversion circuit 4 is constituted by a parallel circuit of a converter 41 and a converter 42, each of which converts the count value of the counter 3 into an analog signal, and also corresponds to the output of the detection circuit 1 as a change amount adjustment circuit 5. A parallel circuit is provided with a comparator 51 that compares the V _A signal with a first reference voltage _-ES and a comparator 52 that compares the V A signal with a second reference voltage + _ES .

In the above configuration, while the deviation width from the zero value on the output side of the detection circuit 1, that is, the V _A signal is large, the signal obtained by adding the outputs of the converter 41 and the converter 42 by the adder 43 is used as the zero adjustment signal. The output is sent to the detection circuit 1, and its output rapidly approaches the zero value, but when the above deviation width becomes within a certain width ± _ES ,
A signal for inhibiting the output of the converter 41 is sent from the change amount adjustment circuit 5. As a result, converters 41 and 4
If the conversion rates of 2 are the same, the unit change width of the zero adjustment signal is reduced to 1/2, the change becomes gentle, and overcompensation is prevented. Note that while there is a clock input, D/A _OUT changes even after the output current becomes zero, but the direction is determined by the output of comparator 2, that is, the polarity of output current I. Even if the clock input continues, D/
A _OUT only changes 1 bit (LSB), and I
will not deviate significantly from zero.

Therefore, at the time of zero adjustment, if a clock pulse corresponding to the number of bits of the digital-to-analog conversion circuit 4 is applied, the output current I can be zero-adjusted without fail. A preset input terminal is provided, and when the power is turned on,
The adjustment time is shortened by setting a preset value corresponding to half of the output of the digital-to-analog conversion circuit 4. The preset value is set by a preset setting circuit 6, and the counter 3 is loaded by a control signal from the panel chamber side.

While no clock signal is input, the counter 3 holds the final count value, and the digital-to-analog conversion circuit 4 also keeps its output constant.

Note that the clock signal may be generated from a clock oscillation circuit built into the field device instead of being applied directly from the panel room, but when a weak measurement signal is amplified, changes such as the clock signal during measurement may occur. It is preferable that there is no nearby signal source that repeats this, so even if the latter method is used, the clock oscillation circuit should be operated only during zero adjustment according to a command from the panel room.

The above embodiment is an example in which the unit change width of the zero adjustment signal is adjusted according to the deviation width between the output value of the detection circuit 1 and the zero value. The period may be adjusted. 6th
An example is shown in the figure.

In FIG. 6, the variation adjustment circuit 5 includes a voltage-frequency conversion circuit 53 that converts a voltage input into a pulse signal with a frequency corresponding to the magnitude of the voltage input and outputs _{the pulse} signal. Give it as a clock input. Therefore, when the deviation of the output value of the detection circuit 1 from the zero value is large, the period of the clock signal is small, the count value of the counter 3 changes at a fast speed, and the output of the detection circuit 1 quickly reaches the zero value. However, as the deviation width becomes smaller, the period of the clock signal becomes larger and the rate of change of the count value of the counter 3 becomes smaller, so that over-compensation is prevented. Note that 7 is an automatic zero adjustment switch, and only when this switch 7 is closed by a control signal from the panel room, a clock signal is sent to the counter 3 and zero adjustment is performed.

Of course, instead of using such a dedicated circuit, a well-known CPU, which has been widely used in the field of measurement control in recent years, may be used to perform software processing. An example is shown in FIG.

In FIG. 7, the V _A signal is converted into digital data by an analog-to-digital converter 54, which is monitored by a control circuit 55 such as a microcomputer equipped with a CPU, and if the value falls below a predetermined value, the control signal is For example, by sending out digital
The conversion rate of the analog conversion circuit 4 is changed to a smaller value.

Hereinafter, a case has been described in which the change period or unit change width of the zero adjustment signal is set in two stages and switched, but it goes without saying that a method of adjusting the amount of change more finely may also be used.

[Effect of idea]

As explained above, according to the present invention, the output value is compared with the zero value, the count value of the up-down counter is increased or decreased using the output, and this count value is converted into an analog signal and used as a zero adjustment signal to be transmitted to the detection circuit. This makes it possible to perform zero adjustment from a remote signal processing unit, as well as monitor the deviation width of the output value from the zero value and adjust the change period or unit change width of the zero adjustment signal accordingly. By adjusting , it is possible to quickly and reliably zero-adjust while preventing overcompensation.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the basic configuration of the present invention.
Fig. 2 is a circuit diagram showing an example of the configuration of a detection circuit, Fig. 3 is a diagram for explaining a method of automatic zero adjustment,
Figure 4 is a circuit diagram showing a specific example of the configuration when applied to a gas chromatograph, Figure 5 is a circuit diagram showing an example of the configuration of the variation adjustment circuit, and Figures 6 and 7 are the respective circuit diagrams of the variation adjustment circuit. FIG. 7 is a circuit diagram showing another configuration example. 1...Detection circuit, 2...Comparator, 3...Up-down counter, 4...Digital-analog conversion circuit, 5...Change amount adjustment circuit, 41, 42...Digital-analog converter, 43... adder, 5
1, 52... Comparator, 53... Voltage-frequency conversion circuit, 54... Analog-digital converter, 5
5...Control circuit equipped with CPU, 101S...Sample side conversion element, 101R...Reference side conversion element.

Claims (1)

[Scope of utility model registration request] A detection circuit that has a conversion element that converts a predetermined physical quantity into an electrical quantity and sends out an electrical signal corresponding to the measured physical quantity, a comparator that compares the output value of this detection circuit with a zero value, and a clock signal. an up-down counter that increases or decreases the count value according to the output of the comparator for each input; and a detection circuit that converts the count value of this counter into an analog signal at a predetermined conversion rate and uses it as a signal for zero adjustment of the conversion element. and a change amount adjustment circuit that adjusts the change period or unit change width of the zero adjustment signal according to the deviation width between the output value of the detection circuit and the zero value. Characteristic field device.