JPH0438483A - Method for inspecting printed circuit board - Google Patents

Abstract

PURPOSE:To omit meaningless inspection over each board by inspecting the respective printed circuit boards in a mother board to be inspected according to the combination of the measuring step order and pin number stored in a main body memory. CONSTITUTION:A plurality of board fixtures 1, 2, 3 are provided and, for example, three printed circuit boards S4 - S6 different in circuit constitution are set to the respective fixtures 1, 2, 3 and, when an one pin-to-other all remaining pins test is carried out, the probe pins of the circuit boards S4 - S6 are brought to a contact state and the one pin-to-other all remaining pins test is carried out with respect to said boards. At the time of the inspection of the boards, inspection data are successively read from the respective memory regions of a main body memory to carry out the one pin-to-other all remaining pins test with respect to the circuit boards S4 - S6. In this case, by adding offset values, the probe pin belonging to each fixture is discriminated from the probe pins belonging to the other fixtures and, therefore, the one pin-to-other all remaining pins test is not carried out over the circuit boards S4 - S6.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for inspecting a circuit board.2 More specifically, the present invention relates to a method for inspecting a circuit board suitable for inspecting a plurality of circuit boards such as a multi-panel board. It is something.

[Conventional technology]

Japanese Unexamined Patent Publication No. 1-156681 discloses a non-programmable circuit board inspection method proposed by the present applicant, which almost eliminates the need for a preliminary program. FIG. 7 shows an example in which a circuit formed by bridge-connecting four resistors R1 to R4 is to be tested. According to this, four probe pins 1 to 4 are prepared corresponding to each measurement point A to D. Each probe pin 1 to 4 has two changeover switches la, lb; 2a, 2b; 3a.
, 3b; 4a, 4b are connected in parallel. Each probe pin 1-4 has one switch la.

It is connected to, for example, an AC power supply 5, which is a measurement signal source, via 2a, 3a, and 4a. In addition, each probe pin 1 to 4 is
It is connected to the signal detection section 6 via the other switches lb, 2b, 3b, and 4b. In this case, the signal detection section 6 is composed of a current-voltage converter, and an A/D converter 8 is connected to the output side of the same through an amplifier 7. The detected signal is converted into a digital signal by this A/D converter 8,
Processed by the CPU 9. Each of the above switches is also connected to this CPU.
9.

Inspection of the circuit board is performed as follows.

First, each of the probe pins 1 to 4 is brought into contact with the measured points A to D. Then, switches 18 to 4 on the AC power supply 5 side
For example, switch 1a is set to "open" and other switches 2a to 4a are set to "closed", and among switches 1b to 4b on the signal detector 6 side, switch 1b is set to "closed", and the other switches are set to "closed". 6 or less with 2b to 4b as “open”,
This is called a 1 pin vs. all remaining pins test.

As a result, measurement points B and D are at the same potential, and only measurement point A is at a lower potential than them, so in this example, current flows from measurement points B and D to measurement point A. .

This current is converted into a voltage by a signal detector 6, and then input to a CPU 9 via an amplifier 7 and an A/D converter 8. The CPU 9 compares this detection signal with preset reference data to determine quality, and performs this for each measurement point.

[Problem to be solved by the invention]

According to the above testing method, it is only necessary to change the switch of each probe pin, so there is no need to change the testing program etc. each time a different circuit board is tested.

However, for example, when inspecting a so-called multi-panel board in which a plurality of identical circuit boards are formed on one mother board, the following problem occurs. This will be explained using the multi-sided board shown in FIG. 8 as an example. Incidentally, on this board, two identical series circuits S1. S are formed in a state where they are electrically insulated from each other, and each of the eight series circuits S is provided with four probe pins as shown in the figure.

If we assign pin numbers 1 to 8 from the left to the eight probe pins as shown in the figure and perform a test on the above 1 pin versus all remaining pins, the measurement steps and pin combinations are as follows. It will look like a table.

(Table) Originally, probe pins 1 to 4 are assigned to one series circuit S1, and probe pins 5 to 4 are assigned to the other series circuit S2.
8 is assigned, and even though there is no electrical relationship between the two groups, tests will be conducted between them, resulting in even meaningless data being measured.

This also applies to the case where you have multiple board fixtures, each fixture has a circuit board with a different circuit configuration, and all of the circuit boards are tested for the above 1 pin vs. all other pins at the same time. .

[Means to solve the problem]

This invention was made in view of the above-mentioned conventional circumstances, and its structural feature is that it is a circuit board inspection method that targets a multi-sided board formed by forming a plurality of identical circuit boards on a single mother board. There is a plurality of probe pins that contact each measured point of a plurality of circuit boards, a measurement signal source that supplies measurement signals to each circuit board via the probe pins, and a response that is received from each circuit board side. It also includes a signal detection section that detects a signal via the probe pin, and a switching means that connects the probe pin to either the measurement signal source or the signal detection section, and connects a predetermined one of the probe pins to the signal detection section. By connecting all the remaining pins to the measurement signal source side and performing this 1 pin vs. all other pin test on each probe pin, the impedance of each measured point is measured, and the impedance In the case where the quality of each circuit board is judged based on the value of
Perform a 1-pin vs. all remaining pin test on any one circuit board in the motherboard that is considered to be good, and check the measurement step order and each measurement step for each point to be measured on the circuit board. Inspection data including pin numbers and judgment criteria data combined accordingly is stored in a predetermined memory, and for other circuit boards, the inspection data stored in that memory is used as the last of the current data in the main body memory. By sequentially copying steps after the step, adding a predetermined offset value to the pin number, and repeating this for the number of circuit boards to be measured, the order of measurement steps for all circuit boards and the pin numbers and judgment standard data related to their combinations are obtained. Create.

When inspecting a circuit board, each circuit board in the mother board to be inspected is inspected according to the combination of measurement step order and pin number stored in the memory.

Also, when testing multiple circuit boards with different circuit configurations that have multiple board fixtures and corresponding pin boards, first test one pin versus all other pins for each circuit board. Then, for each point to be measured on the same circuit board, test data including the order of measurement steps, pin numbers combined according to each measurement step, and judgment criterion data is stored in an external storage means, and then each Each inspection data for the circuit board is ranked and written in the main body memory, and a predetermined offset value is added to the pin number of the inspection data of the second rank or lower to create inspection data for all circuit boards. At the time of board inspection, the test data stored in the memory is read out in step order to test the circuit board to be tested fixed to each board fixture.

[For production]

According to the former method, all test data is created by copying the data of any one circuit board on the motherboard, so meaningless tests are omitted. Moreover, all the test data can be stored in one memory. Furthermore, according to the latter method, it is possible to test one pin versus all other pins in parallel even for circuit boards with different circuit configurations.

〔Example〕

First, a method for inspecting a multi-sided board will be explained with reference to FIGS. 1 to 3. In this embodiment, three circuit boards 81 to Sa having the same circuit configuration are formed on one mother board in a state where they are electrically unrelated to each other, and four probe pins are assigned to each circuit board. shall be taken as a thing.

It should also be understood that the apparatus for carrying out this testing method has one body memory and is also equipped with an external storage means such as a floppy disk.

First, a mother board that is assumed to be a good product is prepared, and reference data serving as a determination criterion is created from the circuit board S1 that is in contact with the first probe pin (for example, the pin at the left end in the figure). That is, the four probe pins assigned to the circuit board S1 are numbered 1 to 4 from the left, and a 1-pin versus all remaining pin test is performed. Table 1 shows the step and pin combinations.

(Table 1) (Table 2) The step order and pin combinations in Table 1 and the reference data absorbed from the road board S1 are written into the main body memory and saved, for example, on a floppy disk. Hereinafter, all of this saved data will be referred to as inspection data.

Next, in order to create reference data for the circuit board S2, the inspection data regarding the circuit board S□ is read from the floppy disk, and the current data in the main body memory is stored in the final step 4.
After that, the data is written starting from step 5, and a predetermined offset value, 10 in this example, is added to the pin number. This offset step and pin combination is shown in Table 2.

Similarly, in order to create reference data for eight circuit boards, read the inspection data for circuit board S1 from the floppy disk, write it from the final step 8 onward of the current data in the main body memory, that is, from step 9, and then write it to the pin number. A predetermined offset value, 20 in this example, is added. This offset step and pin combination is shown in Table 3.

(Table 3) In this way, inspection data regarding eight circuit boards S□ is created in the main body memory. In this embodiment, the inspection data of the circuit board S1 is once stored on the floppy disk, and then the inspection data is copied after the last step of the current data in the main body memory.
In some cases, the inspection data of the circuit board S work written in the main body memory may be copied as is from the final step onwards.

When inspecting a circuit board, the inspection data created in the main body memory is used as one data for testing. Therefore, there is no need to test one pin versus all other remaining pins across the circuit boards 81 to S3, and since all test data is stored in one main body memory, there is no need to increase the memory. For reference, FIG. 2 shows a flowchart for creating inspection data, and FIG. 3 shows a flowchart for executing board inspection.

Next, referring to FIGS. 4 to 6, a plurality of board fixtures are provided, and for example, three circuit boards S, to S6, each having a different circuit configuration, are set, and one pin pair is set. A case will be explained in which all remaining pin tests are performed in parallel. Note that four probe pins are assigned to each circuit board 84 to S as in the embodiment, and the pin numbers are 1.2 and 3.4 from the left in the figure.

First, three circuit boards 84 to S6 that are assumed to be non-defective products are prepared, and reference data serving as a determination criterion is created from these. That is, a probe pin is brought into contact with each circuit board S, ~S6, and a 1 pin vs. all other pin test is performed on each of them, and the test data including the steps and pin combinations at that time and reference data is saved on a floppy disk, for example. Save to external storage such as disk. The combination of steps and pins at this time is the same as each of the circuit boards 84 to SG, and an example thereof is shown in Table 4.

(Table 4) Next, each test data is read from the floppy disk and copied to the main body memory, but in this case,
The main body memory is divided into three memory areas A, B, and C according to each circuit board S, to S6. In this example,
In the memory area A, inspection data regarding the circuit board S4 is stored.
In the memory area B, inspection data regarding the circuit board S is stored.
In addition, inspection data regarding the circuit board S6 is copied to the memory area C, respectively. Here, if the reading order of the memory areas when measuring one circuit board is AnB→C, the inspection data regarding the circuit board S4 copied to the memory area A is left as is, but the inspection data regarding the circuit board S4 copied to the memory area B is A predetermined offset value, for example, lO, is added to the pin number in the inspection data regarding . Further, a predetermined offset value 1, for example 20, is added to the pin number in the inspection data regarding the circuit board S copied to the memory area C. Tables 5 to 7 show the combinations of steps and pins written in each memory area A, B, and C, respectively.

(Table 5) Memory area A (Table 6) Memory area B (Table 7) Memory area C As described above, circuit boards 84 to S with different circuit configurations
Inspection data is created for 6. For reference, the flowchart is shown in FIG. 5. In the above embodiment, the memory is divided into A and C for convenience of explanation, but in reality, the inspection data of the circuit board S is directly transferred to the main body memory. The test data for the circuit boards S5 and 81 are continuously copied after the final step already written in the main body memory, and all the test data is treated as one test data.

At the time of circuit board inspection, as shown in the flowchart of FIG.
6, 1 pin versus all remaining other pins tests are performed. In that case, the probe pins belonging to each fixture are distinguished from the probe pins belonging to other fixtures by adding an offset value, so that one pin is compared to all the remaining probe pins across one circuit board 84 to S. There will be no pin test.

〔Effect of the invention〕

As explained above, according to the invention set forth in claim 1,
When inspecting multi-panel boards, meaningless inspections between the boards can be omitted.

In addition, the criterion data can be reasonably created within one memory. Further, according to the invention described in claim 2, even for a plurality of circuit boards having different circuit configurations, one pin versus all remaining pins can be tested in parallel on each of the circuit boards without mutual interference. It can be implemented.

[Brief explanation of drawings]

Fig. 1 is a schematic diagram for explaining an embodiment of a multi-panel board, Fig. 2 is a flowchart for explaining the creation of inspection data in the embodiment, and Fig. 3 is a circuit board inspection of the embodiment. FIG. 4 is a schematic diagram for explaining another embodiment for a plurality of circuit boards with different circuit configurations, and FIG. 5 is a flowchart for explaining the creation of inspection data in the same embodiment. Fig. 6 is a flowchart when inspecting a circuit board according to the same embodiment, Fig. 7 is a circuit diagram for explaining the inspection method as a precedent example of the present invention, and Fig. 8 is a case where the same inspection method is applied to a multi-sided board. FIG. 2 is a schematic diagram for explaining the problem. In the figure, 1 to 4 are probe pins, 5 is a measurement signal source, 6 is a signal detection section, 9 is a CPU, and si to S6 are circuit boards to be inspected. Figure 1 Figure 2 Figure 3 Patent Applicant Hioki Electric Co., Ltd. Agent Patent Attorney Takuya Ohara Figure Fixture 1 Fixture 2 Fixture 6 Figure 6 Figure A Figure

Claims (2)

[Claims] (1) A circuit board inspection method that targets a multi-sided board formed by forming a plurality of identical circuit boards on a single mother board, the method comprising a plurality of probes that contact each point to be measured of the plurality of circuit boards. A measurement signal source that supplies a measurement signal to each of the circuit boards through the same probe pin, a signal detection section that detects a response signal output from each of the circuit boards through the same probe pin, and the probe pin. a switching means for connecting the probe pin to either the measurement signal source or the signal detection section, a predetermined one of the probe pins is connected to the signal detection section, and all the remaining probe pins are connected to the measurement signal source. By connecting this one pin to all other pins on each probe pin,
In a device that measures the impedance of each measured point and determines the quality of each circuit board based on the impedance value, first, the one pin pair is All remaining pins are tested and the test data including the order of measurement steps, pin numbers combined according to each measurement step, and judgment standard data is stored in a predetermined memory for each point to be measured on the same circuit board. For other circuit boards, the inspection data stored in the memory is sequentially copied after the last step of the current data in the main body memory, and a predetermined offset value is added to the pin number. , repeat this for the number of circuit boards to be measured,
Create measurement step orders and pin numbers and judgment criteria data for their combinations for all circuit boards,
A method for inspecting a circuit board, characterized in that, when inspecting a circuit board, each circuit board in the mother board to be inspected is inspected according to a combination of measurement step order and pin number stored in the main body memory. (2) A circuit board testing method that includes multiple board fixtures and corresponding pinboards and simultaneously tests multiple circuit boards with different circuit configurations, the method comprising contacting each measured point of the multiple circuit boards. a plurality of probe pins, a measurement signal source that supplies measurement signals to each of the circuit boards through the probe pins, and a signal detection section that detects response signals output from each of the circuit boards through the same probe pins. , a switching means for connecting the probe pin to either the measurement signal source or the signal detection section, wherein a predetermined one of the probe pins is connected to the signal detection section, and all the remaining probe pins are connected to the signal detection section. By connecting to the above measurement signal source side and performing this 1 pin vs. all remaining pin tests on each probe pin, the impedance of each measured point can be measured, and the quality of each circuit board can be determined using the impedance value. First, for each circuit board, a test is performed on the one pin versus all other pins, and for each point to be measured on the same circuit board, combinations are determined according to the measurement step order and each measurement step. After storing the inspection data including the pin number and judgment standard data in the external storage means,
Inspection data for each of the circuit boards listed above is ranked and written into the main body memory, and a predetermined offset value is added to the pin number of the inspection data of the second rank or lower to create inspection data for all circuit boards. A method for inspecting a circuit board, characterized in that when inspecting a circuit board, the inspection data stored in the memory is read out in step order and the circuit board to be inspected fixed to each board fixture is inspected.