JPH04373141A - Defect detection method of semiconductor device and detection apparatus used for it - Google Patents

Defect detection method of semiconductor device and detection apparatus used for it

Info

Publication number
JPH04373141A
JPH04373141A JP15075291A JP15075291A JPH04373141A JP H04373141 A JPH04373141 A JP H04373141A JP 15075291 A JP15075291 A JP 15075291A JP 15075291 A JP15075291 A JP 15075291A JP H04373141 A JPH04373141 A JP H04373141A
Authority
JP
Japan
Prior art keywords
light emission
timing
defective
circuit
light emitted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15075291A
Other languages
Japanese (ja)
Inventor
Yukiharu Uraoka
行治 浦岡
Noriko Tsutsu
筒 野里子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP15075291A priority Critical patent/JPH04373141A/en
Publication of JPH04373141A publication Critical patent/JPH04373141A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To detect defective portions in a semiconductor integrated circuit by using weak light emission. CONSTITUTION:A semiconductor integrated circuit containing defective portions is driven by applying a power supply and a signal. The light emission mount from the circuit in a specified period is only measured in a synchronous state to the signal. By repeating the above process, the distribution of light emission amount regarding the time of the signal is measured. The above results are compared with the light emission amount distribution of a normal integrated circuit free from defects, and whether difference exists between the light emission amounts is checked. When the difference exists, the defective portions are detected by comparing the light emission amounts in the integrated circuit surfaces in the observed period. The timing of defect generation is detected by measuring the light emission from the circuit containing the defective portions and the normal circuit so as to be synchronous to the operation timing. Hence the positions on the circuit where defective portions exist and the timing of defect generation can be easily detected, and voltage relation at the defective portions can be examined.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は半導体集積回路における
不良箇所の検出方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting defective locations in a semiconductor integrated circuit.

【0002】0002

【従来の技術】半導体集積回路における不良箇所の検出
方法として、不良箇所からの微弱な発光を採光、増幅す
る方法があった。この方法は、回路の電源のみを印加す
るか、または動作させながら、その発光を一定時間、蓄
積し、その発光分布から不良箇所を推定するものであっ
た。
2. Description of the Related Art As a method for detecting defective locations in semiconductor integrated circuits, there has been a method of collecting and amplifying weak light emitted from the defective locations. In this method, only power is applied to the circuit or while the circuit is operating, the light emission is accumulated for a certain period of time, and the defective location is estimated from the light emission distribution.

【0003】0003

【発明が解決しようとする課題】従来の方法では、以下
のような問題点があった。デバイスからの発光は、その
内部を走るキャリアがエネルギーを失う場合に発生する
のであるが、必ずしも、不良である箇所からのみ発光す
るのではなく、たとえば、ゲート幅の非常に大きなもの
からも発光は見られる。したがって、不良でない箇所か
らの発光も含まれるため、発光する全箇所の中から詳細
な回路解析を行い、不良箇所を絞り込む必要があった。
[Problems to be Solved by the Invention] The conventional methods have the following problems. Light emission from a device occurs when carriers running inside the device lose energy, but light emission does not necessarily occur only from defective parts; for example, light emission also occurs from devices with very large gate widths. Can be seen. Therefore, since light emitted from non-defective locations is also included, it was necessary to conduct a detailed circuit analysis from all the locations that emit light to narrow down the defective locations.

【0004】本発明は上記問題を解決するもので、不良
箇所が回路上のどの場所で、どのタイミングて発生して
いるかが容易にわかる不良検出方法およびそれに使用す
る検出装置を提供することを目的とするものである。
SUMMARY OF THE INVENTION The present invention solves the above problems, and aims to provide a defect detection method and a detection device for use in the defect detection method that makes it easy to determine where and at what timing a defect occurs on a circuit. That is.

【0005】[0005]

【課題を解決するための手段】上記課題を解決するため
に本発明の不良検出方法およびそれに使用する装置は、
不良箇所を含む半導体回路と不良箇所を含まない半導体
回路をテストプログラムによって動作させ、動作タイミ
ングに合わせて、テストプログラム上のある時間、発光
を取り込むために光電面にシャッターを設けて採光増幅
し、テストプログラム上のある一定時間だけの発光を取
り込むとともに、この光電面を開ける時間をテストプロ
グラム上でずらして、テストプログラム上の各タイミン
グに対応する発光量分布をとり、これら両回路の発光量
を比較することにより不良箇所を検出するようにしたも
のである。
[Means for Solving the Problems] In order to solve the above problems, the defect detection method and apparatus used therein of the present invention are as follows:
A semiconductor circuit that contains a defective part and a semiconductor circuit that does not contain a defective part are operated according to a test program, and a shutter is installed on the photocathode to capture the light emitted during a certain period of time according to the test program according to the operation timing, and the light is amplified. In addition to taking in the light emission for a certain period of time on the test program, the time when this photocathode is opened is shifted on the test program, and the light emission amount distribution corresponding to each timing on the test program is obtained, and the light emission amount of these two circuits is calculated. By comparison, defective locations are detected.

【0006】[0006]

【作用】上記構成により、テストプログラムに対応する
発光量分布を、不良箇所を含む回路からの発光と、不良
箇所を含まない回路からの発光を比較することにより、
不良がどのタイミングで、回路上のどこで発生している
かが検出できる。また、あらかじめ、テストプログラム
のタイミングに対応する発光分布を計算によってシミュ
レーションしておき、これと比較しても、不良がどのタ
イミングで、どこで発生しているかがわかる。これによ
り、不良箇所での電圧のかかり具合を検討でき、製造プ
ロセス上の問題や設計上の問題を検出できて、性能や信
頼性の高い集積回路を開発できる。
[Operation] With the above configuration, the light emission amount distribution corresponding to the test program is determined by comparing the light emission from the circuit including the defective part and the light emission from the circuit not including the defective part.
It is possible to detect when and where on the circuit a defect occurs. In addition, by calculating and simulating the light emission distribution corresponding to the timing of the test program in advance, and comparing this, it can be seen at what timing and where defects occur. This makes it possible to examine the voltage applied to defective parts, detect manufacturing process problems and design problems, and develop integrated circuits with high performance and reliability.

【0007】[0007]

【実施例】以下本発明の一実施例を図面に基づいて説明
する。まず、本発明の原理について説明する。半導体回
路において、電源および信号を加えると、個々のトラン
ジスタに電圧が加わり、ゲート、ドレインの電圧がある
関係なったときに発光現象が見られる。たとえば、ゲー
ト長1ミクロン程度のMOSトランジスタの場合、ドレ
イン電圧が5.0 Vのとき、ゲート電圧は1.5 V
程度で非常に強い発光が見られる。これは、内部を走る
キャリアがエネルギーを失うときに発光するためである
。ただし、電圧がこの関係を満たしていなくても、ゲー
ト幅が非常に大きい場合、発光がみられるため、発光が
見られても直ちに、不良とはいえない。また、MOSト
ランジスタのゲート酸化膜が、破壊されたときや、配線
がショートしたときには、ジュール熱によって発光する
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. First, the principle of the present invention will be explained. In a semiconductor circuit, when a power source and a signal are applied, a voltage is applied to each transistor, and when the gate and drain voltages are in a certain relationship, a light emission phenomenon is observed. For example, in the case of a MOS transistor with a gate length of about 1 micron, when the drain voltage is 5.0 V, the gate voltage is 1.5 V.
A very strong luminescence can be seen. This is because carriers running inside emit light when they lose energy. However, even if the voltage does not satisfy this relationship, if the gate width is very large, light emission will be observed, so even if light emission is observed, it cannot immediately be said that the device is defective. Furthermore, when the gate oxide film of a MOS transistor is destroyed or the wiring is short-circuited, light is emitted due to Joule heat.

【0008】以下具体例について本発明の実施例を詳細
に説明する。図1は本発明の一実施例の不良検出方法を
説明するためのブロック図である。図1において、駆動
回路50によって動作する集積回路10からの発光を光
電面30によって光を電気に変換し、増幅回路40で増
幅する。 このとき、駆動回路50の信号に同期するシャッター2
0を光電面にとりつける。
Embodiments of the present invention will be described in detail below with reference to specific examples. FIG. 1 is a block diagram for explaining a defect detection method according to an embodiment of the present invention. In FIG. 1, light emitted from an integrated circuit 10 operated by a drive circuit 50 is converted into electricity by a photocathode 30, and amplified by an amplifier circuit 40. At this time, the shutter 2 synchronized with the signal of the drive circuit 50
Attach 0 to the photocathode.

【0009】この装置を用いて不良検出を行なう方法を
図2を用いて説明する。不良箇所を含むLSIと不良を
含まないLSIを用い、電源および図2(a)に示すよ
うなn本の信号から成るテストプログラムを印加する。 テストプログラムは10ステップからなり、各ステップ
は10マイクロ秒とし、したがって全体を100 マイ
クロ秒とする。まず、図2(a) に示すように、光電
面30のシャッター20を10マイクロ秒のみ開き、テ
ストプログラムの第1ステップの10マイクロ秒の時間
のみの発光をサンプリングする。テストプログラムは1
000回ぐらい走らせ、発光も1000回分蓄積する。 次に光電面30のシャッター20をテストプログラムの
第2ステップに合わせて開き、第1ステップと同様10
00回分蓄積する。第3ステップ以降も同様にすること
によって、テストプログラムのステップに対応した発光
量を測定する。
A method for detecting defects using this device will be explained with reference to FIG. A test program consisting of a power supply and n signals as shown in FIG. 2(a) is applied using an LSI that includes a defective portion and an LSI that does not include a defective portion. The test program consists of 10 steps, each step taking 10 microseconds, thus making the total time 100 microseconds. First, as shown in FIG. 2(a), the shutter 20 of the photocathode 30 is opened for only 10 microseconds to sample the light emission for only 10 microseconds in the first step of the test program. The test program is 1
It runs about 1,000 times and accumulates light emission for 1,000 times. Next, the shutter 20 of the photocathode 30 is opened according to the second step of the test program, and the shutter 20 of the photocathode 30 is opened in accordance with the second step of the test program.
Accumulate 00 times. By repeating the same procedure from the third step onward, the amount of light emitted corresponding to the step of the test program is measured.

【0010】次に、不良箇所を含む回路と含まない回路
の発光量の分布を比較する。たとえば、図2(c) に
示すように第5ステップで差が出たとすると、第5ステ
ップのタイミングのとき、不良が発生していることにな
る。 また、図3に示すように、このときのLSI面内の発光
を見れば、そこで発光しているトランジスタが不良であ
ることがわかる。たとえば、不良箇所を含む回路では図
3(a) のように4つの発光点1〜4がみられたとし
た場合に、正常な回路では、図3(b) のように3つ
の発光点2〜4しかなかったとすると、第1の発光点1
が不良箇所を示していることになる。これらにより、不
良箇所での電圧のかかり具合などを検討でき、製造プロ
セス上の問題や設計上の問題を検出できる。
Next, the distribution of the amount of light emitted by a circuit that includes a defective portion and a circuit that does not include a defective portion will be compared. For example, if a difference occurs at the fifth step as shown in FIG. 2(c), it means that a defect occurs at the timing of the fifth step. Furthermore, as shown in FIG. 3, by looking at the light emitted within the LSI surface at this time, it can be seen that the transistor emitting light there is defective. For example, if a circuit containing a defective part has four light-emitting points 1 to 4 as shown in Figure 3(a), a normal circuit has three light-emitting points 2 to 4 as shown in Figure 3(b). If there are only 4, the first light emitting point 1
indicates the defective location. With these, it is possible to examine the voltage applied at the defective location, and to detect problems in the manufacturing process or design.

【0011】次に、本発明の他の実施例を説明する。不
良を含まないLSIを用いずに、あらかじめ、各ステッ
プ毎の発光量を図4のように計算によってシミュレーシ
ョンしておけば、これと不良箇所を含む集積回路の発光
量との発光量の違いによって、不良箇所の検出が可能と
なる。ここで、不良箇所の検出は、このタイミングでの
面内の発光分布を、第1の実施例と同様に、シミュレー
ションによって予想した面内の発光分布と比較して行わ
れる。
Next, another embodiment of the present invention will be explained. If the amount of light emitted at each step is simulated in advance by calculation as shown in Figure 4 without using an LSI that does not include defects, it will be possible to calculate , it becomes possible to detect defective locations. Here, the defective location is detected by comparing the in-plane light emission distribution at this timing with the in-plane light emission distribution predicted by simulation, as in the first embodiment.

【0012】0012

【発明の効果】以上のように、本発明による不良検知手
法を用いることによって、不良箇所が回路上のどの場所
で、どのタイミングで発生しているかが容易にわかる。 したがって、製造プロセス上の問題や設計上の問題を検
出でき、性能や信頼性の高い集積回路を開発することが
可能となる。
As described above, by using the defect detection method according to the present invention, it is easy to find out where on the circuit a defect occurs and at what timing. Therefore, manufacturing process problems and design problems can be detected, and integrated circuits with high performance and reliability can be developed.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例の不良検出方法を説明するた
めのブロック図である。
FIG. 1 is a block diagram for explaining a defect detection method according to an embodiment of the present invention.

【図2】集積回路を駆動する信号、シャッターの開閉の
タイミング、不良箇所を含む集積回路と含まない集積回
路における信号に対する発光量の分布状態を説明するた
めの図である。
FIG. 2 is a diagram for explaining the distribution state of the amount of light emitted with respect to signals for driving the integrated circuit, timing of opening and closing of the shutter, and signals in the integrated circuit including and not including the defective part.

【図3】不良箇所を含む集積回路と正常な集積回路の発
光分布状態を説明する図である。
FIG. 3 is a diagram illustrating the light emission distribution state of an integrated circuit including a defective portion and a normal integrated circuit.

【図4】不良箇所を含む集積回路とシミュレーションに
よって求めた、信号に対する発光量の分布状態を説明す
るための図である。
FIG. 4 is a diagram illustrating an integrated circuit including a defective portion and a distribution state of light emission amount with respect to a signal obtained by simulation.

【符号の説明】[Explanation of symbols]

1〜4    発光点 10        集積回路 20        シャッター 30        光電面 40        増幅回路 50        駆動回路 60        不良箇所を含む集積回路70  
      正常な集積回路
1 to 4 Light emitting point 10 Integrated circuit 20 Shutter 30 Photocathode 40 Amplifier circuit 50 Drive circuit 60 Integrated circuit 70 including defective parts
normal integrated circuit

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】  動作している不良箇所を含む半導体回
路と不良箇所を含まない半導体回路からの微弱な発光を
増幅し、両者を比較することにより不良箇所を検出する
ことを特徴とする半導体デバイスの不良検出方法。
[Claim 1] A semiconductor device characterized in that a weak light emission from an operating semiconductor circuit including a defective part and a semiconductor circuit not including a defective part is amplified, and a defective part is detected by comparing the two. defect detection method.
【請求項2】  動作している不良箇所を含む半導体回
路と不良箇所を含まない半導体回路からの微弱な発光を
動作タイミングにあわせて採光、増幅し、両者を比較す
ることにより不良箇所を検出することを特徴とする半導
体デバイスの不良検出方法。
[Claim 2] Weak light emitted from an operating semiconductor circuit that includes a defective portion and a semiconductor circuit that does not include a defective portion is illuminated and amplified in accordance with the operating timing, and a defective portion is detected by comparing the two. A method for detecting defects in semiconductor devices, characterized in that:
【請求項3】  動作している不良箇所を含む半導体回
路と不良箇所を含まない半導体回路からの微弱な発光を
動作タイミングにあわせて採光、増幅し、タイミング毎
の発光量を記録しておき、両者の発光量を差し引き、そ
の差から不良の発生するタイミングを検出し、不良箇所
を検出することを特徴とする半導体デバイスの不良検出
方法。
3. Lighting and amplifying weak light emitted from an operating semiconductor circuit including a defective part and a semiconductor circuit not including a defective part in accordance with the operating timing, and recording the amount of light emitted at each timing, A method for detecting defects in a semiconductor device, which comprises subtracting the amount of light emitted from both, detecting the timing at which a defect occurs based on the difference, and detecting a defect location.
【請求項4】  動作している半導体回路からの微弱な
発光を動作タイミングにあわせて採光、増幅し、あらか
じめ、計算によりタイミング毎の発光量を計算し、両者
を比較することにより不良箇所を検出することを特徴と
する半導体デバイスの不良検出方法。
4. Weak light emitted from an operating semiconductor circuit is illuminated and amplified in accordance with the operating timing, the amount of light emitted at each timing is calculated in advance, and defective locations are detected by comparing the two. A method for detecting defects in semiconductor devices, characterized by:
【請求項5】  半導体回路の不良箇所からの微弱な発
光を増幅して不良箇所を検出する不良検出装置であって
、動作タイミングに同期させて発光を採光するためのシ
ャッターを光電面に設けたことを特徴とする半導体デバ
イスの不良検出装置。
[Claim 5] A defect detection device that detects a defective portion by amplifying weak light emitted from a defective portion of a semiconductor circuit, the device comprising a shutter for collecting the emitted light in synchronization with the operation timing on the photocathode. A semiconductor device defect detection device characterized by the following.
JP15075291A 1991-06-24 1991-06-24 Defect detection method of semiconductor device and detection apparatus used for it Pending JPH04373141A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15075291A JPH04373141A (en) 1991-06-24 1991-06-24 Defect detection method of semiconductor device and detection apparatus used for it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15075291A JPH04373141A (en) 1991-06-24 1991-06-24 Defect detection method of semiconductor device and detection apparatus used for it

Publications (1)

Publication Number Publication Date
JPH04373141A true JPH04373141A (en) 1992-12-25

Family

ID=15503645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15075291A Pending JPH04373141A (en) 1991-06-24 1991-06-24 Defect detection method of semiconductor device and detection apparatus used for it

Country Status (1)

Country Link
JP (1) JPH04373141A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0937991A2 (en) * 1998-02-19 1999-08-25 International Business Machines Corporation System and method for determining the delay makeup of a circuit
US6650768B1 (en) * 1998-02-19 2003-11-18 International Business Machines Corporation Using time resolved light emission from VLSI circuit devices for navigation on complex systems
US10500279B2 (en) 2009-12-15 2019-12-10 John E. Kulesza Low toxicity topical active agent delivery system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0937991A2 (en) * 1998-02-19 1999-08-25 International Business Machines Corporation System and method for determining the delay makeup of a circuit
US6650768B1 (en) * 1998-02-19 2003-11-18 International Business Machines Corporation Using time resolved light emission from VLSI circuit devices for navigation on complex systems
EP0937991A3 (en) * 1998-02-19 2004-01-28 International Business Machines Corporation System and method for determining the delay makeup of a circuit
US10500279B2 (en) 2009-12-15 2019-12-10 John E. Kulesza Low toxicity topical active agent delivery system

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