JPH0437194A - Hot line insertion package - Google Patents

Abstract

PURPOSE:To ensure insertion/extraction into/from a back plane in the state where a device is operated by contacting a connector pin to which a power supply including an earth and inductance connected thereto, and thereafter contacting in a time difference a connector part to which a power supply is directly connected. CONSTITUTION:A switch 17 connects a power supply 4 to whole electrostatic capacity 12 and whole load resistance 13 both connected parallely, through inductance 14, and a switch 18 directly connects the power supply 4 to the whole electrostatic capacity 12 and the whole load resistance 13, and further the inductance 14 is actuated only at the temporal time when a package 2 is inserted. Further, after the power supply 4 is directly connected to the package 2 through a middle terminal 9, a short terminal 10 is connected in a time difference to connect a signal line 7 to a circuit in the package 2. Herein, L>=4CR2 is satisfied taking L as a value of the inductance 14, C as a value of the whole electrostatic capacity, and R as a value of the whole load resistance 13, and hence supply voltage settlement time is designed to be shorter than a contact time difference of a long terminal 8 and the middle terminal 9 of the connector 3.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a hot-swap cable 7 that can be inserted and removed while the device is in operation.

,Conventional technology 2Conventionally, the connector connects the hack plane and bar 7 to 7.
When performing maintenance work on equipment that has a unit or unit configuration that is connected to the
There was a demand for hot-line insertion and removal, and flexible hot-line insertion and removal methods were adopted as shown in Figures 4 to 6.

FIG. 4 is an explanatory diagram showing a first example of conventional hot-swap countermeasures, in which 20 is an operation package, 21 is a back brain, 22 is an external power line, 23 is a power connector, and 24 is an insertion pano cane. .

This first example connects the external power line 22 to the insertion package 24.
For the hack plane 2], power is supplied using a separate power connector 23 from the connector 72, which is connected to the hack plane 2.
This is a method in which insertion and removal are performed while ensuring the operation of the circuits mounted on 4.

FIG. 5 is a circuit diagram showing a second example of a conventional hot-swapping countermeasure, in which 21 is a hack plane, 24 is a mating/unmating package, and 25 is a connector pin that contacts in two stages with a time difference. This is a connector that connects the hackbrain 21 and the insertion/extraction package 24.

In the backbrain 21, 211 is a power source, 212 is a ground line, 213 is a power line, and 214 is a signal line. The connector 25 connects the hackbrain 21 side and the package 24
It is divided into two sides, and the pinocane 24 side is the connector pin that makes contact in the first stage.

It has a long terminal 251 and a short terminal 252 which is a connector pin that comes into contact in the second stage. In the insertion/removal panty 724, 241 is a logic element constituting a mounted circuit, 242
is a capacitor connected between the circuit power supply voltage Vcc and the ground, and is a so-called bus condenser.
and ground are connected to the long terminals 251 of the connector 25, respectively, and when the connector 25 is fitted, the signal line 214 of the notebook plane 21. Power line 213. Earth wire 21
2, respectively.

In this second example, when the insertion/extraction package 24 is inserted, the long terminal 251 for power/earth is brought into contact in advance by utilizing the contact time difference between the long and short terminals of the connector 25, and the insertion/extraction package 24 is
After stabilizing the power supply voltage Vcc of 4, the signal terminal 252
This is a method in which the two parts are brought into subsequent contact.

FIG. 6 is a circuit diagram showing a third example of conventional hot-swap countermeasures, in which 21 is a hack plane, 24 is a hot-swap package,
25 is the same two-stage contact connector as in the second example. In the hack plane 21, 211 is a power supply, 212 is a ground line, 213 is a power line, 214 is a signal line, and 215 is a capacitor connected between the power line 213 and the ground line 212. The connector 25 is a notebook plane 2 as mentioned above.
1 side and package 24 side, and on the package 24 side, there is a long terminal 25 which is a connector pin that comes into contact in the first stage.
1 and short terminal 2, which is the connector pin that contacts in the second stage.
52. Insertion/removal pa.

In the cane 24, 241 is a logic element, 242 is a bypass capacitor connected between the circuit power supply voltage Vcc and ground, 24
3 is an electrolytic capacitor also connected between the circuit power supply voltage Vcc and ground, and 244 is an inductance. When connecting the insertion/removal package 24, the input side of the logic element 241 is connected to the short terminal 252 of the connector 25, and the circuit power supply voltage Vc is connected to the short terminal 252 of the connector 25.
c is connected to the long terminal 251 of the connector 25 through the inductance 244, and the ground is connected to another long terminal 251 of the connector 25.
By fitting the connectors 25, the signal lines 214 . of the hack plane 21 are connected to the signal lines 214 . , power line 213. Each is connected to a ground wire 212.

In addition to the effects of the second example described above, this third example has the advantage that the inductance 244 inserted into the power receiving location allows the insertion/removal package 24
To prevent current from flowing into the bypass capacitor 242 when inserting the inductance 244 and the electric vibration generated by the bypass capacitor 242, connect the electrolytic capacitor 2438 and use the large tan δ of this electrolytic capacitor 243 to reduce its resistance component. At the same time, by attaching the container/suspension 215 to the hack plane 21, it is possible to
This method absorbs power supply voltage fluctuations of adjacent packages when the case 724 is inserted or removed. Note that FIG. 7 is a configuration diagram of the power supply pattern of the insertion/removal lock 724 of the third example, and the board is omitted from the illustration.

25 is a two-step contact connector on the side of the package 24, 244 is an innotutance, 246 is a power layer at the power receiving point connected to the long DX element 251, 247 is a power layer that supplies power to the mounted circuit, and 248 is a ground layer. The inductance 244 between the divided power layers 246 and 247
connected only by.

[However, since this is a problem to be solved by the invention, the insertion/removal bar, cable/cable, and
Each of the hot-swap and unplug countermeasures had the following problems.

(1) In the first example of Fig. 4, the insertion and removal procedure is complicated because the separate flap connector 23 is connected, and there is a drawback that it requires care in handling, and if the procedure is incorrect, it may cause malfunction. , there was a risk of destroying the mounted components.

(2) In the second example of FIG. 5, when the package 24 is inserted, an inrush current flows through the bus hood 242, so the voltage of the adjacent package may drop instantaneously, and the power supply voltage of the inserted package 24 may oscillate, causing the mounted IC to There is a possibility that a voltage higher than the guaranteed operation voltage of the integrated circuit (integrated circuit) may be generated and destroy the IC.

Further, there is a possibility that circuit operation may be interrupted due to an instantaneous drop in the power supply voltage of an adjacent package.

(3) The third example shown in FIGS. 6 and 7 solves the problems of the second example, but an electrolytic capacitor 243 with a larger capacity is connected in parallel to the bypass capacitor 242 in the insertion/removal bar and cable 724. Therefore, LC (inductance and capacitance)
Inductance 244 to keep the resonance below the allowable value
is a large value. So, the inductance is 244
The old version had the disadvantage of being large and requiring large mounting space.Also, the bank brain 21 also had the disadvantage of requiring a capacitor 215.Also, as shown in Fig. 7, the power supply pattern Since the power supply layer is divided into power supply layers 246 and 247 and the inductance 244 is connected between them, the power supply characteristics during steady state become unstable and ground noise increases.

The present invention solves the above-mentioned problems such as the complexity of the insertion/extraction procedure, the vibration of the power supply voltage of the inserted package, the increase in ground noise during steady state, the increase in the mounting space, and the instantaneous power interruption of the adjacent package. It is an object of the present invention to provide a hot-swap package that allows insertion and removal from a backbrain while the device is in operation.

[Means for Solving the Problems] The configuration of the hot-swap package of the present invention for achieving the above-mentioned object is as follows. The unit configuration is characterized in that a power source connected to ground and an inductance is assigned to the connector pin that comes into contact with the first stage, and a power source is directly assigned to the connector pin that comes into contact with the second and subsequent stages.

! Effect] The present invention is a transient method in which a connector pin to which a power source connected to ground and an inductance is connected is brought into contact, and then a connector pin to which a power source is directly connected is brought into contact after a time difference, and the package is inserted using the time difference. At times, inductance is applied to suppress the inrush current to bypass capacitors, etc. of the inserted package, and during steady state, inductance is eliminated to eliminate instability in the power supply characteristics, and the electrolytic capacitor between the power supply and ground on the package side Make nato unnecessary.

[Embodiments] Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which 1 is a hackbrain, 2 is an insertion/extraction pin, 3 is a hackbrain having connector pins that contact each other in three stages with time differences. This is a connector that connects I and the insertion/removal lever 72. In hackbrain 1, 4 is the power supply, 5 is the ground (G
6 is a power supply line, and 7 is a signal line. Connector 3
C. It is divided into the Cufreno 1 side and the package 2 side. On the package 2 side, the long terminal 8 is the connector pin that contacts in the first stage, and the middle terminal 9 is the connector pin that contacts in the second stage. , short terminal 10 l!, which is the connector pin that contacts in the third stage! :have.

In the insertion/removal package 72, 11 is a logic element constituting the mounted circuit, 12 is the total capacitance of the Banoke/2, 13 is the total load resistance of the package 2, 14 is the inductance, and 15 is the total capacitance of the package 2.
is a power supply terminal, and 16 is a ground (GND) hm terminal.

The input side of the logic element 11 is connected to the short terminal 10 of the connector 3, and the power terminal 15 is connected to the long terminal 8 through an inductance 14 and directly to the middle terminal 9.
The ground terminal 16 is connected to a long terminal 8 different from the above.

The operation and effect of the embodiment configured as above will be described.

FIG. 2 shows an equivalent circuit diagram of the power supply system of FIG. 1 for this purpose. In the figure, power supply 4. Total package capacitance12. The total package load resistance 13 and inductance 14 are those explained in Fig. 1 above, 17 is a switch equivalent to the contact of the long terminal 8 in Fig. 1, and 18 is the switch equivalent to the contact of the middle terminal 9. It is a switch. In FIG. 1, the long terminal 8 makes contact first, and the middle terminal 9 makes contact with a time difference. That is, in the equivalent circuit, when the package is inserted, the switch 17 is turned on in the first step, and the switch 18 is turned on in the second step after 1 m5ec or more. Switch 17 connects the power supply 4 through inductance 14 to the total capacitance 12 and total load resistance 13 in parallel, and switch 18 connects the total capacitance 12 and total load resistance 1 to the total capacitance 12 and total load resistance 13 in parallel.
Connect power supply 4 directly to 3. Therefore, in this embodiment, the transient inductance 14 of inserting the package 2 can be applied. The action is to prevent inrush current from flowing into the package total capacitance 12, etc. In the second step, after the power supply 4 is directly connected to the package 2 through the middle terminal 9, the short terminal 10 is contacted after a time lag, and the signal line 7 is connected to the circuit inside the package 2.

As a result, after the power supply voltage of package 2 has been stabilized, c.

The circuit operation is ensured by connecting the cube brain 1 and the package 2, and hot insertion/disconnection is possible without going through complicated procedures.

Next, a method for determining the inductance L that allows the power supply voltage inside the package 2 to settle within the guaranteed operation range of the actual device C from the time when the long terminal 8 comes into contact until the time when the middle terminal 9 comes into contact will be described.

First, we will discuss the conditions for overtamping so that the voltage of the insertion package does not oscillate. In the equivalent circuit shown in Figure 2, the following formulas (1) and (2)
or it will be true.

However, E(t) and 1(t) are the voltage and current at the long terminal 8, V(t) is the voltage of the total load resistance 13, L is the value of the inductance 14, C is the value of the total capacitance, and R is the total Load resistance 1
The value is 3. Here, the total load resistance value R can be calculated from the power consumption P of the package and the power supply voltage CC using equation (3).

v cc' R= ・
(3) When equations (1) and (2) are solved simultaneously, equation (4) is obtained.

v(t)-Eil 2α.

(cosωj+-8lnωt) “e ω 4゛) ... (4) However, here, the condition for overdamping according to equation (4) is ω
Since 2<O, the value for overtamping can be expressed by equation (6).

Therefore, in order to prevent vibrations, only a value larger than 4CR' is required. It can be seen that packages that do not have measures against hot insertion and removal will be subject to vibration conditions due to the presence of a minute inductance L in the power supply system. - As an example, the critical value when power consumption P=IO included' and Banoke/total capacitance 1c=loμF is 250μH from equation (6). In order to overtamp one cow, L larger than this critical value is required.

Next, a description will be given of the power supply voltage stabilization time of the insertion bar 7. When the long terminal 8 of the connector 3 comes into contact with the connector 3 when inserting the Banoke 7, the power supply voltage of the package 2 is within the guaranteed operating range of 1c (4,
5V<Vcc<5.5■).

That is, it is necessary to design the power supply voltage settling time [S] to be shorter than the contact time difference tc between the long terminal 8 and the middle terminal 9 of the connector 3. The contact time difference ts between the long terminal 8 and the middle terminal 9 of the connector 3 in this embodiment is larger than 1 ms. That is, in the equivalent circuit shown in FIG. 2, there is a time difference of more than [msec] between the on-times of the switches 17 and 18. Therefore, as a setting condition for the applied voltage in Banoke/2,
Is it necessary to design it so that it becomes 4.5■ or more within 1ms? These conditions can be calculated from equation (4), or since t cannot be obtained analytically, the packer/total capacitance 1c = IoμF, power consumption P = ]OW, and settling time 1ms are fixed and the inductance is 14. The value of is calculated to be 1.15 mH. Therefore, middle terminal 9
The value for settling within 1ms, which is the contact time of , is 1
．． Is it necessary to keep it below 15 mH?

From the above results, the inductance value that satisfies both the overtamping condition and the power supply voltage setting condition is:
250μH≦L≦1.15mH. Fig. 3 shows an example that satisfies these conditions: PloW, C=10μF, L=
Shows the Nomura Soyon results at 1 mH. As is clear from the figure, it can be confirmed that the guaranteed operating voltage is set to 45 cm without voltage fluctuation within 1 ms.

It goes without saying that the present invention can be applied in various ways according to its gist and can take various embodiments.

[Effects of the Invention] As is clear from the above explanation, according to the hot-swap package of the present invention, it is possible to easily replace a faulty package even when the device is in operation without going through complicated procedures. Even in the event of maintenance or failure of a large-scale system such as a switching device, a bank's online device, or a large-scale computer, there is an advantage that recovery can be quickly performed by replacing the pancake without stopping the device.

Further, according to the second aspect of the present invention, it is possible to prevent voltage oscillations during transient insertion and removal of the package, and
It is possible to eliminate the risk of destruction of C and the like.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is an equivalent circuit diagram for explaining the operation of the above embodiment, FIG. 3 is a measurement diagram showing the 7 millimeter/yon results of the above embodiment, and FIG. Fig. 4 is an explanatory diagram showing the first example of the conventional hot-swap countermeasure, Fig. 5 is a circuit diagram showing the second example of the conventional hot-swap countermeasure, and Fig. 6 is the third example of the conventional hot-swap countermeasure. FIG. 7, a circuit diagram showing an example, is a configuration diagram of the power supply pattern of the third example of the prior art. 1 Hanoku frame, 2 Insertion/removal panoker 7.3 Fukuta 1, 4 Power supply, 5 Ground wire, 6 Power wire, 7 Signal wire, 8 Long terminal, 9...Medium terminal, 10 Short terminal, 12-
Panokane total capacitance, 13 bar, K7 total load resistance, 1
4...Inductance, 15 Power supply terminal, 16 Ground terminal. 15--- 16--- Figure 1 made by Riland

Claims (2)

[Claims] (1) In a unit configuration in which the backplane and package are connected by a connector in which the connector pins contact each other in multiple stages with a time difference, a power supply connected to ground and inductance is assigned to the connector pin that contacts the first stage, and A hot-swap package characterized by directly assigning power to the connector pins that come in contact with the second stage and beyond. (2) In the hot-swap package according to claim 1, the inductance value L is L≧4C, where the total capacitance and total load resistance of the own package are C and R, respectively.
The power supply voltage within the package is guaranteed to satisfy the formula R^2, and the power supply voltage within the package is within the contact time difference between the connector pin that contacts the first stage and the connector pin that is assigned a direct power supply that contacts the second stage or later. A hot-swap package characterized in that the voltage is set to a value within the range.