JPH04364691A - Multi-processor exchanger system - Google Patents

Abstract

PURPOSE:To minimize number of processors to be installed by sharing the load uniformly for the entire processors so as to prevent local overload and decreasing a division loss of share of calls of the multi-processors. CONSTITUTION:When a call takes place in a processor 41 among processors 41-45, an input output program 51 selects an internal processing program 65 stored in a processor showing a minimum operating efficiency value among the processors 41-45, e.g. the processor 45 at that point and starts the program 65.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiprocessor switching system in a storage program controlled electronic switching system.

0002

2. Description of the Related Art In a conventional multiprocessor exchange system, for example, a multiprocessor having five processors,
As shown in FIG. 3, communication path devices 31 to 35 that accommodate subscribers 10 and trunks 20, and these communication path devices 31 to
The processors 41 to 45 that control the 35 are in fixed correspondence with the input/output programs 51 to 55 that control subscriber lines and trunks, and the internal processing programs 61 to 65 that control call processing services. , each processing calls within the same processor.

[0003] Furthermore, control of calls across different communication path devices is performed by input/output programs and internal processing programs within the respective processors.

On the other hand, in a multiprocessor switching system, one processor (not shown) for maintenance and operation is usually installed in addition to a processor for handling call processing.

[0005]

[Problems to be Solved by the Invention] In this conventional multiprocessor switching system, the input/output program and the internal processing program execute call processing within the same processor regardless of the load on each processor. There was a problem in that the overall load could be biased towards a particular processor.

[0006] Furthermore, even within a single processor, if the load balance between input/output programs and internal processing programs is not equal, the processing capacity of the processor may be surplus but the overall limit may be reached, or There was a problem that the quantity was limited to less than the capacity.

Furthermore, there is a problem in that the processor used for maintenance and operation cannot be used for call processing even when it is in a low efficiency usage state.

[0008]

[Means for Solving the Problems] The multiprocessor switching system of the present invention includes an input/output program that corresponds to communication line equipment and controls subscriber lines and trunks, and an internal processing program that executes call processing services. In a multiprocessor switching system in a storage program controlled switching system including a plurality of first processors, when a call occurs in any one of the plurality of first processors, the input/output program: The multiprocessor exchange method of the present invention is configured to select and start the internal processing program housed in the processor showing the lowest usage efficiency value among all the plurality of first processors, and the multiprocessor exchange method of the present invention A second processor having a processing program and not having the input/output program is provided, and when a call occurs in any of the plurality of first processors, the input/output program controls the use of the second processor. When it is detected that the efficiency value is lower than any of the usage efficiency values of the plurality of first processors, the internal processing program stored in the second processor is selected and activated. You can also do it.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram for explaining a first embodiment of the present invention. In FIG. 1, a storage program-controlled exchange is shown with five connected via a system bus 70.
A system is shown having two processors 41-45, each of which is connected to a subscriber 10.
, trunk 20, and each processor 41-45 is provided with input/output programs 51-55 and internal processing programs 61-65, respectively. In this example, it is assumed that the load on the processor 45 is lighter than on the other processors.

The operation will be explained below. processor 41
The call generated in is first processed by the input/output program 51, and the internal processing program 65 housed in the processor exhibiting the lowest usage efficiency value among the processors 41 to 45 is selected and activated. That is, in this case, the processor 45 with the lightest load at present is selected via a, and from then on,
The input/output program 51 in the processor 41 and the internal processing program 65 in the processor 45 control calls while working together via the system bus 70.

Furthermore, in the example where a call occurs in processor 45, the processor with the lightest load at the time the call occurs is processor 45, and in this case, the processor 45 is connected via b to input/output program 55
and internal processing program 65 work together to control the call.

FIG. 2 is a block diagram for explaining a second embodiment of the present invention. In Figure 2, in the configuration of Figure 1,
An example is shown in which the processor 42 has an internal processing program 62 and no input/output program, for example, a maintenance operation processor. In this example, it is assumed that the usage efficiency of the processor 42 is lower than that of any of the other processors.

The operation will be explained below. processor 41
The generated call is first processed by the input/output program 51, and then the internal processing program 62 housed in the processor exhibiting the lowest usage efficiency value among the processors 41 to 45 is selected and activated. In this case, processor 4
2 is selected, and thereafter, the input/output program 51 in the processor 41 and the internal processing program 62 in the processor 42 control the call while working together via the system bus 70.

[0015]

As explained above, the present invention allows the control of a call that occurs in a certain processor to be controlled not by a specific first processor but by the internal processing program of the first processor, which has a relatively small load at that time. I configured it so that
Local overloads can be prevented because the load is distributed evenly to all processors, and the number of first processors to be installed can be kept to a minimum because the division loss of multiprocessor call distribution is small. It has this effect.

Furthermore, a second processor having an internal processing program and no input/output program is provided, and when a call occurs in one of the first processors, the usage efficiency of this second processor is determined by the second processor handling the call processing. If the internal processing program housed in the second processor is selected and started when the second processor is smaller than any of the first processors, for example, by using this configuration for a maintenance operation processor, call processing can be performed. This has the effect that the system can be used efficiently and the system can be operated efficiently.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining a first embodiment of the present invention.

FIG. 2 is a block diagram for explaining a second embodiment of the present invention.

FIG. 3 is a block diagram for explaining a conventional multiprocessor switching system.

[Explanation of symbols]

10 Subscribers 20 Trunks 31-35 Communication path devices 41-45 Processors 51-55 Input/output programs 61-65 Internal processing program 70 System bus

Claims (2)

[Claims] 1. A storage comprising a plurality of first processors, each of which has an input/output program that corresponds to communication line equipment and controls subscriber lines and trunks, and an internal processing program that executes a call processing service. In a multiprocessor switching system in a program-controlled switch, when a call occurs in any of the plurality of first processors, the input/output program is executed by the lowest processor among all the plurality of first processors. A multiprocessor exchange method characterized in that the internal processing program housed in the processor exhibiting the usage efficiency value is selected and activated. 2. A second processor having the internal processing program and not having the input/output program is provided, and when a call occurs in any of the plurality of first processors, the input/output program is configured to: If it is detected that the usage efficiency value of the second processor is lower than any of the usage efficiency values of the plurality of first processors, select the internal processing program stored in the second processor. 2. The multiprocessor switching system according to claim 1, wherein the multiprocessor switching system is activated by a single processor.