JPH04359324A - Computer system - Google Patents

Abstract

PURPOSE:To efficiently develop and debug a program by connecting corresponding developing and debugging parts to respective sequencers. CONSTITUTION:This system consists of a higher-order computer C having a CRT and plural sequencers PC1 to PCn which are connected to the higher-order computer C through a bus B and are controlled by this computer C. The higher- order computer C is provided with the same number of developing and debugging parts S1 to S3 as various program languages executed in sequencers PC1 to PCn respectively and is provided with a switching part GW which connects corresponding developing and debugging parts to respective sequencers. Consequently, the higher-order computer C switches the developing and debugging part corresponding to the programming language peculiar to each sequencer by the switching part and displays it on the CRT or the like to perform the processing when the program is developed and debugged in the sequencer.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a computer used in the field of factory automation, and an industrial computer system in which a plurality of programmable controllers used as sequencers are connected to this computer. The objective is to improve the ability to efficiently develop and debug programs written in multiple programming languages handled by the system.

0002

[Background Art] Along with technological advances in microcomputers, memories, etc., the functions of sequencers such as programmable controllers have also significantly advanced. is a ladder program, BA
Systems that support multiple programming languages such as SIC and C language in one system are becoming common.

On the other hand, these ladder programs, BA
Equipment for program development, debugging, etc. using SIC, C language, etc. still relies on dedicated equipment that supports only one language, and such dedicated equipment has other information processing capabilities other than program development and debugging. is weak. In addition, such dedicated equipment is usually connected one-to-one with a sequencer through a serial communication system, and in a line where multiple sequencers are connected and operated, a person is required to connect the dedicated equipment to the location where the sequencer is installed. This was inefficient as they had to carry the computer with them when developing and debugging programs. Furthermore, with respect to a sequencer equipped with a processor module that supports a plurality of different programming languages, one dedicated device cannot support the plurality of languages at the same time, which is inconvenient.

0004

[Problems to be Solved by the Invention] The present invention aims to solve such problems of inefficiency and inconvenience, and provides a sequencer equipped with a plurality of sequencers that support different types and multiple programming languages. The objective is to obtain a computer system that allows efficient program development and debugging.

[0005]

[Means for Solving the Problems] The present invention, which has solved the above problems, is a computer comprising a host computer having a CRT, and a plurality of sequencers connected to the host computer via a bus and controlled by the host computer.・In the system, the host computer is provided with development for the number of program languages executed in each of the plurality of sequencers.
The computer system is characterized in that it is provided with a debug section and a switching section that connects the development/debug section corresponding to each of the sequencers.

[0006]

[Operation] When performing programming development and debugging in each sequencer, the computer system of the present invention switches the development/debugging section corresponding to the programming language specific to that sequencer in the upper computer using the switching section, and etc. and process it.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a conceptual diagram of a computer system implementing the present invention. In the system example shown in this figure, bus B connects to host computer C, and via bus B,
n sequencers PC1, PC2, PC3,..., PCn
will be installed. The host computer C is an industrial computer such as a factory computer, and is a multitasking processing device with real-time performance. This host computer C is the first development
It has a debugging section S1, a second development/debugging section S2, and a third development/debugging section S3, and also has a switching section SW that switches these development/debugging sections S1, S2, and S3 and connects them to each sequencer. The computer C further includes a processing control section CNT for controlling processing operations of a first development/debugging section S1, a second development/debugging section S2, and a third development/debugging section S3. A display control unit D such as a CRT is provided as a machine interface. In this diagram, regarding the upper computer C,
Only the minimum necessary components for the present invention are shown. Bus B includes host computer C, sequencer, PC1, and PC.
2, PC3, . . . , PCn. n sequencers PC1 and PC connected to bus B
2, PC3, ..., PCn are assumed to be programmable controllers that operate in a programming language used in the sequence control field, such as BASIC language, ladder language, C language, etc., and each sequencer has contact input/output, This block performs sequence control operations such as lamp lighting. In such a system, usually a host computer C and multiple sequencers PC1, PC2, P
C3, . . . , PCn operate to exchange various information via the bus B and display signals on the display control unit D.

[0008] Here, the first development/debugging section S1, second development/debugging section S2, and third development/debugging section S3 installed in the host computer C are connected to a plurality of sequencers PC1, PC2, PC3. ,..., This is a block that supports the same number of programming languages as those supported by PCn. In this example, sequencer PC1,
The system uses three types of programming languages in PC2, PC3, . The user operates the first development/debugging section S1 and the second development/debugging section S.
2. The third development/debugging section S3 is switched by the switching section SW to develop and debug the sequence control program for each sequencer through these blocks, CRT, keyboard, etc.

Next, the operation of such a computer system will be explained using FIG. 2. Here, in FIG. 1, the first development/debugging section S1 is a host computer C.
Development of a BASIC program set for yourself,
This block is responsible for debugging, and specifically, debugging and debugging for the sequencer connected via bus B.
Provide support and monitoring. The BASIC program of this host computer C can directly access each sequencer. The second development/debugging department S2 is
Development of BASIC programs set in sequencers,
BA in charge of debugging, access programs for communication modules inside each sequencer, various arithmetic processing, etc.
Develop and debug SIC programs. The third development/debugging section S3 is responsible for the ladder/debugging section set in the sequencer.
Program circuit editing, download, upload,
This block performs operation settings, monitoring, debugging, etc. Note that each debug/development department is a functional block diagram corresponding to each software setting environment. In addition, the switching unit SW has three development/debugging units S.
1, S2, and S3 as necessary.

[0010] In the above configuration, the user can, for example, develop a BASIC program in the host computer C that is set to correspond to the sequencer PC1.
When debugging, the switching unit SW connects the sequencer PC1 and the first development/debugging unit S1, and program development and debugging are performed via the keyboard and CRT. Also, the BASIC set inside the sequencer PC2
When developing or debugging a program, be sure to
W connects the sequencer PC2 and the second development/debugging section S2 to perform program development and debugging. Similarly, when developing and debugging the ladder program set inside the sequencer PC2, the switching section SW is used to switch between the sequencer PC2 and the third development program.
It is connected to the debugging section S3 to perform program development and debugging.

As described above, the computer system of the present invention allows a computer installed on the upper level to develop and debug programs for the lower sequencer.

0012

As described above, the computer system of the present invention provides the following effects. Since the host computer can support the development of multiple programming languages, it is possible to simultaneously develop and debug programs for multiple sequencers connected on the network. Since the information processing language in the host computer allows direct access to the sequencer, the monitoring function of sequence control can be strengthened. In addition, by operating I/O relays and the like from a host computer, simulation can be performed offline. Furthermore, in addition to the above, when constructing a system, programs can be developed and debugged in a manner closer to that during operation, and even during system operation, troubles can be dealt with on the host computer side without having to carry around program development equipment and debugging equipment. Incidentally, when the BASIC program and the ladder program are working together, it is not possible to take efficient measures without a system such as the present invention.

[Brief explanation of the drawing]

FIG. 1 is a diagram representing a computer system implementing the present invention.

FIG. 2 is a diagram for explaining the operation of the system of the present invention.

[Explanation of symbols]

C. Upper computer S1 First development/debugging department S2 Second development/debugging department S3 Third development/debugging department CNT processing control unit SW switching section D Display control section B Bus

Claims (1)

[Claims] [Claim 1] A host computer having a CRT;
In a computer system comprising this host computer and a plurality of sequencers that are connected via a bus and controlled by the host computer, the host computer is provided with information in accordance with various program languages executed by each of the plurality of sequencers. , a computer system comprising development/debug sections for the number of programming languages, and a switching section for connecting the development/debug sections corresponding to each of the sequencers.