JPH043588A - Solid-state image pickup element - Google Patents

Abstract

PURPOSE:To amplify a signal charge and to improve the S/N by providing a current integration means to a signal output line. CONSTITUTION:A current integration circuit 7 integrating a signal charge flowing to a vertical output line 3 is provided and a capacitor 7-2, an operational amplifier 7-1 and a MOS transistor(TR) 7-3 to apply interrupt and connection control between an output and an input of the operational amplifier 7-1 are provided. Thus, a signal charge QS outputted from a photoelectric conversion element 1 to the vertical signal output line is amplified into QS.CT/Cf (where CT is a capacitor connecting to a signal output line 3, and Cf is a capacitor 7-2 of the current integration circuit 7, and the relation of CT>>Cf exists). Thus, the deterioration in the S/N due to thermal noise on the horizontal output lien 3 is sufficiently reduced.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a solid-state imaging device, and particularly to a solid-state imaging device that outputs a signal from each photoelectric conversion element from a signal output line to which a plurality of photoelectric conversion elements are connected. Regarding equipment.

[Prior Art] FIG. 5 is a circuit diagram showing a conventional two-dimensional MO3 type solid-state imaging device.

In Fig. 5, 1 is a MOS transistor which is a unit pixel (one photoelectric conversion element) having a train capacitance in its drain region, 2 is a horizontal drive line for selecting a sensor row, and 3 is a signal from a pixel. The vertical output line to be read, 4, is a vertical output 1! by the output pulse from the horizontal shift register. 3 is a MOS transistor for switching, 5 is a horizontal output line, and 6 is a preamplifier for integrating a signal current.

Next, this operation will be briefly explained.

A control signal is output from the vertical shift register to the gate of the MOS transistor in the pixel section, and MOS transistor 1 is in the OFF state except when reading signals, and the floating drain capacitor is filled with light generated by incident light. Canoa is accumulated. When a certain row is selected by the vertical shift register, the MOS transistor connected to the horizontal drive line of that row is turned on, and the photocarriers accumulated in the pixels are transferred to the vertical It is output to output line 3. Next, the switching MOS transistors 4 are sequentially turned on by the output of the horizontal shift register, so that the optical signals on the vertical output line 3 are sequentially guided to the horizontal output line 5, and the pixel signals are sequentially output from the preamplifier 6. . The horizontal output line 5 is fixed to a constant potential by a preamplifier 6 via a resistor. Therefore, the vertical output line 3 is
It is reset to a constant potential via the OS transistor 4.

As described above, a two-dimensional solid-state imaging device can be configured with a simple structure using only one MOS transistor in the pixel section.

[Problems to be Solved by the Invention] However, the conventional MO3 type solid-state imaging device described above had the following problems.

(1) For horizontal signal transfer, after one vertical output line is selected, the vertical output line is floating during the period when it is selected again (IH period). At this time, excess charge leaks to the vertical output line from the pixel that is irradiated with strong light. This excess carrier acts as a false signal (smear).
It appears as vertical white streaks on the screen. Since the smear collection period is long with IH, this false signal component is large (conventional M
This has been one of the issues faced by O3 solid-state imaging devices.

(2) If the value of the drain capacitance of the pixel portion is C1, the value of the vertical output line capacitance is Cv, and the value of the horizontal output line capacitance is CH, the thermal noise in each is 5rπ5rπ and 3rC.

The total noise is 57 times with 1 stone and 5 times, and the signal charge is Q-
Then, the S/N ratio is 0871<T(Cs+Cv+C
5)-. Cv, C, is C.

This thermal noise is usually about two orders of magnitude larger than that of S/
The problem was that the N ratio was poor.

[Means for Solving the Problems] A solid-state imaging device of the present invention outputs a signal from each photoelectric conversion element from a signal output line to which a plurality of photoelectric conversion elements are connected. The present invention is characterized in that a current integrating means is provided.

[Function] Hereinafter, the function of the present invention will be explained by taking as an example the case where the present invention is used in a two-dimensional solid-state imaging device. Note that similar effects can be obtained by using the present invention with respect to a -dimensional solid-state imaging device.

By providing a current integration means in the vertical signal output line of a two-dimensional solid-state imaging device according to the present invention, signal charge Q is outputted from the photoelectric conversion element to the vertical signal output line.

is Q, ・CT/C, (CT is the storage capacitor connected to the signal output line, C2 is the capacitance of the current integration means, and Cy>>C
r), so the thermal noise F of the horizontal output line CM
It becomes possible to sufficiently reduce the deterioration of the S/N ratio due to rC.

Furthermore, in addition to the current integrating means, a first accumulating means that accumulates the output of the current integrating means when a signal is not output, and a second accumulating means that accumulates the output of the current integrating means when a signal is output. By providing a subtraction means for subtracting the output from the first storage means and the output from the second storage means, it is possible to remove thermal noise from the vertical output line. .

The effect of removing thermal noise FrU will be explained below.

The output (0,) of the current integrating means during non-signal output is:
This results in noise (vo) due to the current integration means and thermal noise (Va) due to the amplified vertical signal output line. On the other hand, the output (02) of the current integrating means at the time of signal output is the noise (
vo) and the signal component Gs/ amplified by thermal noise (Va)
Gf is added. Output 0. is accumulated in the first accumulating means, the output O7 is accumulated in the second accumulating means, and the subtracting means subtracts the output 02 and the output 0□, the noise ■. and thermal noise Va can be removed.

Therefore, due to the effect of reducing the deterioration of the S/N ratio due to the thermal noise 5r of the horizontal output line CH mentioned above and the effect of removing the thermal noise ErC of the vertical output line, the S/N ratio is
Q* becomes 15rC.

In addition, signal readout of the photoelectric conversion element is performed within a short period of time during the horizontal blanking period, and the signal on the storage capacitor CA, which is not affected by excess charge, is transferred horizontally, so smear is significantly reduced. Ru.

[Example] Hereinafter, an example of the present invention will be described in detail using the drawings.

Note that although the present invention is not necessarily limited to a MOS solid-state imaging device, it is suitably used in a MOS solid-state imaging device, so the following embodiments will be described with respect to a MOS solid-state imaging device.

FIG. 1(A) is a circuit configuration diagram of a two-dimensional MOS type solid-state imaging device of the present invention, and FIG. 1(B) is a configuration diagram of a current integration circuit.

Components that are the same as those of the two-dimensional MOS type solid-state imaging device shown in FIG. 4 are given the same reference numerals, and description thereof will be omitted.

In FIG. 1(A) and FIG. 1(B), 7 is a current integrating circuit that integrates the signal charge flowing into the vertical output line 3, 7-1 is an operational amplifier, and 7-2 is a current integrating circuit that integrates the signal charge flowing into the vertical output line 3. The capacitor 7-3 is a MOS transistor for controlling connection and connection between the output and input of the operational amplifier 7-1. In FIG. 1(A), 11 is a MOS transistor 7
A terminal for applying a pulse to the gate of -3, 8-1.
8-2 both have a capacity of CA, 9-1゜9-
2 is the output of the current integrator circuit 7 with a capacity of 8-1.8-
MOS transistor for transfer to 2, 12-1.1
2-2 are terminals for applying control pulses to the gates of MOS transistors 9-1 and 9-2, respectively; 5-1.5-
2 is the horizontal output line, 4-1.4-2 is the capacitance 8-1.8-2
6-1.6-2 is a preamplifier, 1.0-1.10-2 is a preamplifier 6-2, and 6-1.6-2 is a preamplifier, respectively.
This is a terminal for outputting the sensor output from 1.6-2.

Next, the operation of this two-dimensional MOS type solid-state imaging device will be explained using the timing chart of FIG.

During the horizontal blanking period, first, MO from terminal 11
A pulse P++ is applied to the gate of the S transistor 7-3, and the offset potential of the operational amplifier 7-1 is applied to the vertical output line 3.
is reset. When the MOS transistor 7-3 is turned off, the vertical output line 3 becomes floating, and the output of the operational amplifier 7-1 has an offset potential (vo) plus a potential (Va) that amplifies the thermal noise of the vertical output line 3. Become something. In this state, a pulse P applied from terminal 12-1
12-1 turns on MOS) transistor 9-1.
state, and the output potential (vo +VT) of the operational amplifier 7-1 is stored in the capacitor 8-1. Next, the horizontal drive line 2 is selected by the vertical shift register, a pulse P2 is applied, and a photocharge is output from the pixel (photoelectric conversion element) to the vertical output line 3. If the amount of photoelectric charge is Q6, then the operational amplifier 7-
The output of 1 is the sum of the offset potential (vo) and the potential (Vt) at which the thermal noise of vertical output line 3 is amplified, plus the potential (v, +VT +Qm) with Q −/Ct added.
/C2). Next, the pulse P I2-1 applied from the terminal 12-2 turns on the MOS transistor 9-2.
state, and the signal output potential of this operational amplifier 7-1 is stored in the capacitor 8-2. Next, during the horizontal transfer period, the output pulse from the horizontal shift register causes the capacitance to 8-1.
．． The charges accumulated in 8-2 pass through MOS transistors 4-1, 4-2, and are output to horizontal output lines 5-1, 5-2.
2 to the preamplifier 6-1.6-2, terminal 10
-1.Output at 10-2. The final sensor signal is obtained by (output from 10-2) - (output from 10-1), and by this subtraction process, the offset potential (■.) of the current integration circuit 7 and the vertical output line 3 are Thermal noise (■a) is removed. The signal charge accumulated in the capacitor 8-2 is C/C
,・Q6, but if the design is such that CT>Cf, thermal noise 5"; The thermal noise in the pixel 5rπ can be ignored.
Since also CA/C, is amplified, the final S/N ratio is Q, /'iG, but 3rπ;rC, which was the dominant factor of noise in conventional sensors, is eliminated from the factor. A high S/N ratio can be obtained.

Regarding smear, the period from the end of reading the (offset) + (noise) potential (Vo+Va) to the capacitor 8-1 until the end of reading the signal potential to the capacitor 8-2, that is, the period of the pulse P +z-+ Pulse P 1m from falling
A false signal is generated due to excess charge leaking from the pixel that is irradiated with strong light during the falling period of −2. Conventionally, this false signal generation period was long as the IH period, which is the combination of the horizontal blanking period and the horizontal transfer period, but in the present invention, it is shortened to a part of the horizontal blanking period, and the smear is also sufficiently reduced. suppressed small.

In the embodiment of the present invention described above, by removing the thermal noise of the vertical output line and improving the deterioration of the S/N ratio due to the thermal noise of the horizontal output line, the thermal noise of the pixel, which is the main cause of noise, is reduced as follows. This can be removed by creating a pixel structure.

FIG. 3 is a vertical cross-sectional view showing the pixel structure. In the figure, 21 is a drain where photocarriers are accumulated, and 22 is a gate connected to the horizontal drive line 2.

23 is a source connected to the vertical output line 3; 24 is a substrate having a conductivity type opposite to that of the source 23 and the drain 21;
5 is a thick oxide film for separating pixels, and 26 is an insulating film. In such a pixel structure, the impurity concentration of the drain 21 is low (controlled), and when reading out photocarriers, that is, when the drain 21 is reset, the potential of the drain 21 rises toward the potential of the source 23. becomes equal to the potential of the source 23, the drain 21
is completely depleted and there are no majority carriers. With such a pixel structure, the fluctuation in the number of carriers when the pixel is reset, that is, the thermal noise of the pixel, becomes O. By combining such a pixel structure with the sensor circuit system in the embodiment described above, the S/N ratio becomes Q, ・C a / cr * T (Ct + CM), so if CT2Cv, S /N ratio is 07702 times higher than that of conventional two-dimensional solid-state imaging devices, resulting in extremely high S/N ratio.
A two-dimensional solid-state imaging device having a high ratio can be provided.

FIG. 14 is a schematic configuration diagram of a solid-state imaging device to which the present invention is applied.

In the figure, an image sensor 201 in which optical sensors are arranged in an area is subjected to television scanning by a vertical scanning section 202 and a horizontal scanning section 203.

The signal output from the horizontal scanning section 203 is sent to the processing circuit 20.
4 and output as a standard television signal.

Drive pulse φ for vertical and horizontal scanning units 202 and 203
HB, φ old φ82. φvIIl φVl, φ
The motor 2 and the like are supplied by a driver 205. The driver 205 is also limited by the controller 206.

[Effects of the Invention] As described in detail above, according to the solid-state imaging device of the present invention, by providing the current integrating means in the signal output line, the signal charge output to the signal output line is amplified and the S/N is increased. The ratio can be improved.

It should be noted that a current integrating means connected to the signal output line, a first accumulating means for accumulating the output of the current integrating means when a signal is not output, and a second accumulating means for accumulating the output of the current integrating means when a signal is output. By providing a storage means and a subtraction means for subtracting the output from the first storage means and the output from the second storage means, thermal noise due to the signal output line can be removed. Further, the S/N ratio can be improved, and generation of false signals (smear) caused by excessive charge leakage from the photoelectric conversion element can be suppressed.

[Brief explanation of drawings]

FIG. 1(A) is a circuit configuration diagram of an embodiment of the two-dimensional MOS type solid-state imaging device of the present invention, and FIG. 1(B) is a configuration diagram of a current integration circuit. FIG. 2 is a timing chart for explaining the operation of the two-dimensional MOS type solid-state imaging device. FIG. 3 is a vertical cross-sectional view showing the pixel structure. FIG. 4 is a schematic configuration diagram of a solid-state imaging device to which the present invention is applied. FIG. 5 is a circuit diagram showing a conventional two-dimensional MOS type solid-state imaging device. In the figure, 1...MOS transistor serving as a unit pixel (photoelectric conversion element), 2...Horizontal drive line, 3...Vertical output line, 4.4-1.4-2...MOS) transistor, 5.
5-1.5-2...Horizontal output line, 6.6-1゜6-2
...Preamplifier, 7...Current integration circuit, 8-1.8
-2...Capacitance, 9-1.9-2...MOS transistor, 10-1.10-2...Output terminal, 11...
Input terminal, 12-1.12-2... Input terminal, 21.
...Drain, 22...Gate, 23...Source,
24... Base, 25... Oxide film, 26... Insulating film.

Claims (2)

[Claims] (1) A solid-state imaging device that outputs a signal from each photoelectric conversion element from a signal output line to which a plurality of photoelectric conversion elements are connected, characterized in that the signal output line is provided with current integrating means. Device. (2) In a solid-state imaging device that outputs a signal from each photoelectric conversion element from a signal output line to which a plurality of photoelectric conversion elements are connected, a current integrating means connected to the signal output line, and a current integrating means when not outputting a signal. a first accumulation means for accumulating the output of the current integration means; a second accumulation means for accumulating the output of the current integration means when outputting a signal; and an output from the first accumulation means and the second accumulation means. 2. The solid-state imaging device according to claim 1, further comprising subtraction means for subtracting the output from the storage means.