JPH04358493A - Bipolar signal drive/receive system - Google Patents

Abstract

PURPOSE:To use a secondary winding of a pulse driver in common for transmission and reception, to make the capacity of a driver circuit small, to reduce waveform distortion and to prevent an overcurrent or the like by connecting the secondary winding of a pulse transformer to the driver circuit and a receiver circuit alternately via an analog switch. CONSTITUTION:The winding 5S of the pulse transformer 5 having the secondary winding 5S and a primary winding 5P corresponding to signal lines 1A, 1B leading to a subscriber circuit or the like of a digital exchange is connected to a drive circuit 2 and a receiver circuit 3 via 1st-3rd analog switches 10-12 and 4th and 5th analog switches 13, 14 respectively. When the switches 10-12 are turned on, the switches 13, 14 are turned off and while the circuit 3 is disconnected from the winding 5S, a bipolar signal transmission control signal is fed to the circuit 2, the winding 5S is used in common for transmission and reception, a small drive capacity is attained for the driver circuit, waveform distortion is reduced and an overcurrent at power application is prevented.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar signal drive/receive system using a single pulse transformer for both the primary and secondary windings. In a subscriber system in a digital switching network, necessary data is exchanged by transmitting and receiving AMI signals between a subscriber circuit in a digital exchange and a subscriber terminal device. A ping-pong transmission method is used as a conventional data signal transmission method between the subscriber circuit and the subscriber terminal device.

0002

2. Description of the Related Art A ping-pong transmission system is shown in FIG. In the driver/receiver circuit 32 shown in this figure, as shown in FIGS. 4 and 5, a pulse transformer 35 is configured such that a driver circuit (DV) 33 and a receiver circuit (RV) 34 each have a secondary winding. ing. The middle point 39 of the secondary winding 37 is connected to the drive voltage terminal Vcc of the driver/receiver circuit 32 via a lead wire 40.

FIG. 6 is a detailed diagram of the driver circuit 33 in the driver/receiver circuit 32, and FIG. 7 is a detailed diagram of the receiver circuit 34. In FIGS. 5 and 6, the output DVA of the driver circuit 33P is set to a low voltage level "L" in order to send out (that is, drive) the positive pulse of the AMI signal via the two subscriber lines 41 and 42. do. This transition of the output DVA to the low voltage level "L" is caused as follows. When the positive pulse transmission control signal SNDP shown in FIG. 6 is set to a low level "L", the PNP transistor Q1 is turned on, the NPN transistor Q2 is turned off, and this in turn turns on the NPN transistor Q5. By turning on the NPN transistor Q6, the aforementioned transition of the output voltage level DVA to the low level "L" is caused. NPN transistor Q3 and PNP transistor Q4 are used to prevent saturation of NPN transistor Q6.

[0004] Then, a current flows through the energizing path from the drive voltage terminal Vcc to the secondary winding 39 of the pulse transformer 35 to the output DVA. voltage is generated. Also, A.M.
In order to send (that is, drive) the negative component of the I signal through the two subscriber lines 41 and 42, the output DVB of the driver circuit 33M is set to a low voltage level "L". Since the driver circuit 33M is configured similarly to the driver circuit 33P, it simply receives the negative side pulse transmission control signal S.
When NDM is brought to a low level "L", a low voltage level "L" is generated at the output DVB in the same manner as described above. As a result, current flows through the energizing path from the drive voltage terminal Vcc to the secondary winding 39 of the pulse transformer 35 to the output DVB, that is, the current direction in the secondary winding 39 flows in the opposite direction, so that the pulse transformer 35 A voltage from terminal B to terminal A is generated in the primary winding of .

By alternately repeating the above-described driving of the pulse transformer 35, the above-mentioned AMI signal can be transmitted via the two subscriber lines 41 and 42.

[0006]

The driver/receiver circuit 32 as described above has the following drawbacks due to its structure. This driver/receiver circuit 32 can transmit the AMI signal in the manner described above, but the load applied to the driver circuit 33 when driving the driver circuit 33 to generate the AMI signal is one of the pulse transformers 35. Not only the next line impedance and the terminal equipment, but also the receiver circuit 34 due to the coupling from the primary winding to the secondary winding 38.

Therefore, the driving ability of the driver circuit 33 is:
It was necessary to construct the device with sufficient capacity to drive all the loads added as described above. As described above, since individual windings are provided for the driver circuit 33 and the receiver circuit 34, the number of windings increases and the interlayer capacitance also increases. The release of the electrical energy stored in the interlayer capacitance increases the bounce characteristics of the pulse, resulting in increased waveform distortion.

[0008] Furthermore, there is the following problem when the power is turned on. This is the positive pulse transmission control signal SN when the power is turned on and the digital exchange enters the operating state.
DP is transitioned to a high level "H", but the PNP transistor Q1 is turned off. However, in the transient state, the NPN transistor Q2 remains off while the voltage value of the drive power supply Vcc does not rise to a predetermined circuit drive voltage value. Therefore, the NPN transistor Q5 and the NPN transistor Q6 are sequentially turned on, and a large current flows through the current path from the drive power supply Vcc to the secondary winding 37 of the pulse transformer 35 to the output DVA.

When such an operation occurs in each subscriber circuit installed in a digital exchange, an excessive current flows out from the DC power supply supplying the drive voltage to the drive voltage terminal Vcc. , the protection circuit of this DC power supply operates and causes a power supply failure, which spreads to system down. The present invention was created in view of the above technical problems, and at the same time, the secondary winding of the pulse transformer can be used for transmission and reception, while the drive capacity of the driver circuit can be reduced, the waveform distortion can be gradually reduced, and the excessive current at power-on can be reduced. The object of the present invention is to provide a bipolar signal drive/receive system that achieves energization prevention.

0010

SUMMARY OF THE INVENTION FIG. 1 shows a block diagram of the principle of the present invention. As shown in this figure, in the present invention, two signal lines 1 are connected via a driver circuit 2 and a receiver circuit 3.
A, 1B and the inside of the transmitting/receiving device are connected to the circuit that includes the following components, namely, a primary winding 5P that connects each of the signal lines 1A, 1B to the corresponding winding ends, and a first connection. A pulse transformer 5 having a secondary winding 5S connects the driving power source to the midpoint via a path 4, and each of the two winding ends of the secondary winding 5S is connected to a corresponding output end of the driver circuit 2. Second and third connection paths 6 and 7, and fourth and fifth connection paths 8 and 9 that connect each of the two winding ends of the secondary winding 5S to the corresponding input end of the receiver circuit 3. and first to fifth analog switches 10, 11, 12, 13, 1 interposed in the first to fifth connection paths 4, 6, 7, 8, 9.
4 for on/off control of the first, second, and third analog switches 10, 11, and 12, and for on/off control of the first, second, and third analog switches 10, 11, and 12. The fourth and fifth analog switches 13 and 14 are selectively turned on/off in response to the /off control.

[0011]

[Operation] When operating the driver circuit 2 to send bipolar signals onto the signal lines 1A and 1B, the first, second, and third analog switches 10, 11, and 12 are turned on. The fourth and fifth analog switches 13 and 14 are turned off. In this manner, the bipolar signal sending control signal is supplied to the driver circuit 2 in a state where the receiver circuit 3 is disconnected from the secondary winding 5S of the pulse transformer 5.

Therefore, the receiver circuit 3 does not become a load on the driver circuit 2. Therefore, the driving ability of the driver circuit 2 can be reduced accordingly. Further, since the number of windings of the pulse transformer 5 driven by the driver circuit 2 is smaller than that of the conventional case by the number of windings of the receiving winding, waveform distortion is also reduced accordingly. Also, 2 via signal lines 1A and 1B.
When receiving a polarity signal, the first, second, and third
The analog switches 10, 11, and 12 are turned off, and the fourth and fifth analog switches 13 and 14 are turned on. The received bipolar signal is therefore detected in the receiver circuit 3 in a known manner. In this case, the waveform distortion is also reduced compared to the conventional method, as described above.

In this way, the secondary winding of the pulse transformer 5 is commonly used for transmitting and receiving bipolar signals. Further, if the first analog switch 10 is set to OFF when the power is turned on, it helps to prevent an excessive current from flowing in, which would otherwise occur in a conventional driver/receiver circuit.

[0014]

Embodiment FIG. 2 shows an embodiment of the present invention. The driver/receiver circuit 20 of this embodiment includes a pulse transformer 2
1, analog switch 22, analog switch 23, analog switch 24, analog switch 25, analog switch 26, driver circuit 33, and receiver circuit 3
Consists of 4. The pulse transformer 21 has a primary winding 2
1P, and a secondary winding 21S. Analog switch 22, analog switch 23, analog switch 24, analog switch 25, and analog switch 26 are connected as shown in the figure, and are all known analog switches. 24 are both open when the transmission/reception switching signal SRSL is at a low level "L" and closed when the transmission/reception switching signal SRSL is at a high level "H". Both the analog switch 25 and the analog switch 26 have the transmission/reception switching signal SRSL at a high level “H”.
The driver circuit 33 and receiver circuit 34 are the same as those described in the [Prior Art] section. .

In FIGS. 2, 4, 6, and 7, 2
The subscriber lines 41 and 42 correspond to the signal lines 1A and 1B in FIG. The driver circuit 33 is similar to the driver circuit 2 in FIG.
The receiver circuit 34 corresponds to the receiver circuit 3 in FIG.
corresponds to Pulse transformer 21 corresponds to pulse transformer 5 in FIG. The primary winding 21P corresponds to the primary winding 5P in FIG. 1, and the secondary winding 21S corresponds to the secondary winding 5S in FIG.
corresponds to The middle point of the secondary winding and the drive voltage terminal Vcc
The connection line with corresponds to the first connection path 4 in FIG. 2
A connection line between one winding end of the next winding 21S and the output DVA of the driver circuit 33 corresponds to the second connection path 6 in FIG.
The connection line between the other winding end of the secondary winding 21S and the output DVB of the driver circuit 33 corresponds to the third connection path 7 in FIG. A connection line between one winding end of the secondary winding 21S and the input RVA of the receiver circuit 34 corresponds to the fourth connection path 8 in FIG. The connection line of the circuit 34 to the input RVB corresponds to the fifth connection path 9 in FIG. analog switch 22, analog switch 23,
The analog switch 24, the analog switch 25, and the analog switch 26 correspond to the first to fifth analog switches 10, 11, 12, 13, and 14 in FIG. 1, respectively.

Driver/receiver circuit 2 having this configuration
The operation of 0 will be explained below. Driver/receiver circuit 2
If the transmission/reception switching signal SRSL is switched to the low level "L" when the power is turned on, the excessive current as explained in the [Prior Art] section will pass from the drive voltage terminal Vcc through the pulse transformer 21 to a low level. It is possible to prevent the signal from flowing to the output DVA or output DVB.

In this way, when the driver circuit 33 of the driver/receiver circuit 20 that has entered the operating state sends out the AMI signal onto the subscriber lines 41 and 42,
The transmission/reception switching signal SRSL is switched to a high level "H". Therefore, analog switch 22, analog switch 23, and analog switch 24 are all closed, and driver circuit 33 is connected to primary winding 21S of pulse transformer 21.

Therefore, in the same way as explained in the [Prior Art] section, the plus side pulse transmission control signal SNDP,
By alternately switching the minus side pulse transmission control signal SNDM to a low level "L", the AMI signal can be transmitted onto the subscriber lines 41 and 42 via the pulse transformer 21. The AMI signal thus transmitted is transmitted in a burst format, and the relationship between the transmission burst and the transmission/reception switching signal SRSL is shown in FIG. This AM
Since the analog switch 25 and the analog switch 26 are both open when the I signal is sent onto the subscriber lines 41 and 42, the receiver circuit 34 as in the conventional case is not used.
However, it is possible to prevent this from acting on the driver circuit 33 as a load similar to that on the terminal device side.

When the driver/receiver circuit 20 receives an AMI signal from a terminal device via the subscriber lines 41 and 42, the transmission/reception switching signal SRSL is switched to a high level "H". the received AMI
The signal is received in a burst format, and the relationship between the received burst and the transmission/reception switching signal SRSL is shown in FIG. As shown in FIG. 3, the timing of switching between transmission and reception is set to occur at the time necessary to provide sufficient margin for reception of the reception burst, for example, approximately 3 microseconds before the reception time of the reception burst. Ru. By switching the transmission/reception switching signal SRSL to the high level "H", the analog switch 22, the analog switch 23, and the analog switch 24 are all opened, while the analog switch 25 and the analog switch 26 are all opened. , is closed, the voltages V1 generated in the secondary windings of the pulse transformer 21, which are energized by the AMI signal, with alternately different polarities are input to the receiving inputs RVA and RVB. When voltage V1 is in the direction from receiving input RVB to receiving input RVA,
PNP transistor Q1' is turned on,
Thus, the pulse detection circuit 50 generates a pulse detection output. Voltage V1 is applied from receiving input RVA to receiving input R
When in the direction to VB, the PNP transistor Q
2' is turned on, and thus the pulse detection circuit 50 generates a pulse detection output.

As described above, the primary winding 21P and the secondary winding 21S of the pulse transformer 21 can be used both for transmitting the AMI signal and for receiving the AMI signal. In the above embodiment, the case of a subscriber circuit of a digital exchange has been described, but the present invention can also be implemented in other similar bipolar signal transmission/reception systems.

[0021]

As explained above, according to the present invention, the secondary winding of the pulse transformer is selectively connected to the driver circuit and the receiver circuit via the analog switch. The secondary winding of the driver circuit can be shared by the driver circuit and the receiver circuit, and the receiver circuit can be prevented from becoming a load on the driver circuit, preventing the influence on the driver performance and reducing waveform distortion. It can also be reduced. Furthermore, excessive current is prevented from flowing into the drive power source when the power is turned on.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention.

FIG. 2 is a diagram showing an embodiment of the present invention.

FIG. 3 is a diagram showing a timing chart of an embodiment of the present invention.

FIG. 4 is a diagram showing a conventional subscriber system.

FIG. 5 is a diagram showing a conventional driver/receiver circuit.

FIG. 6 is a diagram showing a conventional driver circuit.

FIG. 7 is a diagram showing a conventional receiver circuit.

[Explanation of symbols]

1A, 1B Signal line 2 Driver circuit 3 Receiver circuit 4 First connection path 5 Pulse transformer 5P primary winding 5S Secondary winding 6 Second connection path 7 Third connection path 8 Fourth connection path 9 Fifth connection path 10 First analog switch 11 Second analog switch 12 Third analog switch 13. Fourth analog switch 14 Fifth analog switch 20 Driver/receiver circuit 21 Pulse transformer 21P Primary winding 21S Secondary winding 22 Analog switch 23 Analog switch 24 Analog switch 25 Analog switch 26 Analog switch

Claims (1)

[Claims] 1. In a circuit that connects two signal lines (1A, 1B) and a transmitting/receiving device via a driver circuit (2) and a receiver circuit (3), each of the signal lines (1A, 1B)
1B) with a primary winding (5P) connecting each to the corresponding winding end, and a secondary winding (5S) connecting the drive power source to the midpoint via the first connection path (4). a transformer (5) and a second winding that connects each of the two winding ends of the secondary winding (5S) to a corresponding output end of the driver circuit (2);
and the third connection path (6, 7), and the secondary winding (5S)
fourth and fifth connection paths (8, 9) connecting each of the two winding ends to a corresponding input end of the receiver circuit (3);
The first to fifth analog switches (10, 11) interposed in the first to fifth connection paths (4, 6, 7, 8, 9)
, 12, 13, 14) and turn on/off the first, second, and third analog switches (10, 11, 12).
OFF control and OFF/OFF control of the fourth and fifth analog switches (13, 14) corresponding to the ON/OFF control of the first, second, and third analog switches (10, 11, 12).
A bipolar signal drive/receive system characterized by selectively generating on-control.