JPH04354396A - Printed wiring board - Google Patents
Printed wiring boardInfo
- Publication number
- JPH04354396A JPH04354396A JP15766691A JP15766691A JPH04354396A JP H04354396 A JPH04354396 A JP H04354396A JP 15766691 A JP15766691 A JP 15766691A JP 15766691 A JP15766691 A JP 15766691A JP H04354396 A JPH04354396 A JP H04354396A
- Authority
- JP
- Japan
- Prior art keywords
- identification mark
- electroless plating
- wiring board
- printed wiring
- adhesive layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007772 electroless plating Methods 0.000 claims abstract description 45
- 239000012790 adhesive layer Substances 0.000 claims abstract description 35
- 239000004020 conductor Substances 0.000 claims abstract description 34
- 239000000853 adhesive Substances 0.000 claims abstract description 19
- 230000001070 adhesive effect Effects 0.000 claims abstract description 19
- 239000010410 layer Substances 0.000 claims description 56
- 239000000843 powder Substances 0.000 claims description 16
- 229920006015 heat resistant resin Polymers 0.000 claims description 13
- 229920005989 resin Polymers 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 12
- 239000011159 matrix material Substances 0.000 claims description 9
- 239000002253 acid Substances 0.000 claims description 7
- 239000011810 insulating material Substances 0.000 claims description 6
- 239000007800 oxidant agent Substances 0.000 claims description 6
- 239000011229 interlayer Substances 0.000 claims description 5
- 150000007513 acids Chemical class 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 12
- 238000000576 coating method Methods 0.000 abstract description 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 28
- 238000007747 plating Methods 0.000 description 19
- 239000003054 catalyst Substances 0.000 description 16
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 15
- 229910052802 copper Inorganic materials 0.000 description 13
- 239000010949 copper Substances 0.000 description 13
- 239000002245 particle Substances 0.000 description 13
- 238000005530 etching Methods 0.000 description 9
- 230000015572 biosynthetic process Effects 0.000 description 8
- 239000000945 filler Substances 0.000 description 8
- 238000007796 conventional method Methods 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 7
- 239000000203 mixture Substances 0.000 description 7
- KRVSOGSZCMJSLX-UHFFFAOYSA-L chromic acid Substances O[Cr](O)(=O)=O KRVSOGSZCMJSLX-UHFFFAOYSA-L 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 6
- AWJWCTOOIBYHON-UHFFFAOYSA-N furo[3,4-b]pyrazine-5,7-dione Chemical compound C1=CN=C2C(=O)OC(=O)C2=N1 AWJWCTOOIBYHON-UHFFFAOYSA-N 0.000 description 6
- RAXXELZNTBOGNW-UHFFFAOYSA-N imidazole Natural products C1=CNC=N1 RAXXELZNTBOGNW-UHFFFAOYSA-N 0.000 description 6
- 229920000647 polyepoxide Polymers 0.000 description 6
- 230000002950 deficient Effects 0.000 description 5
- 238000007689 inspection Methods 0.000 description 5
- 229910052763 palladium Inorganic materials 0.000 description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 5
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 238000007650 screen-printing Methods 0.000 description 5
- 230000003746 surface roughness Effects 0.000 description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000003213 activating effect Effects 0.000 description 4
- 239000003795 chemical substances by application Substances 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000002156 mixing Methods 0.000 description 4
- 238000006386 neutralization reaction Methods 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 238000011161 development Methods 0.000 description 3
- 239000012299 nitrogen atmosphere Substances 0.000 description 3
- 239000009719 polyimide resin Substances 0.000 description 3
- 238000007788 roughening Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- 239000004841 bisphenol A epoxy resin Substances 0.000 description 2
- 230000003197 catalytic effect Effects 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 239000011256 inorganic filler Substances 0.000 description 2
- 229910003475 inorganic filler Inorganic materials 0.000 description 2
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 2
- 229910052753 mercury Inorganic materials 0.000 description 2
- 239000012766 organic filler Substances 0.000 description 2
- 239000005011 phenolic resin Substances 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- POAOYUHQDCAZBD-UHFFFAOYSA-N 2-butoxyethanol Chemical compound CCCCOCCO POAOYUHQDCAZBD-UHFFFAOYSA-N 0.000 description 1
- NQBXSWAWVZHKBZ-UHFFFAOYSA-N 2-butoxyethyl acetate Chemical compound CCCCOCCOC(C)=O NQBXSWAWVZHKBZ-UHFFFAOYSA-N 0.000 description 1
- LWRBVKNFOYUCNP-UHFFFAOYSA-N 2-methyl-1-(4-methylsulfanylphenyl)-2-morpholin-4-ylpropan-1-one Chemical compound C1=CC(SC)=CC=C1C(=O)C(C)(C)N1CCOCC1 LWRBVKNFOYUCNP-UHFFFAOYSA-N 0.000 description 1
- QTWJRLJHJPIABL-UHFFFAOYSA-N 2-methylphenol;3-methylphenol;4-methylphenol Chemical compound CC1=CC=C(O)C=C1.CC1=CC=CC(O)=C1.CC1=CC=CC=C1O QTWJRLJHJPIABL-UHFFFAOYSA-N 0.000 description 1
- GZVHEAJQGPRDLQ-UHFFFAOYSA-N 6-phenyl-1,3,5-triazine-2,4-diamine Chemical compound NC1=NC(N)=NC(C=2C=CC=CC=2)=N1 GZVHEAJQGPRDLQ-UHFFFAOYSA-N 0.000 description 1
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- OWYWGLHRNBIFJP-UHFFFAOYSA-N Ipazine Chemical compound CCN(CC)C1=NC(Cl)=NC(NC(C)C)=N1 OWYWGLHRNBIFJP-UHFFFAOYSA-N 0.000 description 1
- 229920000877 Melamine resin Polymers 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004734 Polyphenylene sulfide Substances 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- ZDNFTNPFYCKVTB-UHFFFAOYSA-N bis(prop-2-enyl) benzene-1,4-dicarboxylate Chemical compound C=CCOC(=O)C1=CC=C(C(=O)OCC=C)C=C1 ZDNFTNPFYCKVTB-UHFFFAOYSA-N 0.000 description 1
- 239000004109 brown FK Substances 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- ZCDOYSPFYFSLEW-UHFFFAOYSA-N chromate(2-) Chemical compound [O-][Cr]([O-])(=O)=O ZCDOYSPFYFSLEW-UHFFFAOYSA-N 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 229930003836 cresol Natural products 0.000 description 1
- 238000007766 curtain coating Methods 0.000 description 1
- 238000003618 dip coating Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229920001971 elastomer Polymers 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 229920003986 novolac Polymers 0.000 description 1
- 239000004843 novolac epoxy resin Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 125000001997 phenyl group Chemical group [H]C1=C([H])C([H])=C(*)C([H])=C1[H] 0.000 description 1
- 229920000069 polyphenylene sulfide Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000007761 roller coating Methods 0.000 description 1
- 239000005060 rubber Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920003051 synthetic elastomer Polymers 0.000 description 1
- 239000005061 synthetic rubber Substances 0.000 description 1
- 239000000454 talc Substances 0.000 description 1
- 229910052623 talc Inorganic materials 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は、高密度プリント配線板
に付与されている識別マークが保護されたプリント配線
板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board in which identification marks provided on the high-density printed wiring board are protected.
【０００２】0002
【従来の技術】近年、電子技術の進歩に伴い、大型コン
ピューターなどの電子機器に対する高密度化あるいは演
算機能の高速化が進められている。その結果、種々のプ
リント配線板が生産されている。このようなプリント配
線には、種々の識別マークが形成されており、例えば、
プリント配線板は、通常大量生産されることから、不良
品発生に対処するべく、製造場所、製造年月日などの製
品の履歴が分かるようにロットナンバーやバーコードが
印刷されている。また、電子回路部品を実装するために
、実装位置をきめるためのターゲットマークも印刷され
ている。さらに、多層プリント配線板には、内層回路が
どの層に形成されるか、また、その形成位置が回路図の
設計値からどの程度ずれているかを確認するためのマー
クなどが付与されている。2. Description of the Related Art In recent years, with advances in electronic technology, electronic devices such as large-sized computers have been made to have higher density and faster calculation functions. As a result, various printed wiring boards have been produced. Various identification marks are formed on such printed wiring, for example,
Printed wiring boards are usually mass-produced, so in order to prevent defective products, lot numbers and barcodes are printed on them so that product history such as manufacturing location and manufacturing date can be identified. In addition, target marks are also printed to determine the mounting position for mounting electronic circuit components. Furthermore, marks are provided on the multilayer printed wiring board to confirm in which layer the inner layer circuit is formed and to what extent the formation position deviates from the design value of the circuit diagram.
【０００３】しかしながら、このような識別マークは、
プリント配線板の表面に印刷されているため、ハンドリ
ングによるキズなどで消えてしまうことがあった。この
ような問題を解決するために、識別マークを形成した後
、ソルダーレジストを識別マーク上に塗布することによ
り保護する方法が用いられている。[0003] However, such identification marks are
Since it is printed on the surface of the printed wiring board, it could be erased due to scratches caused by handling. In order to solve this problem, a method is used in which after forming an identification mark, a solder resist is applied onto the identification mark to protect it.
【発明が解決しようとする問題点】ところが、識別マー
クをソルダーレジストで保護する場合、ソルダーレジス
トの塗布は、工程の最後になるため、工程中のハンドリ
ングで識別マークに欠けや磨耗が発生し、識別マークが
消えてしまうという問題が見られた。[Problems to be Solved by the Invention] However, when protecting the identification mark with a solder resist, the solder resist is applied at the end of the process, so the identification mark may be chipped or worn during handling during the process. A problem was observed where the identification mark disappeared.
【０００４】0004
【問題点を解決するための手段】本発明者等は、前述の
如き問題点を解決すべく種々研究した結果、アディティ
ブ法に使用される無電解めっき用接着剤として透光性の
あるものを使用することにより、従来の工程に新たな工
程を加えることなく、製造工程中のハンドリングにより
発生する識別マークの欠けや磨耗を防止できることを知
見した。また、従来、多層プリント配線板においては、
各内層回路に形成された識別マークや導体回路をＸ線を
用いて検査し、各内層回路に所定の導体回路が形成され
ているか、またその導体回路の形成位置が、回路図の設
計値とどの程度ずれているかを確認していたが、本発明
によりこのような煩雑なＸ線検査が不要になることを知
見するに到った。本発明は、プリント配線板に印刷され
ている識別マークが透光性無電解めっき用接着剤で保護
されてなるものである。[Means for Solving the Problems] As a result of various studies to solve the above-mentioned problems, the present inventors have developed a translucent adhesive for electroless plating used in the additive method. It was discovered that by using this method, it is possible to prevent chipping and abrasion of identification marks caused by handling during the manufacturing process, without adding any new steps to conventional processes. In addition, conventionally, in multilayer printed wiring boards,
The identification marks and conductor circuits formed on each inner layer circuit are inspected using X-rays, and whether the specified conductor circuit is formed on each inner layer circuit and the position where the conductor circuit is formed is compared to the design value of the circuit diagram. Although the amount of deviation was confirmed, it was discovered that the present invention eliminates the need for such a complicated X-ray inspection. In the present invention, an identification mark printed on a printed wiring board is protected with a translucent electroless plating adhesive.
【０００５】[0005]
【作用】以下、本発明を詳細に説明する。本発明は、プ
リント配線板に印刷されている識別マークが透光性無電
解めっき用接着剤にて被服されてなることが必要である
。即ち、絶縁板もしくは、導体回路形成基板に識別マー
クが印刷され、その上に透光性無電解めっき用接着剤層
が形成され、その透光性無電解めっき用接着剤層が粗化
され、その表面に無電解めっきにより導体回路が形成さ
れてなる。このため、識別マークは、透光性無電解めっ
き用接着剤層に保護されるため、ハンドリングによるキ
ズにより消えることはない。しかも、無電解めっき用接
着剤層は透光性であるため、識別マークを目視できる。
また、識別マークを形成した直後に透光性無電解めっき
用接着剤層で保護するため、製造工程中のハンドリング
により、識別マークが損傷することが全くない。また、
製造工程は、従来と同様の工程でよい。本発明のプリン
ト配線板は、多層配線板であってもよく、特にビルドア
ップ多層プリント配線板であることが望ましい。[Operation] The present invention will be explained in detail below. The present invention requires that the identification mark printed on the printed wiring board be covered with a translucent electroless plating adhesive. That is, an identification mark is printed on an insulating plate or a conductive circuit forming board, a translucent electroless plating adhesive layer is formed thereon, and the translucent electroless plating adhesive layer is roughened. A conductive circuit is formed on its surface by electroless plating. Therefore, the identification mark is protected by the transparent electroless plating adhesive layer, so that it will not disappear due to scratches caused by handling. Moreover, since the adhesive layer for electroless plating is translucent, the identification mark can be visually observed. Furthermore, since the identification mark is protected with a light-transmitting adhesive layer for electroless plating immediately after it is formed, the identification mark will not be damaged by handling during the manufacturing process. Also,
The manufacturing process may be the same as the conventional process. The printed wiring board of the present invention may be a multilayer wiring board, and is particularly preferably a build-up multilayer printed wiring board.
【０００６】識別マークを印刷する方法としては、内層
回路形成時に回路と同時に形成する方法が一般的である
。内層回路や識別マークの形成には、アディティブ法、
サブトラクティブ法、転写法などの種々のプロセスが適
用できる。他にスクリーン印刷法で印刷する方法、レー
ザを用いて焼き付ける方法、金型を用いて刻印する方法
などが適用できる。識別マークの上に透光性の無電解め
っき用接着剤を形成する代わりに、透光性の絶縁材料を
形成し、さらにその上に透光性の無電解めっき用接着剤
層を形成してもよい。絶縁材層としては、耐熱性樹脂液
中に無機フィラー、有機フィラーなどを添加したものを
適用できる。無機フィラーとしては、シリカ、アルミナ
、タルク、有機フィラーとしては、エポキシポリイミド
、合成ゴム、ＰＰＳ、テフロンなどが使用できる。
また、マトリックスとフィラーの配合比率は、マトリッ
クス樹脂に対してフィラーを５０ｖｏｌ％以下とするこ
とが望ましい。この理由は、透光性が良好なためである
。マトリックスは感光化してもよい。前記無電解めっき
用接着剤の透光率は、可視光で１０％以上であることが
望ましい。透光性前記無電解めっき用接着剤は、酸もし
くは酸化剤に対して難溶性の透光性の樹脂からなるマト
リックス中に酸もしくは酸化剤に対して可溶性の硬化処
理された耐熱性樹脂粉末が分散してなるものが望ましく
、その耐熱性樹脂粉末は、１）平均粒径２〜１０μｍの
耐熱性樹脂粉末の表面に平均粒径２μｍ以下の耐熱性樹
脂粉末もしくは平均粒径２μｍ以下の無機粉末のいずれ
か少なくとも１種を付着させてなる擬似粒子、２）前記
耐熱性樹脂粉末は、平均粒径２μｍ以下の耐熱性樹脂粉
末を凝集させて平均粒径２〜１０μｍの大きさとした凝
集粒子、３）平均粒径２〜１０μｍの耐熱性樹脂粉末と
平均粒径２μｍ以下の耐熱性樹脂粉末との混合物、から
選ばれることが望ましい。耐熱性樹脂粉末は透光性であ
ることが望ましい。また、透光性前記無電解めっき用接
着剤層中のマトリックスとフィラーの配合比率は、無電
解めっき用接着剤に対してフィラーを５０ｖｏｌ％以下
とすることが望ましく、１０ｖｏｌ％〜４０ｖｏｌ％が
好適である。この理由は、透光性が良好なためである。
また、マトリックスは感光化してもよい。本発明の接着
剤層の面粗度は、ＪＩＳ Ｂ０６０１ Ｒｍａｘ＝
４〜２０μｍが望ましく、１０〜１４μｍが好適である
。この理由は、面粗度が２０μｍより大きい場合、表面
の乱反射で識別マークが目視しにくく、面粗度が４μｍ
より小さい場合、ピール強度が得られないからである。
本発明によれば、前記絶縁材層、接着剤層を形成する方
法としては、例えばローラーコート法、ディップコート
法、スプレーコート法、スピナーコート法、カーテンコ
ート法、スクリーン印刷法、フィルム化した接着剤をラ
ミネートする方法などの各種の手段を適用することがで
きる。[0006] A common method for printing the identification mark is to print it simultaneously with the circuit when forming the inner layer circuit. Additive methods are used to form inner layer circuits and identification marks.
Various processes such as subtractive method and transfer method can be applied. Other methods that can be applied include a method of printing using a screen printing method, a method of burning using a laser, and a method of engraving using a mold. Instead of forming a translucent electroless plating adhesive on the identification mark, a translucent insulating material is formed and a translucent electroless plating adhesive layer is further formed on top of that. Good too. As the insulating material layer, a heat-resistant resin liquid to which an inorganic filler, an organic filler, or the like is added can be used. Examples of inorganic fillers that can be used include silica, alumina, and talc, and examples of organic fillers that can be used include epoxy polyimide, synthetic rubber, PPS, and Teflon. Further, it is desirable that the blending ratio of the matrix and the filler is 50 vol% or less of the filler to the matrix resin. The reason for this is that it has good translucency. The matrix may be photosensitized. It is desirable that the electroless plating adhesive has a light transmittance of 10% or more in visible light. The translucent adhesive for electroless plating has a hardened heat-resistant resin powder that is soluble in acids or oxidants in a matrix made of a translucent resin that is sparingly soluble in acids or oxidants. Desirably, the heat-resistant resin powder is dispersed, and the heat-resistant resin powder is: 1) Heat-resistant resin powder with an average particle size of 2 μm or less or inorganic powder with an average particle size of 2 μm or less on the surface of a heat-resistant resin powder with an average particle size of 2 to 10 μm; 2) The heat-resistant resin powder is agglomerated particles having an average particle size of 2 to 10 μm by agglomerating heat-resistant resin powder with an average particle size of 2 μm or less; 3) It is desirable to choose from a mixture of heat-resistant resin powder with an average particle size of 2 to 10 μm and heat-resistant resin powder with an average particle size of 2 μm or less. It is desirable that the heat-resistant resin powder is translucent. In addition, the blending ratio of the matrix and filler in the light-transmitting adhesive layer for electroless plating is preferably 50 vol% or less of the filler, preferably 10 vol% to 40 vol%. It is. The reason for this is that it has good translucency. The matrix may also be photosensitized. The surface roughness of the adhesive layer of the present invention is JIS B0601 Rmax=
The thickness is preferably 4 to 20 μm, preferably 10 to 14 μm. The reason for this is that when the surface roughness is greater than 20 μm, the identification mark is difficult to see due to diffuse reflection on the surface, and when the surface roughness is greater than 4 μm,
This is because if it is smaller, peel strength cannot be obtained. According to the present invention, methods for forming the insulating material layer and the adhesive layer include, for example, a roller coating method, a dip coating method, a spray coating method, a spinner coating method, a curtain coating method, a screen printing method, and a film adhesive method. Various means can be applied, such as a method of laminating the agent.
【０００７】本発明において用いられる透光性の無電解
めっき用接着剤層を形成する樹脂としては、アクリル樹
脂、フェノール樹脂、エポキシ樹脂、エポキシ変成ポリ
イミド樹脂、ポリイミド樹脂の中から選ばれる何れか少
なくとも一種を使用することが有利である。The resin forming the light-transmitting adhesive layer for electroless plating used in the present invention is at least one selected from acrylic resin, phenol resin, epoxy resin, epoxy-modified polyimide resin, and polyimide resin. It is advantageous to use one species.
【０００８】また本発明において用いられる耐熱性樹脂
粉末としては、エポキシ樹脂、フェノール樹脂、ベンゾ
グアナミン樹脂、ポリイミド樹脂、メラミン樹脂の中か
ら選ばれる何れかくなくとも一種を使用することが有利
である。透光性の無電解めっき用接着剤層の厚さは、５
μｍ以上であれば使用でき、特に１５〜１００μｍが好
適である。As the heat-resistant resin powder used in the present invention, it is advantageous to use at least one selected from epoxy resins, phenol resins, benzoguanamine resins, polyimide resins, and melamine resins. The thickness of the transparent electroless plating adhesive layer is 5
A thickness of 15 to 100 μm is particularly suitable.
【０００９】本発明のプリント配線板は、めっきレジス
トが残存していることが望ましい。この理由は、接着剤
層の表面を粗化すると、粗化面での光の乱反射でロット
ナンバーを目視しにくくなるが、めっきレジストが残存
することにより、このような乱反射を防止でき、目視し
やすくなるからである。[0009] In the printed wiring board of the present invention, it is desirable that plating resist remains. The reason for this is that when the surface of the adhesive layer is roughened, it becomes difficult to visually see the lot number due to diffuse reflection of light on the roughened surface, but the remaining plating resist prevents such diffuse reflection and makes visual inspection difficult. This is because it becomes easier.
【００１０】ついで本発明の構成による多層プリント配
線板について説明する。本発明の多層プリント配線板は
、導体層と層間絶縁剤層が交互に積層されてなる多層プ
リント配線板であって、第ｎ層の導体層には、識別マー
ク（ｎ）が形成され、前記識別マーク（ｎ）の上には層
間絶縁剤層として透光性無電解めっき用接着剤層が形成
され、前記透光性無電解めっき用接着剤層上には、第ｎ
＋１層の導体層が形成されると同時に、識別マーク（ｎ
＋１）が、前記第ｎ層の導体層の識別マーク（ｎ）を多
層プリント配線板の上方もしくは下方から認識できるよ
うに形成されてなることを特徴とする多層プリント配線
板である。前記ｎは自然数（ｎ＝１、２、３ など）
であり、前述の構成が繰り返し形成されていてもよい。
このような構成が必要な理由は、識別マークを多層プリ
ント配線板の上方もしくは下方から観察することにより
、識別マークのずれを測定するだけで、導体回路形成位
置の設計値からのずれを即座に測定でき、また、第何層
にどのような識別マークが形成されているかをチェック
するだけで、誤って形成された内層回路を容易に発見で
き、良品不良品の判別が非常に容易になるからである。
識別マーク（ｎ＋１）が、第ｎ層の導体回路層の識別マ
ーク（ｎ）を多層プリント配線板の上方もしくは下方か
ら認識できるように形成されてなることが必要な理由は
、もしそのような構成でなければ、識別マーク（ｎ）を
多層プリント配線板の上方もしくは下方から観察しよう
としても、識別マーク（ｎ＋１）が障害となり、識別マ
ーク（ｎ）はその機能を失うからである。導体回路は、
透光性無電解めっき用接着剤を形成した後、感光性ドラ
イフィルムを形成し、導体回路と識別マークが印刷され
た露光マスクを密着させ、露光現像してめっきレジスト
を形成した後、無電解めっきを施して導体回路と識別ラ
ベルを同時に形成するのである。導体回路形成位置の設
計値からのずれや内層回路の誤形成の原因は、前記導体
回路と識別マークが印刷された露光マスクの密着位置の
ずれや誤った露光マスクで露光現像するためであり、こ
のため、識別マークの相互のずれや、識別マークを観察
することにより、導体回路形成位置の設計値からのずれ
や内層回路の誤形成を発見できる。本発明は、このよう
な識別マークの相互のずれや、識別マークを直接観察で
きるため、良品不良品の判別を容易に行うことができ、
従来のようなＸ線を用いた検査を不要にできる。Next, a multilayer printed wiring board constructed according to the present invention will be explained. The multilayer printed wiring board of the present invention is a multilayer printed wiring board in which conductor layers and interlayer insulating layers are alternately laminated, and an identification mark (n) is formed on the n-th conductor layer, and the A translucent electroless plating adhesive layer is formed as an interlayer insulating layer on the identification mark (n), and on the translucent electroless plating adhesive layer, the nth
At the same time as the +1 conductor layer is formed, an identification mark (n
+1) is a multilayer printed wiring board characterized in that the identification mark (n) of the n-th conductive layer is formed so as to be recognizable from above or below the multilayer printed wiring board. The above n is a natural number (n=1, 2, 3, etc.)
, and the above-described configuration may be repeatedly formed. The reason why such a configuration is necessary is that by simply observing the identification mark from above or below the multilayer printed wiring board and measuring the deviation of the identification mark, it is possible to immediately detect deviations from the design value of the conductor circuit formation position. By simply checking what kind of identification mark is formed on which layer, you can easily find inner layer circuits that have been formed incorrectly, making it very easy to distinguish between good and defective products. It is. The reason why it is necessary for the identification mark (n+1) to be formed so that the identification mark (n) of the n-th conductor circuit layer can be recognized from above or below the multilayer printed wiring board is that if such a structure Otherwise, even if an attempt is made to observe the identification mark (n) from above or below the multilayer printed wiring board, the identification mark (n+1) will become an obstacle and the identification mark (n) will lose its function. The conductor circuit is
After forming a translucent electroless plating adhesive, a photosensitive dry film is formed, an exposure mask on which a conductive circuit and an identification mark are printed is brought into close contact, and a plating resist is formed by exposure and development. Plating is applied to form the conductor circuit and identification label at the same time. The cause of the deviation of the conductor circuit formation position from the design value and the incorrect formation of the inner layer circuit is due to the deviation of the contact position between the conductor circuit and the exposure mask on which the identification mark is printed, or exposure and development with the wrong exposure mask, Therefore, by observing the mutual displacement of the identification marks and the identification marks, it is possible to discover deviations of the conductor circuit formation position from the designed value and erroneous formation of the inner layer circuit. According to the present invention, since it is possible to directly observe the mutual displacement of the identification marks and the identification marks, it is possible to easily distinguish between non-defective products and defective products.
This eliminates the need for conventional X-ray inspections.
【００１１】ついで本発明の製造方法について述べる。
本発明のプリント板は、次の方法で製造方法されること
が望ましい。１）単層プリント板絶縁板に識別マークを
印刷するか導体回路と同時に識別マークを形成し、その
上に透光性の無電解めっき用接着剤層を形成する。つい
で、無電解めっき用接着剤層を粗化した後、触媒核を付
与し、必要に応じ触媒核の固定化のための熱処理を行う
。さらに、無電解めっきを施して、プリント配線板を製
造する。２）多層プリント配線板（スルーホール形成）
導体回路が形成されている絶縁板に識別マークを印刷す
るか、導体回路と同時に識別マークを形成し、その上に
透光性の無電解めっき用接着剤層を形成する。ついで、
透光性の無電解めっき用接着剤層を粗化した後、ドリル
によりスルーホール用の孔を形成する。次に触媒核を付
与し、必要に応じ触媒核の固定化のための熱処理を行う
。さらに、無電解めっきを施して、スルーホールを有す
る多層プリント配線板を製造する。３）多層プリント配
線板（バイアホール形成）導体回路が形成されている絶
縁層に識別マークを印刷するか、導体回路と同時に識別
マークを形成し、その上に透光性の無電解めっき用接着
剤層を導体回路が露出するように形成する。このための
手段としては、感光性の無電解めっき用接着剤を塗布し
、露光現像する方法が好適である。ついで、透光性の無
電解めっき用接着剤層を粗化した後、次に触媒核を付与
し、必要に応じ触媒核の固定化のための熱処理を行う。
さらに、めっきレジストを形成し、無電解めっきを施し
て、バイアホールを有する多層プリント配線板を製造す
る。透光性の無電解めっき用接着剤層を形成する代わり
に透光性の絶縁材を形成した後、透光性の無電解めっき
用接着剤層を形成してもよい。Next, the manufacturing method of the present invention will be described. The printed board of the present invention is preferably manufactured by the following method. 1) An identification mark is printed on a single-layer printed board insulating board or an identification mark is formed simultaneously with the conductor circuit, and a translucent adhesive layer for electroless plating is formed on the identification mark. Next, after roughening the adhesive layer for electroless plating, catalyst nuclei are applied, and heat treatment is performed to fix the catalyst nuclei, if necessary. Furthermore, electroless plating is applied to produce a printed wiring board. 2) Multilayer printed wiring board (through hole formation)
An identification mark is printed on the insulating plate on which the conductor circuit is formed, or an identification mark is formed simultaneously with the conductor circuit, and a translucent adhesive layer for electroless plating is formed thereon. Then,
After roughening the light-transmitting adhesive layer for electroless plating, holes for through holes are formed using a drill. Next, catalytic nuclei are applied, and heat treatment is performed to fix the catalytic nuclei, if necessary. Furthermore, electroless plating is applied to produce a multilayer printed wiring board having through holes. 3) Multilayer printed wiring board (via hole formation) An identification mark is printed on the insulating layer where the conductor circuit is formed, or an identification mark is formed at the same time as the conductor circuit, and a transparent electroless plating adhesive is applied on top of it. The agent layer is formed so that the conductive circuit is exposed. As a means for this purpose, a method of applying a photosensitive adhesive for electroless plating and exposing and developing is suitable. Next, after roughening the light-transmitting adhesive layer for electroless plating, catalyst nuclei are applied thereto, and heat treatment is performed to fix the catalyst nuclei, if necessary. Furthermore, a plating resist is formed and electroless plating is performed to produce a multilayer printed wiring board having via holes. Instead of forming a translucent adhesive layer for electroless plating, a translucent insulating material may be formed and then a translucent adhesive layer for electroless plating may be formed.
【００１２】本発明によれば、前記無電解めっき用接着
剤層表面を酸あるいは酸化剤処理して粗面化し、無電解
めっきして導体回路が形成される。According to the present invention, the surface of the adhesive layer for electroless plating is treated with an acid or an oxidizing agent to roughen the surface, and electroless plating is performed to form a conductor circuit.
【００１３】本発明において用いられる酸あるいは酸化
剤としては、クロム酸、クロム酸塩、過マンガン酸、オ
ゾン等の酸化性薬液、塩酸、硫酸、硝酸、ふっ化水素酸
などを使用することができる。As the acid or oxidizing agent used in the present invention, chromic acid, chromate, permanganic acid, oxidizing chemicals such as ozone, hydrochloric acid, sulfuric acid, nitric acid, hydrofluoric acid, etc. can be used. .
【００１４】上述の如き処理を繰り返し行うことにより
、識別マークが目視できる限り、さらに多層の導体回路
を有する多層プリント配線板を製造することができる。By repeating the above-described process, it is possible to manufacture a multilayer printed wiring board having more layers of conductor circuits as long as the identification mark is visible.
【００１５】以下、本発明を実施例によりさらに詳細に
説明する。[0015] The present invention will now be explained in more detail with reference to Examples.
【００１６】[0016]
【実施例】実施例１
（１）通常の銅張り積層板を常法によりエッチングして
回路を形成した。この時、ロットナンバーも同時にエッ
チングにより形成した。（２）フェノールノボラック型
エポキシ樹脂（油化シェル製、商品名：Ｅ−１５４）６
０重量部、ビスフェノールＡ型エポキシ樹脂（油化シェ
ル製、商品名：Ｅ−１００１）４０重量部、イミダゾー
ル硬化剤（四国化成製、商品名：２Ｐ４ＭＨＺ）４重量
部、エポキシ樹脂微粉末（東レ製）粒径５．５μｍのも
の１０重量部、粒径０．５μｍのもの２５重量部からな
るものを三本ロールで混練し、ブチルセロソルブアセテ
ートを適量添加して接着剤を得た。マトリックスとフィ
ラーとの体積比率は、１００対２５（フィラーとして２
０ｖｏｌ％）であった。（３）ロットナンバーが形成さ
れた内層回路に、上記接着剤をロールコータを用いて塗
布し、１００℃で１時間、１５０℃で５時間乾燥硬化し
て厚さ５０μｍの接着剤層を形成した。（４）次いでク
ロム酸に１０分間浸漬して、樹脂表面を粗面化し、中和
後水洗した。面粗度は、ＪＩＳ Ｂ０６０１ Ｒｍ
ａｘ＝１０．５μｍであった。（５）この基板にＣＯ２
レーザーを照射して、基板内部の配線層に設けたバッ
ドを露出させた。（６）市販のスズ−パラジウムコロイ
ド触媒に浸漬して活性化した後、窒素雰囲気下、１２０
℃、３０分加熱して触媒を固定化し、ドライフィルムフ
ォトレジストをラミネート、露光現像し、下記の表１に
示す組成の無電解銅めっき液に１５時間浸漬して約３５
μｍの銅めっきを施した後、めっきレジストを除去し、
多層プリント配線板を製造した。EXAMPLES Example 1 (1) A circuit was formed by etching an ordinary copper-clad laminate using a conventional method. At this time, a lot number was also formed by etching at the same time. (2) Phenol novolak type epoxy resin (manufactured by Yuka Shell, product name: E-154) 6
0 parts by weight, 40 parts by weight of bisphenol A epoxy resin (manufactured by Yuka Shell, trade name: E-1001), 4 parts by weight of imidazole curing agent (manufactured by Shikoku Kasei, trade name: 2P4MHZ), epoxy resin fine powder (manufactured by Toray Industries, Ltd.) ) 10 parts by weight of particles with a particle size of 5.5 μm and 25 parts by weight of particles with a particle size of 0.5 μm were kneaded using three rolls, and an appropriate amount of butyl cellosolve acetate was added to obtain an adhesive. The volume ratio of matrix to filler is 100:25 (2 as filler).
0 vol%). (3) The above adhesive was applied to the inner layer circuit on which the lot number was formed using a roll coater, and dried and cured at 100°C for 1 hour and 150°C for 5 hours to form an adhesive layer with a thickness of 50 μm. . (4) Next, the resin surface was roughened by immersing it in chromic acid for 10 minutes, and after neutralization, it was washed with water. Surface roughness is JIS B0601 Rm
ax=10.5 μm. (5) CO2 on this board
A laser was irradiated to expose the pads provided on the wiring layer inside the board. (6) After immersing and activating a commercially available tin-palladium colloidal catalyst, under a nitrogen atmosphere,
℃ for 30 minutes to fix the catalyst, laminated with a dry film photoresist, exposed and developed, and immersed in an electroless copper plating solution with the composition shown in Table 1 below for 15 hours.
After applying μm copper plating, remove the plating resist,
A multilayer printed wiring board was manufactured.
【００１７】実施例２
（１）通常の銅張り積層板を常法によりエッチングして
回路を形成した。この内層回路が形成されている絶縁板
上にスクリーン印刷法により、ロットナンバーを印刷し
た。（２）クレゾールノボラック型エポキシ樹脂（油化
シェル製、エピコート１８０Ｓ）の５０％アクリル化物
６０重量部、ビスフェノールＡ型エポキシ樹脂（油化シ
ェル製、エピコート１００１）４０重量部、ジアリルテ
レフタレート１５重量部、２−メチル−１−〔４−（メ
チルチオ）フェニル〕−２−モルフォリノプロパノン−
１（チバ・ガイギー製、イルガキュアー９０７）４重量
部、イミダゾール（四国化成 ２Ｐ４ＭＨＺ）４重量
部、エポキシ樹脂粉末（東レ製、０．５μｍ）５０重量
部を混合した後、ブチルセロソルブを添加しながら、ホ
モディスパー攪拌機で攪拌した。マトリックスとフィラ
ーとの体積比率は、１１０対５０（フィラーとして３１
ｖｏｌ％）であった。（３）ロットナンバーが形成され
た内層回路に、上記接着剤をロールコータを用いて塗布
し、１００℃で１時間乾燥して厚さ５０μｍの接着剤層
を形成した。（４）前記（３）の処理を施した配線板に
１００μｍΦの黒円および、打抜き切断部位が黒く印刷
されたフォトマスクフィルムを密着させ、超高圧水銀灯
により５００ｍｊ／ｃｍ２ で露光した。これを、クロ
ロセン溶液で超音波現像現像処理することにより、配線
板上に１００μｍΦのバイアホールとなる開口を形成し
た。面粗度は、ＪＩＳ Ｂ０６０１ Ｒｍａｘ＝１
２．０μｍであった。前記配線板を超高圧水銀灯により
約３０００ｍｊ／ｃｍ２ で露光し、さらに１００℃で
１時間、その後１５０℃で３時間加熱処理することによ
りフォトマスクフィルムに相当する寸法精度に優れた開
口を有する層間剤縁層を形成した。次いでクロム酸に１
０分間浸漬して、樹脂表面を粗面化し、中和後水洗した
。
（５）市販のスズ−パラジウムコロイド触媒に浸漬して
活性化した後、窒素雰囲気下、１２０℃、３０分加熱し
て触媒を固定化し、ドライフィルムフォトレジストをラ
ミネート、露光現像し、下記の表１に示す組成の無電解
銅めっき液に１５時間浸漬して約３５μｍの銅めっきを
施し多層プリント配線板を製造した。Example 2 (1) A circuit was formed by etching an ordinary copper-clad laminate using a conventional method. A lot number was printed on the insulating plate on which the inner layer circuit was formed by screen printing. (2) 60 parts by weight of 50% acrylic cresol novolac epoxy resin (Epicoat 180S, manufactured by Yuka Shell), 40 parts by weight of bisphenol A epoxy resin (Epicoat 1001, manufactured by Yuka Shell), 15 parts by weight of diallyl terephthalate, 2-Methyl-1-[4-(methylthio)phenyl]-2-morpholinopropanone-
After mixing 4 parts by weight of 1 (manufactured by Ciba Geigy, Irgacure 907), 4 parts by weight of imidazole (2P4MHZ, manufactured by Shikoku Kasei), and 50 parts by weight of epoxy resin powder (manufactured by Toray Industries, Ltd., 0.5 μm), while adding butyl cellosolve, The mixture was stirred using a Homodisper stirrer. The volume ratio of matrix and filler was 110:50 (31:1 as filler).
vol%). (3) The above adhesive was applied to the inner layer circuit on which the lot number was formed using a roll coater, and dried at 100° C. for 1 hour to form an adhesive layer with a thickness of 50 μm. (4) A photomask film on which a black circle of 100 μmΦ and a punched cut area were printed in black was brought into close contact with the wiring board treated in (3) above, and exposed to light at 500 mj/cm 2 using an ultra-high pressure mercury lamp. This was subjected to ultrasonic development using a chlorocene solution to form an opening that would become a via hole with a diameter of 100 μm on the wiring board. Surface roughness is JIS B0601 Rmax=1
It was 2.0 μm. The wiring board is exposed to light at about 3000 mj/cm2 using an ultra-high pressure mercury lamp, and then heat-treated at 100°C for 1 hour and then at 150°C for 3 hours to produce an interlayer agent having openings with excellent dimensional accuracy equivalent to a photomask film. A marginal layer was formed. Then add 1 to chromic acid
The resin surface was roughened by immersion for 0 minutes, neutralized, and then washed with water. (5) After immersing and activating a commercially available tin-palladium colloidal catalyst, the catalyst was fixed by heating at 120°C for 30 minutes in a nitrogen atmosphere, and a dry film photoresist was laminated, exposed and developed, and the following table was prepared. A multilayer printed wiring board was manufactured by immersing it in an electroless copper plating solution having the composition shown in 1 for 15 hours to plate copper to a thickness of about 35 μm.
【００１８】実施例３
（１）通常の両面銅張り積層板を常法によりエッチング
して回路を形成した。この内層回路が形成されている絶
縁板上にゴム印により、ロットナンバーを印刷した。
（２）ビスフェノールＡ型エポキシ樹脂 Ｅ−８２８
（油化シェル製）１００部と、シリカ微粉末（アドマフ
ァイン Ｓ０−２５Ｈ アドマティクッス製）５０
ｖｏｌ％、平均粒径０．５μｍを３本ローラで混合して
絶縁製樹脂を調整した。スクリーン印刷で、この絶縁性
樹脂を５０μｍ塗布した後、実施例１で調整した接着剤
を同様にスクリーン印刷を用いて２０μｍ塗布した。つ
いで１００℃で１時間、１５０℃で５時間乾燥硬化して
厚さ５０μｍの接着剤層を形成した。（４）次いでクロ
ム酸に１０分間浸漬して、樹脂表面を粗面化し、中和後
水洗した。（５）この基板にドリルでスルーホール用の
孔を形成した。（６）市販のスズ−パラジウムコロイド
触媒に浸漬して活性化した後、窒素雰囲気下、１２０℃
、３０分加熱して触媒を固定化し、ドライフィルムフォ
トレジストをラミネート、露光現像し、下記の表１に示
す組成の無電解銅めっき液に１５時間浸漬して約３５μ
ｍの銅めっきを施し、スルーホールと導体回路を形成し
、両面プリント配線板を製造した。Example 3 (1) A normal double-sided copper-clad laminate was etched by a conventional method to form a circuit. A lot number was printed with a rubber stamp on the insulating plate on which the inner layer circuit was formed. (2) Bisphenol A type epoxy resin E-828
(manufactured by Yuka Shell) 100 parts and 50 parts of fine silica powder (Adomafine S0-25H manufactured by Admatics)
An insulating resin was prepared by mixing vol% and average particle size of 0.5 μm using three rollers. After 50 μm of this insulating resin was applied by screen printing, 20 μm of the adhesive prepared in Example 1 was applied by screen printing. Then, it was dried and cured at 100° C. for 1 hour and at 150° C. for 5 hours to form an adhesive layer with a thickness of 50 μm. (4) Next, the resin surface was roughened by immersing it in chromic acid for 10 minutes, and after neutralization, it was washed with water. (5) Holes for through holes were formed in this board using a drill. (6) After immersing and activating a commercially available tin-palladium colloidal catalyst, at 120°C under a nitrogen atmosphere.
, the catalyst was fixed by heating for 30 minutes, a dry film photoresist was laminated, exposed and developed, and immersed for 15 hours in an electroless copper plating solution having the composition shown in Table 1 below to form a layer of about 35 μm.
A double-sided printed wiring board was manufactured by applying copper plating to form through holes and conductor circuits.
【００１９】実施例４
（１）絶縁板上に金型を用いて刻印した。ついで実施例
１で作成した接着剤を塗布した。（２）次いでクロム酸
に１０分間浸漬して、樹脂表面を粗面化し、中和後水洗
した。（３）市販のスズ−パラジウムコロイド触媒に浸
漬して活性化した後、１２０℃、３０分加熱して触媒を
固定化し、ドライフィルムフォトレジストをラミネート
、露光現像し、下記の表１に示す組成の無電解銅めっき
液に１５時間浸漬して約３５μｍの銅めっきを施しプリ
ント配線板を製造した。Example 4 (1) An inscription was made on an insulating plate using a mold. Then, the adhesive prepared in Example 1 was applied. (2) Next, the resin surface was roughened by immersing it in chromic acid for 10 minutes, and after neutralization, it was washed with water. (3) After immersing and activating a commercially available tin-palladium colloidal catalyst, heating at 120°C for 30 minutes to fix the catalyst, laminating with a dry film photoresist, exposing and developing, and forming the composition shown in Table 1 below. A printed wiring board was manufactured by immersing the board in an electroless copper plating solution of 100% for 15 hours to plate copper to a thickness of about 35 μm.
【００２０】実施例５
（１）通常の銅張り積層板を常法によりエッチングして
回路を形成した。この時、ターゲットマークも同時にエ
ッチングにより形成した。（２）ターゲットマークが形
成された内層回路上に、実施例２で作成した接着剤を塗
布し、乾燥して接着層を形成した。（３）ついで実施例
２と同様にしてバイアホールとなる開口を形成したのち
、クロム酸に浸漬して、樹脂表面を粗面化し、中和後水
洗した。（４）市販のスズ−パラジウムコロイド触媒に
浸漬して触媒を付与し、１２０℃、３０分加熱して触媒
を固定化した後、ドライフィルムフォトレジストをラミ
ネート、露光現像し、下表の表１に示す組成の無電解銅
めっき液に５時間浸漬して約１５μｍの銅めっきを施し
た。この時ターゲットマークも同時に形成した。
（５）前記（２）から（４）の処理を繰り返して、導体
３層の多層プリント配線板を製造した。各導体層で形成
したターゲットマーク９、１０、１１が目視でき、位置
合わせ精度が確認できた。Example 5 (1) A circuit was formed by etching an ordinary copper-clad laminate using a conventional method. At this time, a target mark was also formed by etching at the same time. (2) The adhesive prepared in Example 2 was applied onto the inner layer circuit on which the target mark was formed, and dried to form an adhesive layer. (3) Next, an opening to be a via hole was formed in the same manner as in Example 2, and then the resin surface was roughened by immersing it in chromic acid, and after neutralization, it was washed with water. (4) After applying the catalyst by immersing it in a commercially available tin-palladium colloidal catalyst and fixing the catalyst by heating at 120°C for 30 minutes, dry film photoresist was laminated, exposed and developed. It was immersed in an electroless copper plating solution having the composition shown below for 5 hours to form a copper plating of about 15 μm. At this time, a target mark was also formed at the same time. (5) The above processes (2) to (4) were repeated to produce a multilayer printed wiring board with three conductor layers. The target marks 9, 10, and 11 formed by each conductor layer were visible, and the alignment accuracy was confirmed.
【００２１】比較例１
（１）通常の銅張り積層板を常法によりエッチングして
回路を形成した。この時ロットナンバーも同時にエッチ
ングにより形成した。（２）プリプレグと銅箔を重ね合
わせて、常法により加圧加熱プレスを行った。（３）こ
の基板にドリルでスルーホール用の孔を形成した。
（４）実施例１と同様にして触媒核を付与し、無電解銅
めっき、電解銅めっきの順で２５μｍの銅めっきを施し
た。（５）常法によりエッチングして外層回路を形成し
た。この時ロットナンバーも同時にエッチングにより形
成し、多層プリント配線板を得た。内層回路に形成した
ロットナンバーは目視できなかった。このため、Ｘ線検
査により、各導体層の位置合わせを確認した。外層回路
に形成したロットナンバーは外形加工の工程で損傷して
しまい、判別が困難であった。Comparative Example 1 (1) A circuit was formed by etching an ordinary copper-clad laminate using a conventional method. At this time, a lot number was also formed by etching at the same time. (2) The prepreg and the copper foil were overlapped and pressed under pressure and heat using a conventional method. (3) Holes for through holes were formed in this board using a drill. (4) Catalyst nuclei were provided in the same manner as in Example 1, and 25 μm copper plating was performed in the order of electroless copper plating and electrolytic copper plating. (5) An outer layer circuit was formed by etching using a conventional method. At this time, a lot number was also formed by etching to obtain a multilayer printed wiring board. The lot number formed on the inner layer circuit could not be visually observed. Therefore, the alignment of each conductor layer was confirmed by X-ray inspection. The lot number formed on the outer layer circuit was damaged during the contour processing process, making it difficult to distinguish.
【００２２】[0022]
【表１】[Table 1]
【００２３】[0023]
【発明の効果】以上述べたように、本発明のプリント配
線板は、識別マークが、製造工程中のハンドリングによ
り消えることがなく、製造工程も簡単であり、また従来
多層プリント配線板の不良品検査で必要とされてきたＸ
線検査を目視検査で行うことができるなど、産業上寄与
する効果は極めて大きい。As described above, in the printed wiring board of the present invention, the identification mark does not disappear due to handling during the manufacturing process, the manufacturing process is simple, and defective products of conventional multilayer printed wiring boards can be avoided. X has been required for inspection
The industrial effect is extremely large, as line inspection can be done visually.
【図１】図１の（ａ）〜（ｄ）は、本発明のプリント配
線板の製造工程図である。破線であらわされている部分
が内層回路。ロットナンバーや内層回路を確認できる。FIG. 1 (a) to (d) of FIG. 1 are manufacturing process diagrams of a printed wiring board of the present invention. The part indicated by the broken line is the inner layer circuit. You can check the lot number and inner layer circuit.
【図２】図２は、本発明のプリント配線板の断面図。内
層回路と外層回路はバイアホールで接続されている。FIG. 2 is a sectional view of the printed wiring board of the present invention. The inner layer circuit and outer layer circuit are connected through via holes.
【図３】図３は、本発明のプリント配線板の断面図。め
っきレジストが残存しており、内層回路やロットナンバ
ーはより鮮明に確認できる。FIG. 3 is a sectional view of the printed wiring board of the present invention. The plating resist remains, and the inner layer circuit and lot number can be seen more clearly.
【図４】図４（ａ）〜（ｃ）は、実施例５に記載の多層
プリント配線板の製造工程図である。ターゲットマーク
９、１０、１１により位置合わせ精度が確認できる。4A to 4C are manufacturing process diagrams of a multilayer printed wiring board according to Example 5. FIG. The alignment accuracy can be confirmed by the target marks 9, 10, and 11.
１ 絶縁板
２ 銅箔
３ 内層導体回路
４ 製品管理番号（ロットナンバー）５ 透光性接
着剤層
６ 外層導体回路
７ バイアホール
８ めっきレジスト
９ 第１層に形成されたターゲットマーク１０ 第
２層に形成されたターゲットマーク１１ 第３層に形
成されたターゲットマーク１２ 第１層導体層
１３ 第２層導体層
１４ 第３層導体層1 Insulating plate 2 Copper foil 3 Inner layer conductor circuit 4 Product control number (lot number) 5 Transparent adhesive layer 6 Outer layer conductor circuit 7 Via hole 8 Plating resist 9 Target mark formed on the first layer 10 On the second layer Target mark 11 formed Target mark 12 formed on the third layer First conductor layer 13 Second conductor layer 14 Third conductor layer
Claims (4)
着剤層により被服されてなることを特徴とするプリント
配線板。1. A printed wiring board characterized in that an identification mark is covered with a transparent electroless plating adhesive layer.
もしくは酸化剤に対して難溶性の透光性の樹脂からなる
マトリックス中に酸もしくは酸化剤に対して可溶性の硬
化処理された耐熱性樹脂粉末が分散されてなる無電解め
っき用接着剤である請求項１に記載のプリント配線板。[Claim 2] The transparent adhesive layer for electroless plating is cured to be soluble in acids or oxidizing agents in a matrix made of a transparent resin that is sparingly soluble in acids or oxidizing agents. The printed wiring board according to claim 1, which is an adhesive for electroless plating in which heat-resistant resin powder is dispersed.
され、その表面に無電解めっき用接着剤が形成されてな
る請求項１に記載のプリント配線板。3. The printed wiring board according to claim 1, wherein a transparent insulating material layer is formed on the identification mark, and an adhesive for electroless plating is formed on the surface of the transparent insulating material layer.
れてなる多層プリント配線板であって、第ｎ層導体層に
は、識別マーク（ｎ）が形成され、前記識別マーク（ｎ
）の上には層間絶縁剤層として透光性無電解めっき用接
着剤層が形成され、前記透光性無電解めっき用接着剤層
上の第ｎ＋１層導体層には、識別マーク（ｎ＋１）が、
前記識別マーク（ｎ）を多層プリント配線板の上方もし
くは下方から認識できるように形成されてなることを特
徴とする多層プリント配線板。4. A multilayer printed wiring board formed by alternately laminating conductor layers and interlayer insulating layers, wherein an identification mark (n) is formed on the n-th conductor layer, and the identification mark (n
), a translucent electroless plating adhesive layer is formed as an interlayer insulating layer, and an identification mark (n+1) is formed on the n+1 conductor layer on the translucent electroless plating adhesive layer. but,
A multilayer printed wiring board, characterized in that the identification mark (n) is formed so as to be recognizable from above or below the multilayer printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15766691A JP2820332B2 (en) | 1991-05-31 | 1991-05-31 | Printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15766691A JP2820332B2 (en) | 1991-05-31 | 1991-05-31 | Printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04354396A true JPH04354396A (en) | 1992-12-08 |
| JP2820332B2 JP2820332B2 (en) | 1998-11-05 |
Family
ID=15654731
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15766691A Expired - Lifetime JP2820332B2 (en) | 1991-05-31 | 1991-05-31 | Printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2820332B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008152083A (en) * | 2006-12-19 | 2008-07-03 | Sharp Corp | Semiconductor device and manufacturing method thereof |
| JP2015211134A (en) * | 2014-04-25 | 2015-11-24 | 新光電気工業株式会社 | Wiring board and manufacturing method for the same |
-
1991
- 1991-05-31 JP JP15766691A patent/JP2820332B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008152083A (en) * | 2006-12-19 | 2008-07-03 | Sharp Corp | Semiconductor device and manufacturing method thereof |
| JP2015211134A (en) * | 2014-04-25 | 2015-11-24 | 新光電気工業株式会社 | Wiring board and manufacturing method for the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2820332B2 (en) | 1998-11-05 |
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