JPH0435305A - Reception converter - Google Patents

Reception converter

Info

Publication number
JPH0435305A
JPH0435305A JP13782590A JP13782590A JPH0435305A JP H0435305 A JPH0435305 A JP H0435305A JP 13782590 A JP13782590 A JP 13782590A JP 13782590 A JP13782590 A JP 13782590A JP H0435305 A JPH0435305 A JP H0435305A
Authority
JP
Japan
Prior art keywords
amplifier
high frequency
filter
intermediate frequency
frequency filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13782590A
Other languages
Japanese (ja)
Inventor
Yukio Sakai
幸雄 堺
Ichiro Koyama
一郎 小山
Takeshi Sato
毅 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13782590A priority Critical patent/JPH0435305A/en
Publication of JPH0435305A publication Critical patent/JPH0435305A/en
Pending legal-status Critical Current

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Landscapes

  • Superheterodyne Receivers (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

PURPOSE:To prevent an output level from being decreased by arranging a high frequency filter, an intermediate frequency filter and a multiplier on one side of a multi-layer board having a ground pattern in its inside, and arranging a high frequency amplifier, a mixer, an intermediate frequency amplifier and an amplifier on the other side. CONSTITUTION:A multi-layer board 13 having a ground pattern 14 in its inside is used. A high frequency filter 2, an intermediate frequency filter 4 and a multiplier 7, a filter 8 and an intermediate frequency filter 10 are arranged to one side of the multi-layer board 13 and a high frequency amplifier 3, a mixer 5, an amplifier 9 and an intermediate frequency amplifier 11 are arranged to the other side. Since the multiplier 7 and the other components are separated by the ground patter 14, the mixing of undesired radiation from the multiplier to the components mounted on the other side of the multi-layer board is prevented, resulting that the reduction in the output level from the output terminal is prevented.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、携帯用ビデオカメラなどに用いられる受信コ
ンバータに関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a receiving converter used in portable video cameras and the like.

従来の技術 従来この種の受信コンバータは、第4図に示すように構
成されていた。すなわち、アンテナ入力端子1に高周波
フィルタ2が接続され、この高周波フィルタ2の出力側
に高周波増幅器3が接続され、この高周波増幅器3の出
力側に高周波フィルタ4が接続され、この高周波フィル
タ4の出力側にミキサ5が接続されていた。またこのば
キサロの出力側に中間周波フィルタ10が接続され、こ
の中間周波フィルタの出力側に中間周波増幅器が接続さ
れ、この中間周波増1嘔器11の出力側に出力端子12
が接続されていた。さらに前記ミキサ5の局部発振入力
端子に増幅器9が接続され、この増幅器9の入力側にフ
ィルタ8が接続され、このフィルタ8の入力側に逓倍器
7が接続され、との逓倍器7の入力側に局部発振入力端
子6が接続されていた。そして、これらの各部品は基板
の一面上に配置されていた。また、高周波フィルタ4゜
中間周波フィルタ10は、LC回路で構成されていた。
2. Description of the Related Art Conventionally, this type of receiving converter has been constructed as shown in FIG. That is, a high frequency filter 2 is connected to the antenna input terminal 1, a high frequency amplifier 3 is connected to the output side of this high frequency filter 2, a high frequency filter 4 is connected to the output side of this high frequency amplifier 3, and the output of this high frequency filter 4 is connected to the high frequency filter 2. Mixer 5 was connected to the side. Further, an intermediate frequency filter 10 is connected to the output side of this intermediate frequency filter, an intermediate frequency amplifier is connected to the output side of this intermediate frequency filter, and an output terminal 12 is connected to the output side of this intermediate frequency amplifier 11.
was connected. Further, an amplifier 9 is connected to the local oscillation input terminal of the mixer 5, a filter 8 is connected to the input side of the amplifier 9, a multiplier 7 is connected to the input side of the filter 8, and the input of the multiplier 7 is A local oscillation input terminal 6 was connected to the side. Each of these components was arranged on one surface of the board. Further, the high frequency filter 4° intermediate frequency filter 10 was composed of an LC circuit.

発明が解決しようとする課題 上記の構成とした場合、逓倍器7からの不要輻射が各部
品に混入し、その結果として出力端子12から得られる
希望の周波数の出力レベルを低下させてしまうという問
題があった。そこで本発明は、この出力レベルの低下を
防止することを目的とするものである。
Problems to be Solved by the Invention With the above configuration, there is a problem in that unnecessary radiation from the multiplier 7 mixes into each component, resulting in a decrease in the output level of the desired frequency obtained from the output terminal 12. was there. Therefore, it is an object of the present invention to prevent this decrease in output level.

l!題を解決するための手段 そしてこの目的を達成するために本発明は、内部にアー
スパターンを有する多層基板の一面側に、前記高周波フ
ィルタ、フィルタ、中間周波フィルタ、逓倍器を配置し
、この多層基板の他面側に高周波増幅器、ミキサ、中間
周波増幅器、増幅器を配置し、多層基板の一面側と他面
側を電気的に接続したものである。
l! Means for solving the problem and to achieve this object, the present invention arranges the high frequency filter, filter, intermediate frequency filter, and multiplier on one side of a multilayer substrate having a ground pattern inside, and A high frequency amplifier, a mixer, an intermediate frequency amplifier, and an amplifier are arranged on the other side of the board, and one side and the other side of the multilayer board are electrically connected.

作用 以上の構成とした場合、多層基板のアースパターンによ
り逓倍器から多層基板の他面側へ実装された部品への不
要輻射の混入は防止され、結果として出力端子からの出
力レベルの低下は防止できる。
If the configuration exceeds the function, the ground pattern of the multilayer board will prevent unnecessary radiation from entering the components mounted on the other side of the multilayer board, and as a result, a drop in the output level from the output terminals will be prevented. can.

実施例 以下、本発明の一実施例を図面を用いて説明する。なお
本実施例において、従来例と同一部品には同一番号を付
して説明を行う。
EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings. In this embodiment, parts that are the same as those in the conventional example are given the same numbers and will be explained.

第1図から第3図に示すごとく、本実施例においては、
多層基板13を用いた。この多層基板13は、内部にア
ースパターン14を全面的に設けたものであって、更に
一面側と他面側にも導電パターンを設け、更にまた一面
側と他面側の導電パターンはスルーホールにて接続して
いる。轟然のごとく、スルーホールの貫通部分における
アースパターンは除去されている。そしてこの状態にお
いて、多層基板13の一面側には第2図に示すように、
高層波フィルタ2.高周波フィルタ4.逓倍器7.フィ
ルタ8.中間周波フィルタ1oが配置されている。また
多層基板13の他面側には第3図に示すように、高周波
増幅器3.ミキサ6、増1器9.中間周波増櫂器11が
配置されている。
As shown in FIGS. 1 to 3, in this example,
A multilayer substrate 13 was used. This multilayer board 13 has a ground pattern 14 provided therein over the entire surface, and conductive patterns are also provided on one side and the other side, and the conductive patterns on one side and the other side are through holes. It is connected at. As if to surprise, the ground pattern at the penetration part of the through hole has been removed. In this state, on one side of the multilayer substrate 13, as shown in FIG.
High wave filter 2. High frequency filter 4. Multiplier7. Filter 8. An intermediate frequency filter 1o is arranged. Further, on the other side of the multilayer substrate 13, as shown in FIG. 3, a high frequency amplifier 3. 6 mixers, 1 amplifier 9. An intermediate frequency intensifier 11 is arranged.

以上の構成とした場合、アースパターン14にょシ、逓
倍器7と第3図に示す各部品とは分離されているので、
この1(において、逓倍器7からの不要輻射の混入は起
きなくなる。また、逓倍器7を設けた多層基板13の一
面側に設けられた各フィルタ2,4,8.10は、図示
していないがそれぞれその外表面を金属製のシャーシで
覆ったものにしているので、これらの部品にも逓倍器7
からの不要輻射の混入は防止される。この結果として、
出力端子12からの出力レベルは適切な値となる。
In the above configuration, since the earth pattern 14, the multiplier 7, and each component shown in FIG. 3 are separated,
In this step (1), unnecessary radiation from the multiplier 7 will not be mixed in. Also, the filters 2, 4, 8, and 10 provided on one side of the multilayer substrate 13 on which the multiplier 7 is provided are not shown in the figure. However, since the outer surface of each part is covered with a metal chassis, these parts also have a multiplier 7.
This prevents unnecessary radiation from entering. As a result of this,
The output level from the output terminal 12 becomes an appropriate value.

また、高周波フィルタ2と4は、同軸誘電体共振器型箋
バンドパスフィルタで、中間周波フィルタ1oは、Sム
W共振器型バンドパスフィルタで構成しているので、信
号レベルの挿入損失が小さくでき、この結果として、雑
音指数の良好な受信コンバータが実現できる。
In addition, the high frequency filters 2 and 4 are coaxial dielectric resonator band pass filters, and the intermediate frequency filter 1o is a SM W resonator band pass filter, so the insertion loss of the signal level is small. As a result, a receiving converter with a good noise figure can be realized.

発明の効果 以上のように本発明は、内部にアースパターンを有する
多層基板の一面側に高周波フィルタ、フィルタ、中間周
波フィルタ、逓倍器を配置しこの多層基板の他面側に高
周波増幅器、ミキサ、増幅器。
Effects of the Invention As described above, the present invention has a high frequency filter, a filter, an intermediate frequency filter, and a multiplier arranged on one side of a multilayer substrate having an internal earth pattern, and a high frequency amplifier, mixer, and multiplier arranged on the other side of this multilayer substrate. amplifier.

中間周波増幅器を配置したものであるので、多層基板の
アースパターンにより逓倍器から多層基板の他面側へ実
装された部品への不要輻射の混入は防止され、結果とし
て出力端子からの出力レベルの低下が防止できる。
Since the intermediate frequency amplifier is installed, the ground pattern of the multilayer board prevents unnecessary radiation from entering the components mounted on the other side of the multilayer board, and as a result, the output level from the output terminals is reduced. Deterioration can be prevented.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の受信コンバータの正面図、
第2図はその平面図、第3図はその底面図、第4図は従
来例と本発明一実施例の電気回路図である。 1・・・・・・アンテナ入力端子、2・・・・・・高周
波フィルタ、3・・・・・・高周波増幅器、4・・・・
・・高周波フィルタ、6・−・・・・ミキサ、6・・・
・・・局部発振入力端子、7・・・・・・逓倍器、8・
・・・・・フィルタ、9・・・・・・増幅器、10・・
・・中間周波フィルタ、11・・・・・・中間周波増幅
器、12・・・・・・出力端子、13・・・・・・多層
基板、14・・・・・・アースパターン。
FIG. 1 is a front view of a receiving converter according to an embodiment of the present invention;
FIG. 2 is a plan view thereof, FIG. 3 is a bottom view thereof, and FIG. 4 is an electric circuit diagram of a conventional example and an embodiment of the present invention. 1... Antenna input terminal, 2... High frequency filter, 3... High frequency amplifier, 4...
...High frequency filter, 6...Mixer, 6...
...local oscillation input terminal, 7...multiplier, 8.
...Filter, 9...Amplifier, 10...
... Intermediate frequency filter, 11 ... Intermediate frequency amplifier, 12 ... Output terminal, 13 ... Multilayer board, 14 ... Earth pattern.

Claims (1)

【特許請求の範囲】[Claims] アンテナ入力端子に順に、高周波フィルタ、高周波増幅
器、高周波フィルタ、ミキサ、中間周波フィルタ、中間
周波増幅器、出力端子を接続し、前記ミキサの局部発振
入力端子には増幅器、フィルタ、逓倍器を介して局部発
振入力端子を接続するとともに、内層面をアースパター
ンとした多層基板の一面側に、前記高周波フィルタ3中
間周波フィルタ、逓倍器、フィルタを配置し、この多層
基板の他面側に高周波増幅器、ミキサ、中間周波増幅器
、増幅器を配置し、前記多層基板の一面側と他面側を電
気的に接続した受信コンバータ。
A high frequency filter, a high frequency amplifier, a high frequency filter, a mixer, an intermediate frequency filter, an intermediate frequency amplifier, and an output terminal are connected in order to the antenna input terminal, and the local oscillation input terminal of the mixer is connected to the local oscillation input terminal via the amplifier, filter, and multiplier. The high frequency filter 3 intermediate frequency filter, multiplier, and filter are arranged on one side of a multilayer board to which the oscillation input terminal is connected and whose inner layer surface is a ground pattern, and the high frequency amplifier and mixer are arranged on the other side of this multilayer board. , an intermediate frequency amplifier, and a receiving converter in which an amplifier is arranged and one side and the other side of the multilayer board are electrically connected.
JP13782590A 1990-05-28 1990-05-28 Reception converter Pending JPH0435305A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13782590A JPH0435305A (en) 1990-05-28 1990-05-28 Reception converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13782590A JPH0435305A (en) 1990-05-28 1990-05-28 Reception converter

Publications (1)

Publication Number Publication Date
JPH0435305A true JPH0435305A (en) 1992-02-06

Family

ID=15207730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13782590A Pending JPH0435305A (en) 1990-05-28 1990-05-28 Reception converter

Country Status (1)

Country Link
JP (1) JPH0435305A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002086974A1 (en) * 2001-04-16 2002-10-31 Niigata Seimitsu Co., Ltd. Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002086974A1 (en) * 2001-04-16 2002-10-31 Niigata Seimitsu Co., Ltd. Semiconductor device

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