JPH0434676U - - Google Patents
Info
- Publication number
- JPH0434676U JPH0434676U JP7707890U JP7707890U JPH0434676U JP H0434676 U JPH0434676 U JP H0434676U JP 7707890 U JP7707890 U JP 7707890U JP 7707890 U JP7707890 U JP 7707890U JP H0434676 U JPH0434676 U JP H0434676U
- Authority
- JP
- Japan
- Prior art keywords
- cml
- ttl
- level converter
- signal
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7707890U JPH0434676U (enExample) | 1990-07-20 | 1990-07-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7707890U JPH0434676U (enExample) | 1990-07-20 | 1990-07-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0434676U true JPH0434676U (enExample) | 1992-03-23 |
Family
ID=31619128
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7707890U Pending JPH0434676U (enExample) | 1990-07-20 | 1990-07-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0434676U (enExample) |
-
1990
- 1990-07-20 JP JP7707890U patent/JPH0434676U/ja active Pending
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