JPH04343464A - Overvoltage protecting device - Google Patents

Abstract

PURPOSE:To prevent a saturated state of a protecting transistor for protecting an internal circuit against static electricity when the static electricity is applied to a signal terminal of an IC and to prevent a decrease in a function of clipping an input voltage of the transistor. CONSTITUTION:When a voltage of a power source voltage or higher is applied to a signal terminal 2 of an internal circuit 3 integrated in a semiconductor integrated circuit 1, a diode 6 clips an input voltage, and protects the circuit 3 against damage due to a positive static electricity. When a negative voltage is applied to the terminal 2, a base and an emitter of a transistor 7 are forward biased through a P-N junction diode 9, the transistor 7 is conducted to clip the input voltage, thereby protecting the circuit of the IC 1 against damage due to negative static electricity.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overvoltage protection device, such as an overvoltage protection device for preventing electrostatic damage to an electronic circuit connected to a signal terminal in a semiconductor integrated circuit device (hereinafter simply referred to as an IC).

0002

2. Description of the Related Art When manufacturing ICs or electronic devices using ICs, static electricity may be applied to signal terminals of the IC from the human body or assembly equipment for some reason. The voltage level of this static electricity is from several hundred volts to several tens of kV.
There is a high risk that the internal circuits of the IC will be damaged. For this reason, conventionally, input signals are limited,
Means for preventing electrostatic damage is added to the signal terminals of ICs (eg, Japanese Patent Publication No. 46989/1989).

[0003] This conventional example will be explained below with reference to FIG. Inside the IC 1, there is an internal circuit 3 that is connected to the signal terminal 2 and is composed of an amplifier, a logic circuit, etc.
A power terminal 4 and a ground terminal 5, which are power terminals of the IC 1, are connected to the internal circuit 3. When a voltage higher than the power supply voltage is applied to the signal terminal 2, the diode 6 clips the input voltage to protect the internal circuit 3 from damage caused by static electricity. When a negative voltage is applied to the signal terminal 2, the base of the transistor 7 whose emitter is connected to the signal terminal 2
The emitter is forward biased, transistor 7 conducts, and transistor 7 clips the input voltage to protect internal circuit 3 from destruction due to static electricity.

0004

However, the protection transistor 7 is formed within the region of the resistive island, and the collector of the transistor 7 and the resistive island are commonly connected to the power supply terminal 4. A parasitic diode 8 (PN junction) exists between the N-type epitaxial region constituting the resistance island and the P-type substrate. If the protection transistor 7 is in an active state, the transistor 7 becomes conductive when a negative voltage is applied to the signal terminal 2, and the transistor 7 attempts to limit the input voltage by a clipping operation.

However, as described above, the environment in which static electricity is applied to an IC is often during the manufacturing process of the IC or the manufacturing process of an electronic device using the IC. Under such environmental conditions, no power supply voltage is normally applied from the outside to the power supply terminals of the IC. Therefore, consideration must be given to the clipping operation when no power supply voltage is applied. However, in such a state where no power supply voltage is applied, in the initial state where static electricity is applied to the signal terminal 2, the voltage between the collector and emitter of the transistor 7 becomes almost zero, and the transistor 7 becomes saturated. and,
Due to the reduction in the current amplification factor, the internal resistance of the transistor 7 cannot be maintained at a small value, and the ability of the transistor 7 to limit the input voltage is reduced.

For this reason, a clipping operation is performed by the PN junction diode between the base and emitter of the transistor 7. However, since the transistor 7 does not have a current amplification effect, an excessive base current flows during the clamp operation. Furthermore, the base region immediately below the emitter region, which has an effective transistor function, has a low diffusion concentration and a narrow base width, so that the sheet resistance is higher than that of other base regions. For this reason, when a base current flows, current concentration occurs near the emitter region and base contact region of the transistor 7, and these regions are likely to be damaged by Joule heat.

An object of the present invention is to prevent the protection transistor 7 from becoming saturated even if an overvoltage such as static electricity is applied to the signal terminal 2 of the IC 1, and to prevent a decrease in the ability of the transistor to clip the input voltage. The purpose is to prevent it.

[0008]

[Means for Solving the Problems] An overvoltage protection device according to a first aspect of the present invention includes an internal circuit integrated in a semiconductor integrated circuit, a first power terminal, a second power terminal, and a second power terminal connected to the internal circuit. a signal terminal, a protection transistor whose collector is connected to the first power supply terminal and whose emitter is connected to the signal terminal; It is equipped with a diode connected in the conduction direction.

The overvoltage protection device according to the second aspect of the present invention includes an internal circuit integrated in a semiconductor integrated circuit, a first power terminal, a second power terminal, and a signal terminal connected to the internal circuit;
an epitaxial layer of a second conductivity type formed on a substrate of a first conductivity type and connected to the first power supply terminal; a first diffusion region of a first conductivity type formed on a main surface of the epitaxial layer; a second diffusion region of a second conductivity type formed in the first diffusion region and connected to the signal terminal; and a second diffusion region between the first diffusion region and the second power supply terminal. It is equipped with diodes connected in the direction of conduction between regions.

The overvoltage protection device according to the third aspect of the present invention includes an internal circuit integrated in a semiconductor integrated circuit, a first power terminal, a second power terminal, and a signal terminal connected to the internal circuit;
a second conductivity type epitaxial layer formed on the first conductivity type substrate and connected to the first power supply terminal; a first conductivity type first diffusion region formed on the main surface of the epitaxial layer; A third diffusion region of a second conductivity type formed in the diffusion region, an insulating film formed on the surface of the semiconductor substrate, and first and second openings provided in the third diffusion region,
The first opening is connected to a signal terminal, the second opening is connected to an internal circuit, and the first diffusion region is connected to a predetermined potential point.

[0011]

[Operation] In this configuration, it is possible to provide a margin for the voltage between the collector and emitter of the protection transistor by the voltage of the diode connected to the base of the protection transistor, thereby preventing the transistor from becoming saturated. It is possible to prevent the deterioration of the clip operation function. and,
It is possible to limit the surge voltage applied to the signal terminal and protect the internal circuit from surge voltage and static electricity.

0012

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an overvoltage protection device according to an embodiment of the present invention, and elements corresponding to those in the conventional example shown in FIG. 8 are given the same reference numerals.

[0013] Inside the IC 1, there is an internal circuit 3 which is connected to the signal terminal 2 and is composed of an amplifier, a logic circuit, etc.
A power terminal 4 and a ground terminal 5 are connected to this internal circuit 3 as power terminals of the IC 1. And signal terminal 2
When a voltage higher than the power supply voltage is applied to the diode 6, whose cathode is connected to the power supply terminal 4 and whose anode is connected to the signal terminal 2, the diode 6 clips the input voltage and turns the internal circuit 3 into a normal state. protect against damage caused by static electricity.

When a negative voltage is applied to the signal terminal 2, the base and emitter of the transistor 7, whose emitter is connected to the signal terminal 2 and whose collector is connected to the power supply terminal 4, are connected via the PN junction diode 9. forward biased,
Transistor 7 becomes conductive, clips the input voltage, and protects internal circuit 3 of IC 1 from being destroyed by negative static electricity.

Various configurations are possible for the internal circuit 3 of the IC 1, but the circuit configuration that is likely to be damaged by the application of an external voltage is the connection shown by the broken line in the internal circuit 3 in FIG. Therefore, if the protection means for the circuit shown in FIG. 1 is considered, it can be applied to any other circuit.

When negative static electricity is applied to the signal terminal 2 in such a configuration, the collector potential of the transistor 7 is applied from the ground terminal 5 via the parasitic diode 8, and the base potential of the transistor 7 is applied to the ground terminal 5. 5 through a diode 9. From this, the collector-emitter voltage of transistor 7 becomes approximately equal to the base-emitter voltage of transistor 7, and transistor 7
The active state can be maintained. That is, even if no voltage is applied to the power supply terminal 4, the active state of the transistor 7 is maintained, and a decrease in the direct current amplification factor (hereinafter referred to as hFE) of the transistor 7 is avoided, thereby achieving a good clipping operation.

Here, the forward base of the transistor 7
The voltage between the emitters is Vbe, the voltage between the emitter and the base in the opposite direction of the transistor in the internal circuit 3 is Vebx, the voltage between the emitter and collector in the opposite direction of the transistor in the internal circuit 3 is Vecx, and the order of the diodes 8 and 9 is Letting the directional diode voltage be Vd, Vecx=Vd Vebx=Vbe+Vd. The reverse breakdown voltage between the emitter and collector of the transistor in the internal circuit 3 is normally about 10 (V), but Vd≈Vb
Since e is approximately 0.6 (V), the emitter-collector voltage of the transistor in internal circuit 3 is approximately 1.2 (V).
, and the reverse breakdown voltage between the emitter and collector of the transistor in the internal circuit 3 is protected.

Furthermore, the reverse breakdown voltage between the emitter and base is approximately 6
(V), but the emitter-base voltage is approximately 0.6 (
V), the emitter of internal circuit 3
Reverse breakdown voltage between bases is protected. In this way, by limiting the externally applied voltage to a sufficiently low level compared to the withstand voltage of the transistors in the internal circuit 3, the overvoltage protection device of FIG. 1 protects the internal circuit 3 from destruction due to static electricity.

Next, FIG. 2 shows a specific example in which the configuration shown in FIG. 1 is applied to an IC, and elements corresponding to those in FIG. 1 are given the same reference numerals.

A buried diffusion region 11 of a second conductivity type having a predetermined shape is formed on a substrate 10 of a first conductivity type, and an epitaxial layer 12 of a second conductivity type is further formed thereon. An isolation diffusion region 13 of a first conductivity type is provided to surround the buried diffusion region 11 to form an epitaxial island region, and a first diffusion region 14 of a first conductivity type is formed on the main surface of the island region. Further, a second diffusion region 15 of the second conductivity type is formed in the first diffusion region 14, and the second diffusion region 15 and the first diffusion region 15 are
Diffusion region 14, second conductivity type epitaxial layer island 12
The protection transistor 7 is configured as follows. On the other hand, the first
The diode 9 is constructed by providing a third diffusion region 16 of the second conductivity type within the isolation diffusion region 13 of the conductivity type. Furthermore, a wiring connecting the electrode of the third diffusion region 16 and the electrode of the first diffusion region 14 and a wiring connecting the electrode of the second diffusion region 15 to the input terminal 2 and the input end of the internal circuit 3 are formed. do. The above configuration constitutes the overvoltage protection device of this embodiment.

More specifically, a low concentration P-type substrate 10
A heavily doped N-type buried diffusion region 11 is provided in a predetermined shape on top, a lightly doped N-type epitaxial layer 12 is formed thereon, and an isolation region formed by a P-type diffused layer, an oxide film, or a trench is formed. A plurality of epitaxial layers are provided to surround the buried diffusion region 11 to form a plurality of epitaxial layer islands, and a high concentration or low concentration P type diffusion region 14 is placed on the main surface of the island so as not to contact the N type buried layer 11. forming a P-type diffusion region 1
4. Provide a high concentration N-type diffusion region 15.

Then, a protection transistor 7 is formed having the N-type epitaxial island 12 as a collector, the P-type diffusion region 14 as a base, and the N-type diffusion region 15 as an emitter. Furthermore, a high concentration N type diffusion region 16 is provided in the P type isolation diffusion region 13 to form a PN junction diode 9. The high concentration N type diffusion region 16 is connected to the electrode of the N type diffusion region 14, and the electrode of the N type diffusion region 15 is connected to the signal terminal 2 and the internal circuit 3.
Connect to the input end of the The protection circuit is configured with the above configuration. Note that the IC substrate 10 is normally connected to the ground terminal 5 and the N-type epitaxial island 12 is connected to the power supply terminal 5, but it goes without saying that the reverse may be true if the type of impurity in the diffusion region is different.

The buried diffusion region 11 reduces the collector resistance of the protection transistor 7 and reduces the collector region's collector resistance.
It has the role of reducing the voltage drop caused by the micro resistance and increasing the current capacity of the protection transistor 7.

The collector wall region 17 has the effect of preventing the generation of parasitic elements between adjacent elements formed in the island region and further reducing the collector resistance of the protection transistor 7. There is. A fourth diffusion region 18 of the second conductivity type formed near the surface of the collector wall region 17 is a diffusion region for reducing the ohmic contact resistance with the metal wiring of the power supply terminal 4.

By providing the third diffusion region 16 of the second conductivity type within the isolation diffusion region 13 of the first conductivity type, the diode
A field 9 is formed. A parasitic diode 8 is connected to a substrate 10 of a first conductivity type, an isolation diffusion region 13 and an epitaxial island 1.
It is formed between 2 and 2.

When the epitaxial island 12 is shared with the resistive island, there is no need for a margin between the isolation diffusion region 13 and the diffusion layer adjacent to the isolation diffusion region 13, and the degree of integration of the IC can be increased.

It has been conventionally known that the positive protection diode 6 is constructed by providing a diffusion region of the first conductivity type on the main surface of the epitaxial layer 12 of the second conductivity type. That's true.

Next, FIG. 3 shows the configuration of an overvoltage protection device according to a second embodiment of the present invention. In FIG. 3, parts corresponding to the components of the apparatus shown in FIG. 2 are given the same reference numerals.

A buried diffusion region 11 of a second conductivity type having a predetermined shape is formed on a substrate 10 of a first conductivity type, and an epitaxial layer 12 of a second conductivity type is further formed thereon. An isolation diffusion region 13 of a first conductivity type is provided to surround the buried diffusion region 11 to form an epitaxial island region, and a first diffusion region 14 of a first conductivity type is formed on the main surface of the island region, A second diffusion region 15 of a second conductivity type is formed within the first diffusion region 14 . As a result, the second diffusion region 15, the first
Diffusion region 14, second conductivity type epitaxial layer island 12
The protection transistor 7 is configured as follows. On the other hand, the diode 9 is constructed by providing a third diffusion region 19 of the second conductivity type within the isolation diffusion region 13 of the first conductivity type.
and providing a fifth diffusion region 20 of the first conductivity type within the island 12 of the epitaxial layer of the second conductivity type, and providing a sixth diffusion region 21 of the second conductivity type within this fifth diffusion region 20. A cascade of diodes is constituted by the diodes constituted by . Then, this cascaded body of diodes is connected between the second power supply terminal and the electrode of the first diffusion region 14 . Further, wiring is formed to connect the electrode of the second diffusion region 15 to the input terminal 2 and the input end of the internal circuit 3. The above configuration constitutes the overvoltage protection device of this embodiment.

In the second embodiment, a cascaded body of diodes is provided between the first diffusion region 14, which is the base region of the protection transistor 7 of the first embodiment, and the second power supply end 5. It was added.

In the second embodiment, the effective collector-emitter voltage of the transistor decreases due to the voltage drop across the ohmic resistor in the collector region of the transistor 7, causing the transistor to become saturated. However, the voltage equal to the diode voltage connected to the base is
By being added to the collector-emitter voltage of the protection transistor 7, the level of the collector current at which the transistor 7 becomes saturated can be increased, and the range of operating current when the transistor 7 clips the input voltage is increased. Can be expanded. In other words, since the function of clipping the input voltage is superior to that of the first embodiment, a large amount of energy (
This provides more effective protection against overvoltage as well as against static electricity (large current).

Next, FIG. 4 shows the configuration of an overvoltage protection device according to a third embodiment of the present invention. In FIG. 4, elements corresponding to those of the apparatus shown in FIG. 2 are given the same reference numerals.

A buried diffusion region 11 of a second conductivity type having a predetermined shape is formed on a substrate 10 of a first conductivity type, and an epitaxial layer 12 of a second conductivity type is further formed thereon. An isolation diffusion region 13 of a first conductivity type is provided to surround the buried diffusion region 11 to form an epitaxial island region, and a first diffusion region 14 of a first conductivity type is formed on the main surface of the island region, A second diffusion region 15 of a second conductivity type is formed within the first diffusion region 14 . As a result, the second diffusion region 15, the first
Diffusion region 14, second conductivity type epitaxial layer island 12
A protection transistor 7 is formed by this. Further, a seventh diffusion region 22 of the first conductivity type is provided so as to overlap both the isolation diffusion region 13 of the first conductivity type and the island 12 of the second conductivity type epitaxial layer, and a seventh diffusion region 22 of the first conductivity type is provided within the diffusion region 22. A diode 9 is formed by providing an eighth diffusion region 23 of the type. Furthermore, a wiring connecting the electrode of the eighth diffusion region 23 and the electrode of the first diffusion region 14 and a second diffusion region 15 are provided.
Wiring is formed to connect the electrodes of the input terminal 2 and the input end of the internal circuit 3. The above configuration constitutes the overvoltage protection device of this embodiment.

In the third embodiment, the diode 9 connected to the base of the protection transistor 7 of the first embodiment is
An eighth diffusion region 23 of the second conductivity type is located within the seventh diffusion region 22 of the first conductivity type within the island of the epitaxial layer 12 of the conductivity type.
The seventh diffusion region 22 is configured to overlap the separation diffusion region 13.

In the third embodiment, the effective voltage between the collector and emitter of the transistor decreases due to the voltage drop across the ohmic resistor in the collector region of the transistor 7, and the transistor becomes saturated. However, the voltage equal to the diode voltage connected to the base is
By being added to the collector-emitter voltage of the protection transistor 7, the clipping operation functions even in the initial state where the voltage applied to the signal terminal 2 is close to zero. In addition, when the input voltage increases, a base current flows corresponding to the collector current level that flows during clipping operation, and the seventh
As the base current flows through the diffusion region 22 of
A voltage drop occurs across the ohmic resistance within the seventh diffusion region 22. The voltage drop across this ohmic resistor plays a role in increasing the voltage between the collector and emitter of the transistor, and even if the input voltage and input current become large, the transistor 7 can be prevented from becoming saturated, and the transistor 7 can maintain the input voltage. The operating current range when clipping can be expanded. That is, since the function of clipping the input voltage is superior to that of the first embodiment, more effective protection against overvoltage is provided even against large energy (large current) static electricity.

Note that the seventh diffusion region 22 has a role as a resistance element, and by using a low concentration diffusion layer, the diffusion region 22 can be made small. Further, by setting the resistance value of the diffusion region 22 to an arbitrary value, the collector-emitter voltage can be increased in accordance with the increase in the level of the collector current of the transistor 7, so that the clipping operation functions over a wide range of operating currents. therefore,
According to the third embodiment, an overvoltage protection device that operates over a wider range than the second embodiment can be realized.

Finally, an overvoltage protection device according to a fourth embodiment of the present invention will be explained. FIG. 5 is a plan view of a main part of the fourth embodiment, FIG. 6 is a sectional view taken along the line A--A in FIG. 5, and FIG. 7 shows an equivalent circuit of FIGS. 5 and 6. Note that Figures 5, 6 and 7
2, elements corresponding to those in FIG. 2 are given the same reference numerals.

A buried diffusion region 11 of a second conductivity type having a predetermined shape is formed on a substrate 10 of a first conductivity type, and an epitaxial layer 12 of a second conductivity type is further formed thereon. A first conductivity type isolation diffusion region 13 is provided apart from the buried diffusion region 11, and an epitaxial island region 12-
1 and an epitaxial island 12-2 for a pad is formed. A first diffusion region 24 of a first conductivity type is formed on the main surface of the island region 12-1, and a second diffusion region of a second conductivity type is formed in the first diffusion region 24.
A diffusion region 25 is formed. As a result, the second diffusion region 25
, the first diffusion region 24, and the second conductivity type epitaxial layer island 12-1 to form a protective distributed transistor 7-1.
, 7-2 are configured.

By providing openings 27 and 28 in the insulating film on the main surface of the semiconductor substrate, the wiring body 29 connected to the signal terminal 2 is coupled to the emitter of the distributed transistor 7-1, and the internal circuit 3 The wiring body 30 connected to is coupled to the emitter of the distributed transistor 7-2. By providing an opening 31 in the insulating film above the first diffusion region 24, a predetermined bias voltage connected to the wiring body 32 is applied to the bases of the distributed transistors 7-1 and 7-2.

A second diffusion region 17 is formed in the collector wall region 17 surrounding the first diffusion region 24 on the main surface of the substrate.
Forming a conductive type diffusion region. Further, by providing an opening 33 in the insulating film thereon, the collectors of the protection transistors 7-1 and 7-2 are connected to the power supply terminal 4 via the wiring body 34. Note that the broken line in FIG. 5 indicates the boundary line of the buried diffusion region 11 in FIG. 6. The above configuration constitutes the overvoltage protection device of this embodiment.

With such a configuration, the second conductivity type buried diffusion region 11 and collector wall region 17 are
Since the diffusion impurity concentration is higher than that of the epitaxial layer 12, the area from the buried diffusion region 11 directly under the second diffusion region 25 where the protection transistors 7-1 and 7-2 have an effective transistor function to the opening 33 is The ohmic resistance of the collector region can be reduced. Thereby, the voltage drop in the collector region is reduced, and the current level at which the protection transistor 7 is saturated can be increased.

A resistor 35 shown in FIG. 7 represents the ohmic resistance of the second diffusion region 25 from the opening 27 to the opening 28, and the protective transistors 7-1 and 7-2 in FIG. The figure shows a transistor with a shape like this. Second diffusion region 25
The vicinity of the opening 27 corresponds to the emitter of the transistor 7-1, and the vicinity of the opening 28 of the second diffusion region 25 corresponds to the emitter of the transistor 7-2. That is, the resistor 35 is also configured with a distributed resistor.

Protection transistor 7- with such a configuration
1 and 7-2 are used in an overvoltage protection device, when negative static electricity is applied to the input terminal 2, the first diffusion region 24 and the second
The voltage between the diffusion region 25 and the transistors 7-1, 7-
The forward voltage between the two bases and emitters is the same, but each base-emitter voltage has a different value. That is, when discharging static electricity, part of the discharge current flows through the resistance 35.
As a result, a voltage drop occurs at the resistor 35, and the voltage between the base and emitter of the transistor 7-1 increases
This is larger than the base-emitter voltage of -2.

As a result, the transistor 7-1 causes an excessive emitter current to flow, a low impedance current path is formed between the power supply terminal 4 and the signal terminal 2, and the electric charge applied to the signal terminal 2 is instantly Can be discharged. The transistor 7-2 and the resistor 35 can divide the surge voltage applied to the signal terminal 2 and sufficiently clip the surge voltage applied to the internal circuit, and the protection circuit protects the internal circuit 3 from static electricity. Functions can be strengthened.

In FIG. 5, distributed transistor 7-1
The area of the opening 27, which is an emitter contact portion, is larger than that of the opening 28. This is transistor 7-
By widening the width of the second diffusion region 25, which is the emitter region of the transistor 1, and widening the area of the opening 27, which is the emitter contact part, the current capability of the distributed transistor 7-1 is made higher than that of the distributed transistor 7-2. This makes it possible to increase the permissible instantaneous current when discharging static electricity. The area of the opening 27 is the same as that of the wiring body 29 and the second diffusion layer 25.
In order to allow a large current, it is better to have a large area, and good characteristics can be obtained with an area of 10 micrometers square or more.

Further, the second diffusion region 25 is tapered so as to become narrower toward the opening 28. This is because the current capability of the distributed transistor 7-1 is increased by ensuring a sufficient emitter area, and the resistance value of the resistor 35 is increased with a relatively small area, and the surge of the distributed transistor 7-2 is increased. It strengthens the voltage clipping effect. Furthermore, by reducing the resistance value of the resistor 35 near the opening 27 and reducing heat generation near the opening 27, the distributed transistor 7-1 is made less likely to be damaged.

The input voltage applied to the internal circuit 3 is determined by the voltage biased to the second diffusion region 25. For example, when the second diffusion region 25 is an N-type diffusion layer and the first diffusion region 24 (P-type diffusion layer) is grounded, the negative input voltage is limited to about -0.6 (V). Ru. When the first diffusion region 24 is biased with a diode forward voltage, it is limited to about -1.2 (V). Therefore, in normal operation when the power supply voltage is applied to the power supply terminal of the IC, problems may occur if the input voltage of the IC is limited. It is necessary to set the bias voltage for one diffusion region 24.

[0048] The above explanation has been made regarding an overvoltage protection device formed on a P-type semiconductor substrate, but even if the overvoltage protection device is formed on an N-type semiconductor substrate, P-type and N-type By replacing the semiconductor region of the mold,
Needless to say, similar effects can be obtained.

Furthermore, although the embodiments described above have proposed a structure of a protection transistor with a minimum chip area and low saturation resistance, if one ignores the fact that the shape of the protection transistor becomes somewhat large, it is possible to use buried diffusion. layer and collector wall layer are not particularly required, and the same effects as the present invention can be obtained even without them.

[0050]

As described above, the present invention can reduce the voltage between the collector and emitter of the protection transistor by connecting a means for generating a voltage drop such as a resistor or a diode to the base of the protection transistor. It is possible to secure a saturation margin, clip the voltage of static electricity applied to the signal terminal of the IC, protect the internal circuit from static electricity, and improve the reliability of the IC.

[Brief explanation of drawings]

FIG. 1: Equivalent circuit diagram of an overvoltage protection device in a first embodiment of the present invention.

[Fig. 2] A cross-sectional view of a main part of a more specific embodiment of the embodiment shown in Fig. 1.

FIG. 3 is a cross-sectional view of the main parts of the second embodiment of the present invention.

[Figure 4]
A sectional view of the main parts of the third embodiment of the present invention

FIG. 5 is a plan view of the main parts of the fourth embodiment of the present invention.

[Fig. 6] Cross-sectional view taken along line A-A in Fig. 5

[Fig. 7] Equivalent circuit diagram of the fourth embodiment of the present invention

[Figure 8] Equivalent circuit diagram of a conventional overvoltage protection device

[Explanation of symbols]

1 Semiconductor integrated circuit device (IC) 2 Signal terminal 3 Internal circuit 4 First power supply terminal 5 Second power supply terminal 6 Protection diode 7 Protection transistor 8 Parasitic diode 9 Diode 10 First conductivity type Semiconductor substrate 11 Buried diffusion region 12 Island 13 of second conductivity type Isolation diffusion region 14 First diffusion region 15 of first conductivity type 15 Second diffusion region 16 of second conductivity type Third diffusion region 17 of second conductivity type 2nd conductivity type collector wall region 18 2nd conductivity type 4th diffusion region

Claims (4)

[Claims] 1. An internal circuit integrated in a semiconductor integrated circuit; a first power terminal, a second power terminal, and a signal terminal connected to the internal circuit; a collector connected to the first power terminal; a protection transistor whose emitter is connected to the signal terminal; and a diode connected between the base of the protection transistor and a second power supply terminal in the conduction direction between the base and emitter of the protection transistor. Equipped with overvoltage protection device. 2. An internal circuit integrated in a semiconductor integrated circuit, a first power terminal, a second power terminal, and a signal terminal connected to the internal circuit, formed on a first conductivity type substrate, and an epitaxial layer of a second conductivity type connected to the first power supply terminal; a first diffusion region of the first conductivity type formed on the main surface of the epitaxial layer; and a first diffusion region of the first conductivity type formed in the first diffusion region; A second diffusion region of a second conductivity type connected to a signal terminal, and a second diffusion region connected in a conduction direction between the first diffusion region and the second diffusion region between the first diffusion region and the second power supply terminal. Overvoltage protection device equipped with a diode. 3. The overvoltage protection device according to claim 1, wherein the diode is constructed by connecting a plurality of PN junctions in series. 4. An internal circuit integrated in a semiconductor integrated circuit, a first power supply terminal, a second power supply terminal, and a signal terminal connected to the internal circuit, formed on a first conductivity type substrate, and an epitaxial layer of a second conductivity type connected to the first power supply terminal; a first diffusion region of the first conductivity type formed on the main surface of the epitaxial layer; and a second diffusion region formed in the first diffusion region. a third diffusion region of a conductivity type, an insulating film formed on the surface of the semiconductor substrate, and a first diffusion region provided within the third diffusion region.
and a second opening, the first opening is connected to the signal terminal, the second opening is connected to the internal circuit, and the first diffusion region is connected to a predetermined potential point. An overvoltage protection device characterized by: