JPH04343231A - Formation method of solder bump - Google Patents
Formation method of solder bumpInfo
- Publication number
- JPH04343231A JPH04343231A JP11490891A JP11490891A JPH04343231A JP H04343231 A JPH04343231 A JP H04343231A JP 11490891 A JP11490891 A JP 11490891A JP 11490891 A JP11490891 A JP 11490891A JP H04343231 A JPH04343231 A JP H04343231A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- solder bump
- plating
- bump formation
- formation region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 229910000679 solder Inorganic materials 0.000 title claims abstract description 101
- 238000000034 method Methods 0.000 title claims abstract description 19
- 230000015572 biosynthetic process Effects 0.000 title claims abstract description 15
- 238000007747 plating Methods 0.000 claims abstract description 23
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 239000004020 conductor Substances 0.000 abstract description 7
- 238000002844 melting Methods 0.000 abstract description 5
- 230000008018 melting Effects 0.000 abstract description 5
- 238000010438 heat treatment Methods 0.000 abstract 1
- 230000008961 swelling Effects 0.000 abstract 1
- 230000002265 prevention Effects 0.000 description 19
- 238000009792 diffusion process Methods 0.000 description 12
- 238000009736 wetting Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3473—Plating of solder
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は、表面実装デバイスの接
続端子等に被着する半田バンプの形成方法、特に、所定
の半田バンプ形成領域に従来より大きい半田バンプを形
成させるための方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming solder bumps to be attached to connection terminals of surface-mounted devices, and more particularly to a method for forming larger solder bumps than conventional ones in predetermined solder bump formation areas.
【０００２】0002
【従来の技術】従来、半導体チップや回路基板等のパッ
ドに半田バンプを形成する方法として、半田めっき，半
田ボールの接合，ワイヤボンダーを利用する等の方式が
ある。体積の大きい半田バンプの形成には半田ボール方
式を利用するが、比較的小さい領域（小体積）のバンプ
形成にはめっき方式が利用される。2. Description of the Related Art Conventionally, methods for forming solder bumps on pads of semiconductor chips, circuit boards, etc. include methods such as solder plating, solder ball bonding, and the use of a wire bonder. A solder ball method is used to form solder bumps with a large volume, whereas a plating method is used to form bumps in a relatively small area (small volume).
【０００３】他方、半田ワイヤ，ワイヤボンダー装置を
使用するワイヤボンダー方式は、工程の簡易性， 生産
性等において、半田めっき方式および半田ボール接合方
式より優れる。しかし、半田バンプの低融点（例えば
１８０℃以下） 化に対する要望に対し、低融点半田を
使用し例えば直径５０μｍ 程度に半田ワイヤを細くす
ることは、低融点半田の機械的強度が不足し切れ易いた
め、殆ど不可能である。On the other hand, the wire bonder method using a solder wire and a wire bonder device is superior to the solder plating method and the solder ball bonding method in terms of process simplicity and productivity. However, the low melting point of solder bumps (e.g.
180°C or less), it is almost impossible to use a low melting point solder to make the solder wire thinner, for example, to a diameter of about 50 μm, because the mechanical strength of the low melting point solder is insufficient and it easily breaks.
【０００４】図２はめっき方式による半田バンプの従来
の形成方法を説明する概略図である。図２（イ） にお
いて、絶縁基板１の表面に主導体２を形成し、主導体２
の半田バンプ形成領域に半田拡散防止膜３を形成し、拡
散防止膜３の外側に半田濡れ防止金属膜４を形成する。
次いで、図２（ロ） に示す如く、拡散防止膜３が表呈
し半田濡れ防止金属膜４を覆う半田レジスト５を形成し
たのち、拡散防止膜３の上に半田めっき６を被着させる
。しかるのち、レジスト５を除去し半田めっき６を加熱
溶融させると、拡散防止膜３の上には図２（ハ）に示す
如く、半田めっき６が溶融したときの表面張力で盛り上
がった半田バンプ７が形成される。FIG. 2 is a schematic diagram illustrating a conventional method of forming solder bumps using a plating method. In FIG. 2(A), a main conductor 2 is formed on the surface of an insulating substrate 1, and a main conductor 2 is formed on the surface of an insulating substrate 1.
A solder diffusion prevention film 3 is formed in the solder bump formation region, and a solder wetting prevention metal film 4 is formed outside the diffusion prevention film 3. Next, as shown in FIG. 2B, a solder resist 5 is formed to expose the diffusion prevention film 3 and cover the solder wetting prevention metal film 4, and then solder plating 6 is deposited on the diffusion prevention film 3. After that, when the resist 5 is removed and the solder plating 6 is heated and melted, solder bumps 7 are formed on the diffusion prevention film 3, which are raised by the surface tension when the solder plating 6 is melted, as shown in FIG. 2(c). is formed.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、めっき
方式による半田バンプは、めっき厚を数百μｍ レベル
に厚くできないため、半田体積を稼ぐ （盛り上がりを
大きくする） ことが難しいという問題点があった。[Problem to be Solved by the Invention] However, solder bumps formed by plating have a problem in that it is difficult to increase the solder volume (increase the bulge) because the plating thickness cannot be increased to the level of several hundred μm.
【０００６】[0006]
【課題を解決するための手段】本発明はその実施例を示
す図１によれば、半田拡散防止金属膜３が積層された導
体層２の半田バンプ形成領域の外側に半田濡れ性のない
金属膜４を被着し、導体層２の半田バンプ形成領域の上
および半田バンプ形成領域の周囲の金属膜４の上に半田
めっき６を被着し、半田めっき６を加熱溶融せしめ、半
田めっき６が溶融したときの表面張力を利用して、半田
バンプ形成領域に盛り上がった半田バンプ８を形成せし
めることを特徴とする。[Means for Solving the Problems] According to an embodiment of the present invention, as shown in FIG. A film 4 is deposited, a solder plating 6 is deposited on the metal film 4 on the solder bump formation region of the conductor layer 2 and around the solder bump formation region, and the solder plating 6 is heated and melted. It is characterized by forming raised solder bumps 8 in the solder bump forming area by utilizing the surface tension when the solder bumps are melted.
【０００７】[0007]
【作用】上記手段によれば、半田バンプ形成領域より広
い範囲に半田めっき６を被着し、溶融させたときの表面
張力を利用して、半田バンプ形成領域に半田バンプ８を
形成せしめるため、その半田バンプ８は、半田バンプ形
成領域が従来と同じであるとき、従来の半田バンプより
も盛り上がりが大きく（大体積に）なる。[Operation] According to the above means, the solder plating 6 is applied over a wider area than the solder bump forming area, and the surface tension when melted is used to form the solder bump 8 in the solder bump forming area. The solder bump 8 has a larger swell (larger volume) than the conventional solder bump when the solder bump formation area is the same as the conventional one.
【０００８】[0008]
【実施例】図１は本発明の実施例による半田バンプ形成
方法の説明図であり、図２と共通部分には同一符号を使
用している。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an explanatory diagram of a solder bump forming method according to an embodiment of the present invention, and the same reference numerals are used for parts common to those in FIG.
【０００９】図１（イ） において、絶縁基板１の表面
に主導体２を形成し、主導体２の上に半田拡散防止膜３
を形成し、半田バンプ形成領域に対応する半田拡散防止
膜３の一部を表呈せしめる半田濡れ防止金属膜４を形成
する。半田バンプ形成領域に対応しない部分で半田拡散
防止膜３を覆う半田濡れ防止金属膜４は、例えばチタン
やクロムを使用する。In FIG. 1A, a main conductor 2 is formed on the surface of an insulating substrate 1, and a solder diffusion prevention film 3 is formed on the main conductor 2.
, and a solder wetting prevention metal film 4 exposing a part of the solder diffusion prevention film 3 corresponding to the solder bump forming region is formed. For example, titanium or chromium is used for the solder wetting prevention metal film 4 that covers the solder diffusion prevention film 3 in a portion that does not correspond to the solder bump formation region.
【００１０】次いで図１（ロ） に示す如く、半田バン
プ形成領域の外側に半田濡れ防止金属膜４の一部、を表
呈せしめる半田レジスト５を形成したのち、表呈する半
田濡れ防止膜３の表面およびその外側に表呈する半田濡
れ防止金属膜４の一部に半田めっき６を被着させる。Next, as shown in FIG. 1B, after forming a solder resist 5 that exposes a part of the solder wetting prevention metal film 4 outside the solder bump formation area, the exposed solder wetting prevention film 3 is removed. Solder plating 6 is applied to the surface and a part of the solder wetting prevention metal film 4 exposed on the outside thereof.
【００１１】次いで、図１（ハ） に示す如く、半田レ
ジスト５を除去して半田めっき６を加熱溶融させると、
溶融半田には表面張力が発生し、半田濡れ防止金属膜４
の一部分に被着し溶融したものも半田拡散防止膜３の上
に集まるようになり、半田拡散防止膜３の上には、山形
に盛り上がった半田バンプ８が形成される。Next, as shown in FIG. 1(c), when the solder resist 5 is removed and the solder plating 6 is heated and melted,
Surface tension occurs in the molten solder, and the metal film 4 prevents solder wetting.
The partially adhered and melted solder bumps 8 also collect on the solder diffusion prevention film 3, and a mountain-shaped raised solder bump 8 is formed on the solder diffusion prevention film 3.
【００１２】かかる半田バンプ８は、半田濡れ防止金属
膜４の上に被着した半田めっき６の一部が、溶融時の表
面張力によって半田拡散防止膜３の表呈部分に集められ
るようになるため、従来の半田バンプ７より大きく盛り
上がる。In the solder bump 8, a part of the solder plating 6 deposited on the solder wetting prevention metal film 4 is collected on the exposed portion of the solder diffusion prevention film 3 due to the surface tension during melting. Therefore, the solder bumps 7 are raised larger than the conventional solder bumps 7.
【００１３】[0013]
【発明の効果】以上説明したように本発明方法によれば
、従来と同じ大きさの半田バンプ形成領域に、従来より
も大体積の半田バンプを形成可能とし、半田バンプを利
用した電気的接続の信頼性を向上した効果がある。As explained above, according to the method of the present invention, it is possible to form a larger volume of solder bumps than conventionally in a solder bump forming area of the same size as conventionally, and to improve electrical connection using solder bumps. This has the effect of improving reliability.
【図１】 本発明の実施例による半田バンプ形成方法
の説明図である。FIG. 1 is an explanatory diagram of a solder bump forming method according to an embodiment of the present invention.
【図２】 めっき方式による従来の半田バンプ形成方
法の説明図である。FIG. 2 is an explanatory diagram of a conventional solder bump forming method using a plating method.
１は絶縁基板 ２は主導体層 ３は半田拡散防止金属膜 ４は半田濡れ性のない金属膜 ５は半田レジスト ６は半田めっき ８は半田バンプ 1 is an insulating substrate 2 is the main leadership layer 3 is a metal film to prevent solder diffusion 4 is a metal film with no solder wettability 5 is solder resist 6 is solder plating 8 is solder bump
Claims (1)
の外側に半田濡れ性のない金属膜（４） を被着し、該
導体層（２） の半田バンプ形成領域の上および該半田
バンプ形成領域の周囲の該金属膜（４） の上に半田め
っき（６） を被着し、該半田めっき（６） を加熱溶
融せしめ、該半田めっき（６） が溶融したときの表面
張力を利用して、該半田バンプ形成領域に盛り上がった
半田バンプ（８） を形成せしめることを特徴とする半
田バンプの形成方法。1. A non-solder wettable metal film (4) is deposited on the outside of the solder bump forming area of the conductive layer (2), and the metal film (4) is coated on the outside of the solder bump forming area of the conductive layer (2) and on the solder bump forming area. A solder plating (6) is deposited on the metal film (4) around the formation area, the solder plating (6) is heated and melted, and the surface tension when the solder plating (6) is melted is utilized. A method for forming a solder bump, comprising: forming a raised solder bump (8) in the solder bump forming area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11490891A JPH04343231A (en) | 1991-05-20 | 1991-05-20 | Formation method of solder bump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11490891A JPH04343231A (en) | 1991-05-20 | 1991-05-20 | Formation method of solder bump |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04343231A true JPH04343231A (en) | 1992-11-30 |
Family
ID=14649644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11490891A Withdrawn JPH04343231A (en) | 1991-05-20 | 1991-05-20 | Formation method of solder bump |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04343231A (en) |
-
1991
- 1991-05-20 JP JP11490891A patent/JPH04343231A/en not_active Withdrawn
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Application deemed to be withdrawn because no request for examination was validly filed |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19980806 |