JPH04342919A - Fuse detecting circuit - Google Patents

Abstract

PURPOSE:To reduce the power consumption in a fuse detecting circuit and the area of a resistor part. CONSTITUTION:A resistor 6 and a fuse 1A are connected in series to a power supply VDD, further the drain of an N channel transistor 4A is connected to the other end of the fuse 1A. The transistor 4A is intermittently driven by the signal PSI'cp being input in a gate. A condenser 5A, as well as the source of the transistor 4A, is connected to a power supply VSS. The other end of the condenser 5A is connected to the input end of an inverter 3A together with the drain of the transistor 4A. In the case where the transistor 4A is being driven, the information about the on and off of the fuse 1A is transmitted to the inverter 3A. In the case where the transistor 4A is not driven, the information is held by the condenser 5A and is transmitted to the inverter 3A. The consumed current intermittently flows.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fuse detection circuit for determining whether a fuse is on or off.

0002

2. Description of the Related Art FIG. 4 is a circuit diagram showing a conventional fuse detection circuit.

One end of a resistor 2 is connected to the high potential power supply VDD, one end of a fuse 1 is connected to the low potential power supply VSS, and the other end of the resistor 2 and the other end of the fuse 1 are connected to the input terminal of an inverter 3. are commonly connected.

Next, the operation will be explained. now fuse 1
Suppose that it is on. In this case, current flows from the power supply VDD through the resistor 2 and fuse 1. Now, considering that the inverter 3 has a high input impedance, for example, a CMOS inverter, the potential at the input terminal of the inverter 3 becomes a value determined by resistance division between the resistance value of the resistor 2 and the resistance value of the fuse 1. Therefore, if the value of the resistor 2 is selected to be large so that the input level to the inverter 3 is low when the fuse 1 is on, the output level of the inverter will be high. Next, assume that fuse 1 is off, that is, fuse 1 is cut. In this case, the input level of the inverter 3 becomes a high level, and therefore the output level of the inverter 3 becomes a low level. As described above, whether the fuse 1 is on or off can be detected based on the output level of the inverter 3.

[0005]

[Problems to be Solved by the Invention] Since the conventional fuse detection circuit is configured as described above, when fuse 1 is on, current always flows from power supply VDD to power supply VSS through high resistor 2 and fuse 1. flows. Therefore, the power consumption is large, and when a large number of fuse detection circuits are used, the same number of resistors 2 must be provided for a plurality of fuses 1, and the area of the resistors 2 as a whole becomes large.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a fuse detection circuit that can reduce power consumption and reduce the area of the resistor section.

[0007]

[Means for Solving the Problems] A fuse detection circuit according to the present invention includes a pulse generation circuit, a first potential point, a second potential point, a resistor, a fuse, a transistor provided in the fuse, and a capacitor. and an inverter.

[0008] One end of the resistor is connected to a first potential point. The other end is connected to one end of the fuse.

The other end of the fuse is commonly connected to the first electrode of the transistor and the input end of the inverter.

A control electrode of the transistor is connected to a pulse generating circuit, and a second electrode thereof is connected to a second potential point.

[0011] A capacitor is provided between the first and second electrodes of the transistor.

Note that the input impedance of the inverter provided for the fuse is set to be sufficiently large with respect to the value of the capacitor.

[0013]

[Operation] The transistor in this invention is driven intermittently. The potential of the first electrode of the transistor during driving provides information about whether the fuse is on or off to the input terminal of the inverter. The capacitor holds the information when the transistor is not driven.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a case where the present invention is applied to a plurality of fuse detection circuits. Fuse 1A, 1B, 1
C has one end thereof commonly connected to the resistor 6. N
The drains of channel transistors 4A, 4B, and 4C are connected to the other ends of fuses 1A, 1B, and 1C, respectively, and the sources are commonly connected to power supply VSS. Capacitors 5A, 5B, 5C are transistors 4A, 4, respectively.
They are connected between the sources and drains of B and 4C, respectively. Inverters 3A, 3B, 3C have fuses 1A, 1
Connection points between transistors B and 1C and transistors 4A, 4B and 4C serve as respective input terminals. The VBB generation circuit uses the signal ΨC
P is generated, and this signal ΨCP becomes a signal Ψ'CP whose duty is further reduced by a frequency dividing circuit. Transistors 4A, 4B, and 4C are driven by the output signal Ψ'CP from the frequency divider circuit.

Here, the value of the resistor 6 is the fuse 1A, 1B.
, 1C, ... are in the on state, and the transistor 4A
, 4B, 4C, ... are in the driving state, the inverter 3
They are chosen to be small so as to give high levels to the input terminals of A, 3B, 3C, .

FIG. 3 shows an example of a signal ΨCP and a signal Ψ'CP whose duty is reduced by a frequency dividing circuit. Since the transistors 4A, 4B, 4C, . . . are N-channel transistors, in order to reduce their drive duty, the frequency is divided so that positive direction pulses are generated intermittently.

Next, the operation of the present invention will be explained. FIG. 2 is a circuit diagram showing a single fuse detection circuit, which is a portion of FIG. In Fig. 2, the output signal ΨCP of the frequency dividing circuit
When the N-channel transistor 4A is intermittently driven by If the inverter 3 is in the off state, a low level is applied to the input terminals of the inverter 3, respectively.

The on/off determination result of 1A indicates that even if the N-channel transistor 4A is not driven by the signal Ψ'CP, the level of the input terminal of the inverter 3 in the driven state is maintained in the capacitor 5A. Therefore, it is held until the next time the N-channel transistor is driven by the signal Ψ'CP.

On the other hand, by driving the transistor 4A intermittently, current is prevented from continuously flowing through the resistor 6, and power consumption is reduced.

The above operation is the same even when a plurality of fuse detection circuits are connected as shown in FIG. 1, and the resistor 6 can be used in common. Therefore, even if the number of connected fuse detection circuits increases, the area required for the resistor 6 will not increase.

In the above embodiment, an N-channel transistor is used as the transistor, but a structure complementary to this may be used. In other words, the resistor 6 is connected to the low potential power supply VS
S, a P-channel transistor is used as the transistor, and its source is connected to the high potential power supply V together with one end of the capacitor.
It is also possible to connect each to the DD. in this case,
Considering the effect of reducing power consumption, the signal Ψ′CP
Contrary to the case shown in FIG. 3, it is desirable to set the duty so that pulses in the negative direction are intermittently generated from a high potential level.

[0022]

As described above, according to the present invention, the transistor connected in series with the fuse is driven intermittently by pulses, and when the fuse is on, the current flows for a short period of time. The fuse detection circuit determines whether the fuse is on or off in between, and the result is stored in the capacitor even when the transistor is not driven, which is effective in reducing power consumption and can be applied to multiple fuse detection circuits. This has a great effect in reducing the area of the resistance section.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a fuse detection circuit including a plurality of fuses according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing part of the fuse detection circuit of FIG. 1;

FIG. 3: Signals ΨCP, Ψ′ used in an embodiment of the present invention
It is a waveform diagram of CP.

FIG. 4 is a circuit diagram of a conventional fuse detection circuit.

[Explanation of symbols]

1A, 1B, 1C Fuse 3A, 3B, 3C Inverter 4A, 4B, 4C N-channel transistor 5A, 5
B, 5C capacitor

Claims (1)

[Claims] 1. A fuse having a pulse generating circuit, a first potential point, a second potential point, a resistor having one end connected to the first potential point, and one end connected to the other end of the resistor. an inverter having an input end connected to the other end of the fuse and having high input impedance; a control electrode connected to the pulse generation circuit; and a first electrode connected to the input end of the inverter. and a second electrode connected to the second potential point, and a capacitor connected between the first electrode and the second electrode of the transistor.