JPH04326574A - Manufacture of semiconductor storage device - Google Patents

Abstract

PURPOSE:To realize a short ROM in TAT by coding in the final stage of wafer processing. CONSTITUTION:A writing circuit is made to write in data at a time on all memory cells of a UV-EPROM. An ultraviolet-ray shielding film 111 having an opening 110 is formed on a specified memory cell section. After the data are equivalently written in on all memory cells in a wafer processing, the data of the memory cells within the opening section are erased by irradiating ultraviolet-rays.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor memory device, and more particularly to a method of manufacturing a nonvolatile semiconductor memory device.

0002

[Prior Art] Conventional non-volatile semiconductor memory devices include an ion implantation type in which data is written by converting an enhancement type transistor into a depletion type transistor through ion implantation, and a type in which transistors are connected to bit lines using aluminum wiring. There is an aluminum switching type that writes data.

[0003] Also, as a memory element, a non-volatile semiconductor memory device (UV
-EPROM).

0004

[Problems to be Solved by the Invention] In these conventional nonvolatile semiconductor memory devices, when ion implantation is used, the area of the memory element region is small, but since the ion implantation process is in the first half of the diffusion process, It takes time to (TA
The problem was that the T was long. On the other hand, in the case of the aluminum switching type, since the aluminum wiring process is performed in the latter half of the diffusion process, although the TAT is short, there is a problem that the memory element area becomes large. Also, UV-EPRO
Since data is written to the M after the product is manufactured, it becomes a storage device that can read the necessary data on the spot. However, when writing data, data is written one address at a time, so it takes time to write data, and a large amount of data is written. There was a problem that it was not suitable for cases where it was necessary.

[0005]

[Means for Solving the Problems] A method for manufacturing a semiconductor memory device according to the present invention includes a UV-EPROM array and a UV-EPROM array.
- A step of integrating and forming on the same semiconductor substrate a circuit that simultaneously accesses and writes to all memory cells of the EPROM array, and forming an ultraviolet shielding film having an opening in a predetermined memory cell portion of the UV-EPROM array. a step of writing to all memory cells of the UV-EPROM array; and a step of irradiating ultraviolet rays to erase stored information from the memory cells corresponding to the openings of the ultraviolet shielding film. be.

[0006]

Embodiment Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a semiconductor memory device (ROM) according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a semiconductor chip showing a memory cell.

In this embodiment, the UV-EPROM array 6
and a step of integrating and forming a circuit on the same semiconductor substrate that simultaneously accesses and writes to all memory cells of the UV-EPROM array 6; and A step of forming the shielding film 111, a step of writing to all memory cells of the UV-EPROM array 6, and a step of irradiating ultraviolet rays to erase stored information from the memory cells corresponding to the openings 110 of the ultraviolet shielding film 111. It is said that it has.

The UV-EPROM array 6 is a conventional UV-EPROM array 6.
-It has almost the same structure as an EPROM array, but
As shown in FIG. 2, the difference is that an ultraviolet shielding film 111 such as an aluminum film is provided on the insulating film 109.

In terms of circuitry, the address control circuit 10 has been increased, and the write circuit 2 has been modified so that when a write enable signal is input to the write control terminal 1, the address select signal 3 becomes "H". Conventional UV-
It is the same as EPROM.

That is, in the same manner as conventional UV-EPROM, a wafer on which a UV-EPROM array and other circuits are formed is prepared, and then an aluminum film is exposed to UV-E.
is formed on the PROM, and an opening 110 is formed in a predetermined memory cell portion.
will be established.

Next, after forming the ultraviolet shielding film 111 and before mounting the semiconductor chip on the package and performing wire bonding, writing is performed on all memory cells at an appropriate stage. That is, when a write enable signal is input from the write control terminal 1, the write circuit 2 outputs an address select signal 3 and a write data signal 4. The address control circuit 10 receives the UV-
The aforementioned storage element (memory cell) of the EPROM array 6 is selected, data is written into the aforementioned storage element, and charges are stored in the floating gate 106.

Next, the coding is completed by erasing the stored information in the memory cell directly under the opening 110 by irradiating ultraviolet rays. Next, the ultraviolet shielding film 111
may be removed; in this case, the written data cannot be visually recognized, which is advantageous in terms of confidentiality. Note that at the stage of assembly into a package, the write control terminal 1 is not connected to an external lead, but is connected to a ground terminal. Then, it can be used as a ROM. In addition, the package should be one that does not transmit ultraviolet rays.

[0014]

As described above, the present invention has the advantage that data writing can be performed in the final process of the wafer stage after the diffusion process and the wiring process, and the TAT can be shortened. Furthermore, since writing can be performed in units of wafers, it is very efficient.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a ROM according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor chip showing a memory cell portion of a ROM according to an embodiment of the present invention.

[Explanation of symbols]

1 Write control circuit 2 Write circuit 3 Address select signal line 4 Data signal line 5 Address decoder 6 UV-EPROM array 7 Output buffer 8 Output terminal 9 Address terminal 10 Address control circuit 101 P-type silicon substrate 102 N-type drain region 103 N-type source region 104 Field oxide film 105 First gate insulating film 106 Floating gate 107 Second gate insulating film 108 Control gate 109 Insulating film 110 Opening 111 Ultraviolet shielding film

Claims (1)

[Claims] Claim 1: A UV-EPROM array and the U
A step of integrating and forming a circuit on the same semiconductor substrate to simultaneously access and write to all memory cells of the V-EPROM array, and a step of forming an ultraviolet shielding film having an opening in a predetermined memory cell portion of the UV-EPROM array. a step of writing into all memory cells of the UV-EPROM array; and a step of irradiating ultraviolet rays to erase stored information from the memory cells corresponding to the openings of the ultraviolet shielding film. A method for manufacturing a semiconductor memory device characterized by: