JPH04324492A - Monitor interface - Google Patents

Abstract

PURPOSE:To correct a difference in display start position which is generated among various personal computer as to the monitor interface between the personal computers and a monitor for an LCD personal computer by adjusting the difference in former period timing which is generated among information processing units (personal computers) by replacing a previously set correcting means. CONSTITUTION:There is the monitor interface 1 which corrects the signal from the information processing unit 2 is interposed between the information processing unit 2 and LCD monitor 3. The monitor interface 1 is detachable and a means which corrects the display timing of a signal inputted to the LCD monitor 3 is provided for the signal connection between the information processing unit 2 and LCD monitor 3. Thus, the interface 1 which can be replaced is provided between the information processing unit 2 and LCD monitor 3 and then even the same monitor is usable for many kinds of information processing unit which differ in the output timing of the video signal about the vertical and horizontal synchronizing signals.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of an interface for signal connection between an information processing apparatus and an LCD monitor used as a display terminal thereof.

0002

2. Description of the Related Art FIG. 2 is a block diagram showing the relationship between a conventional information processing device 2 and a CRT monitor 4, which is a display. Conventional information processing device 2 and display C
The interface with the RT monitor 4 can be provided by having an interface section in the information processing device 2 or by using a CR
The CRT monitor 4 was either of the type with an interface section, and the external appearance was such that the information processing device 2 and the CRT monitor 4 were directly connected, as shown in FIG.

FIG. 3 shows a display on a CRT monitor 4 when two types of information processing apparatuses, information processing apparatus A and information processing apparatus B, which have different output timings of video signals in response to horizontal and vertical synchronization signals are used. It is a figure showing the difference in position. Screen A5 and screen B6 are display screen ranges when information processing device A and information processing device B are used, respectively. The shaded portions of waveforms (A) and (C) are the horizontal video signal output periods of screen A5 and screen B6, respectively.Similarly, the shaded portions of waveforms (A') and (C') are the periods of video signal output in the horizontal direction of screen A5 and screen B6, respectively. This is a vertical video signal output period of screen B6. The times from the rise of the horizontal synchronizing signal (A) until the video signals of waveform (B) and waveform (C) are output are H and I, respectively. Further, the times from the rise of the vertical synchronizing signal (A') until the video signals of waveform (A') and waveform (C') are output are J and K, respectively. Looking at the horizontal direction, you can see the horizontal synchronization signal (A), screen A5, and screen B.
H which is the difference from the time until the video signal of 6 is output
and I, this appears as a horizontal positional shift between screen A5 and screen B6 on the CRT screen. Similarly, in the vertical direction, the vertical synchronization signal (A'), screen A5, and screen B6
J and K, which are the differences in the time taken until the video signal is output, appear as a vertical positional shift between screen A5 and screen B6 on the CRT monitor 4. In this way, the display position differs depending on the type of information processing device 2. However, C
RT monitor 4 is CR even if the display position is slightly shifted vertically or horizontally.
As long as the scanning line of the T monitor 4 moves within the range, there will be no display problem. FIG. 4 is a diagram showing signals for screen display on the conventional LCD monitor 3. In order to display screen A5, a period (a) and (a') during which the video signal of the information processing device 2 is output, and a signal (e) and (d') that the LCD monitor 3 accepts the video signal are required. was. Hereinafter, this signal will be referred to as a video display period signal. If we now accept a video signal when the video display period signal is at a high level, the LCD monitor 3 will display periods (a) and (a') during which the video signal is output.
) and the periods (e) and (e') when the video display period signal is at a high level, the output timings coincide both horizontally and vertically, so that the entire image is displayed correctly. The video display period signal is a signal created inside the LCD monitor based on the horizontal and vertical synchronization signals, so regardless of the type of information processing device, it is a fixed time from each horizontal and vertical synchronization signal, time H in the horizontal direction, and time H in the vertical direction. This is a signal that becomes high level after time J has elapsed. On the other hand, the period from the horizontal and vertical synchronization signals to the output of the video signal differs depending on the type of information processing device. Therefore, when the information processing device 2 of another model with a different video signal output timing is used for the LCD monitor 3, the output period of the video signal and the high level period of the video display period signal do not match, resulting in a portion of the top, bottom, left, and right of the display screen. There was a problem in that it would no longer be displayed. Figure 1 shows the improvement measures.
The configuration is such that a replaceable monitor interface 1 is provided between the information processing device 2 and the LCD monitor 3 as shown in FIG. By adding a function to correct the display position,
It can be adjusted to CD monitor 3.

0004

The problem to be solved by the invention is that when an LCD monitor is connected to an information processing device, some areas are not displayed.

[0005]

[Means for Solving the Problems] A monitor interface between an information processing device of the present invention and an LCD monitor used as a display terminal thereof has means for correcting the display timing of a signal input to the LCD monitor, and the information It has been realized that the difference in early timing that occurs for each processing device can be adjusted by replacing the correction means set in advance.

[0006]

Embodiment FIG. 1 is a block diagram of an embodiment of the present invention. There is an exchangeable monitor interface 1 between the information processing device 2 and the LCD monitor 3 that corrects the signal from the information processing device 2.

FIG. 5 shows a display on the LCD monitor 3 when two types of information processing apparatuses, information processing apparatus A and information processing apparatus B, which have different output timings of video signals in response to horizontal and vertical synchronization signals are used. It is a figure showing the difference in position.

Screen A5 and screen B6 in FIG. 5 are L when information processing device A and information processing device B are used, respectively.
This is a screen displayed on the CD monitor 3. The waveform in Figure 5 (
The shaded areas in a) and (c) are information processing device A, respectively.
This is a period during which the horizontal video signals of screen A5 and screen B6 output from screen A5 and screen B are output. Waveform in Figure 5 (A'
) and (U') are the information processing device A, respectively.
This is a period during which vertical video signals of screen A5 and screen B6 output from screen A5 and screen B are output. The times from the rise of the horizontal synchronizing signal (A) until the video signals of waveform (B) and waveform (C) are output are H and I, respectively. Also, the waveform (A') starts from the rising edge of the vertical synchronization signal (A').
) and the time until the video signals of waveform (c') are output are J and K, respectively. The video display period coincides with the output timing of video signals such as waveforms (E) and (E') so that the screen A5 when using the information processing device A is displayed correctly on the LCD monitor 3 without any deviation. The signal is set. Here, when information processing device A is replaced with information processing device B, the high level period of the video display period signal (d),
(E') does not change, but the output period of the video signal changes (C),
As shown in (C'), there is a portion 7 that is not displayed on the LCD monitor 3 as shown in FIG. In order to correctly display the video signal output from the information processing device B on the LCD monitor 3, it is necessary to delay the output timing of the video display period signal so that the high level period coincides with the video signal output period. An example for matching these signals is shown in FIGS. 6, 7, and 8.

FIG. 6 is a circuit diagram of the monitor interface 1 portion. 7 is a diagram showing a horizontal timing chart of the circuit shown in FIG. 6. In FIG. FIG. 8 is a diagram showing a vertical timing chart of the circuit shown in FIG. 6. As described above, in the video signal, the output timing of the video signal with respect to the horizontal and vertical synchronization signals differs depending on the information processing device used. On the other hand, the video display period signals (d) and (m) are horizontal and vertical synchronization signals (b),
(k) is set to become high level after a certain period of time has passed since input. The video signal of screen A5 using information processing device A is output to the shaded areas in (c) and (l). Assuming that the screen A5 is correctly displayed on the LCD monitor 3, the video display signals will be as shown in (d) and (m). This signal is generated at a time H from the horizontal synchronization signal (b).
, is a signal that becomes high level after a time J delay from the vertical synchronizing signal (k). Here, information processing device B is used instead of information processing device A. Assume that the video signal of screen B6 of information processing device B is output to the shaded areas in (e) and (n). This signal is output with a delay of time I from the horizontal synchronization signal (b) and a time K from the vertical synchronization signal (k). In order to correctly display the signal on screen B6 on the LCD monitor 3,
Video display period signals (g) and (p) that are at a high level for the same period as the periods (e) and (n) during which the video signals are output are required. The necessary video display period signal (g)
, (p), the signals (f) and (o) which become high level a certain time before time H in the horizontal direction and time J in the vertical direction are substituted for the horizontal and vertical synchronization signals (b) and (k). It is a good idea to use it. By inputting the signals (f) and (o) to the horizontal and vertical synchronizing signal input terminals of the LCD monitor 3, the video signal of the screen B6 is correctly displayed on the LCD monitor 3. The method is shown below. In order to match the horizontal video display period signal to the video signal, the signal (a
) is input to clock input terminals A17 and B18 of counter A11 and counter B12. The horizontal synchronizing signal 9 is inputted to the reset terminals of the counters A11 and B12 so as to be reset at a low level. The dot clock 8 is counted in the counter A11 so that the output from the counter A11 generates a pulse a certain time H before the start position of the video signal (c) on the screen A5. In addition, the counter B12 is set so that the output from the counter B12 outputs a pulse at the starting position of the low level of the horizontal synchronizing signal 9.
Count 8 dot clocks within 12. The output signal (h) of the counter A11 and the output signal (i) of the counter B12 are set and reset by the flip-flop A, respectively.
When input to the set terminal A25 and reset terminal A27 of No. 15, the waveform (e) is the period during which the video signal is output.
A signal 31 necessary for making the video display period signal high level is output during the same period as the shaded portion. Similarly, in order to create a vertical video display period signal, the signal (i)
The horizontal synchronization signal 9 which is
14 clock input terminals C19 and D20. The reset terminals of the counters C13 and D14 are reset at low level and the vertical synchronization signal 10 is input. The horizontal synchronizing signal 9 is counted in the counter C13 so that the output from the counter C13 outputs a pulse a fixed time J before the start position of the video signal of the screen A5. Further, the horizontal synchronizing signal 9 is counted in the counter D14 so that the output from the counter D14 outputs a pulse at the starting position of the low level of the vertical synchronizing signal 10. When the output signal (q) of the counter C13 and the output signal (r) of the counter D14 are input to the set terminal B26 and the reset terminal B28 of the set/reset flip-flop B16, respectively, a waveform (n) which is the period during which the video signal is output is obtained. A signal 32 necessary for making the video display period signal high level is output during the same period as the shaded portion.

[0010] Furthermore, this monitor interface
It is provided in the form of a C card or a circuit board such as an interface board, and may be attached to either the LCD monitor side or the information processing device side, or may be independent.

[0011]

[Effect of the invention] As explained above, the information processing device and L
By providing an exchangeable interface between CD monitors, even the same LCD monitor can be used with many types of information processing apparatuses that output video signals at different timings for horizontal and vertical synchronization signals. LCD monitors are expensive, so even when you buy a new information processing device, you can continue to use the same LCD monitor.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the relationship between an interface between an information processing device and an LCD monitor according to the present invention.

[Figure 2] Conventional information processing device, LCD monitor, and CRT
FIG. 2 is a block diagram showing the relationship between monitors.

[Figure 3] CRT display screen of two types of information processing devices
FIG. 3 is a diagram showing how it looks on a monitor.

FIG. 4 is a diagram showing an LCD monitor, a video signal, and a video display signal.

[Figure 5] LCD display screens of two types of information processing devices
FIG. 2 is a diagram showing how it looks on a monitor and a diagram showing signals for display required on the screen.

FIG. 6 is a diagram showing a circuit configuration of an interface of the present invention.

FIG. 7 is a timing chart until a horizontal display signal is generated.

FIG. 8 is a timing chart diagram up to the generation of a vertical display signal.

[Explanation of symbols]

1 Monitor interface 2 Information processing device 3 LCD monitor 4 CRT monitor 5 Screen A 6 Screen B 7 Not displayed portion 8 Dot clock signal 9 Horizontal synchronization signal 10 Vertical synchronization signal 11 Counter A 12 Counter B 13 Counter C 14 Counter D 15 Set reset flip flop B16
Set reset flip-flop A17
Clock input terminal A 18 Clock input terminal B 19 Clock input terminal C 20 Clock input terminal D 21 Reset terminal A 22 Reset terminal B 23 Reset terminal C 24 Reset terminal D 25 Set terminal A 26 Set terminal B 27 Reset terminal E 28 Reset terminal F 29 Clock input terminal E 30 Clock input terminal F 31 Horizontal video display period signal 32 Vertical video display period signal

Claims (1)

[Claims] 1. In a signal connection between an information processing device and an LCD monitor used as a display terminal for the information processing device, the device has means for correcting the display timing of a signal input to the LCD monitor, and has a means for correcting the display timing of a signal input to the LCD monitor, which corrects differences in early timing that occur for each information processing device. A monitor interface characterized in that adjustment is possible by replacing the correction means set in advance.