JPH04318522A - Thin film transistor type liquid crystal display device - Google Patents

Thin film transistor type liquid crystal display device

Info

Publication number
JPH04318522A
JPH04318522A JP3085535A JP8553591A JPH04318522A JP H04318522 A JPH04318522 A JP H04318522A JP 3085535 A JP3085535 A JP 3085535A JP 8553591 A JP8553591 A JP 8553591A JP H04318522 A JPH04318522 A JP H04318522A
Authority
JP
Japan
Prior art keywords
electrode
liquid crystal
thin film
film transistor
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3085535A
Other languages
Japanese (ja)
Inventor
Shigeki Ogura
小椋 茂樹
Tamahiko Nishiki
玲彦 西木
▲よし▼澤 佳代
Yoshiyo Yoshizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP3085535A priority Critical patent/JPH04318522A/en
Publication of JPH04318522A publication Critical patent/JPH04318522A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136218Shield electrodes

Landscapes

  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To prevent the light leak and deterioration of liquid crystal of a thin film transistor(TFT) type liquid crystal display by eliminating a DC component between a drain electrode and a counter electrode. CONSTITUTION:A shield electrode 7 is formed on the drain electrode 2 of a TFT across an insulating film. The shield electrode 7 is connected electrically to the counter electrode. Consequently, the shield electrode 7 and counter electrode are disconnected electrically by the shield electrode 6, so no DC component is generated between them. The liquid crystal on the drain electrode, therefore, does not turn ON so no light leak is caused. Further, no DC component is impressed to the liquid crystal, so the liquid crystal does not deteriorates.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、薄膜トランジスタ型液
晶表示装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor type liquid crystal display device.

【0002】0002

【従来の技術】薄膜トランジスタ型液晶表示装置は、そ
の表示品質の優れた点で、フラットパネルディスプレイ
の最有力候補とされ、各社各機関で盛んに研究開発され
、既に実用化・商品化され始めている。特に最近はサイ
ズも大型化し、一方、高精細化も進みつつある。このよ
うな状況になってきたのも薄膜トランジスタ(以下、「
TFT」という)構造に幾多の改良がなされてきた結果
といえる。
[Background Art] Thin-film transistor type liquid crystal display devices are considered to be the most promising candidates for flat panel displays due to their excellent display quality, and have been actively researched and developed by various companies and institutions, and have already begun to be put into practical use and commercialized. . Particularly recently, the size has become larger, and at the same time, the resolution has also been increasing. This situation has come about because of thin film transistors (hereinafter referred to as ``thin film transistors'').
This can be said to be the result of numerous improvements made to the TFT structure.

【0003】図6は従来の薄膜トランジスタ基板の一部
断面図である。これは、今般最も多く採用されている逆
スタガ型のボトムゲート構造といわれるTFTで、ゲー
ト電極32上にゲート絶縁膜34、半導体層35、オー
ミック層36と続き、その上に信号電極であるソース−
ドレイン電極37が設けられる。また、画素電極33の
位置はソース−ドレイン電極37より下の場合もあり、
上の場合もあるが、これは各社の着目する点が異なるだ
けで全体のTFT構造としては大きく変わらない。そし
て、最後にパッシベーション膜38が設けられるという
構造がごく一般的である。このようなTFT構造は、現
在の主流ともいえるもので、各社各機関から数多く発表
されている。
FIG. 6 is a partial cross-sectional view of a conventional thin film transistor substrate. This TFT is said to have an inverted staggered bottom gate structure, which is most commonly used these days.A gate insulating film 34, a semiconductor layer 35, and an ohmic layer 36 are formed on a gate electrode 32, and on top of that is a source which is a signal electrode. −
A drain electrode 37 is provided. Further, the position of the pixel electrode 33 may be lower than the source-drain electrode 37,
The above may be the case, but the only difference is the focus of each company, and the overall TFT structure does not change significantly. A structure in which a passivation film 38 is provided at the end is very common. This type of TFT structure can be said to be the current mainstream, and many companies and organizations have announced it.

【0004】0004

【発明が解決しようとする課題】しかしながら、上記構
成の薄膜トランジスタ型液晶表示装置においては、映像
信号の入るドレイン電極上には、常に何らかの電圧が印
加されており、そのことによって生じるドレイン電極−
対向電極間の電位変動が液晶分子を駆動してしまい、光
漏れとなる。このことの対策としては、対向電極側にブ
ラックマスク層を形成し、この光漏れを遮るようにする
のが一般的に行われているが、ブラックマスク層を形成
するため、どうしても開口率が小さくなってしまうとい
う問題点があった。
[Problems to be Solved by the Invention] However, in the thin film transistor type liquid crystal display device having the above structure, some kind of voltage is always applied to the drain electrode into which a video signal is input, and as a result, the drain electrode
The potential fluctuation between the opposing electrodes drives the liquid crystal molecules, resulting in light leakage. As a countermeasure for this, it is common practice to form a black mask layer on the counter electrode side to block this light leakage, but since the black mask layer is formed, the aperture ratio is inevitably small. There was a problem with this.

【0005】また、この光漏れはそのような対策によっ
て防ぐことができたとしても、ドレイン電極と画素電極
の間に生じる電位変動は防ぎようがない。すなわち、一
旦、ゲート信号によりドレイン電極上の電圧を書き込ま
れた画素電極のすぐ横にドレイン電極があり、そのドレ
イン電極に常に何らかの電圧が印加されているので、ド
レイン電極−画素電極間の容量結合による画素電位変動
もあり、また、一般的に画素電極電位の正・負レベルの
中心値はTFTのゲート電極−ソース電極間容量によっ
て引き起こされる電圧降下により、ドレイン電圧の正・
負レベルの中心値より低くなるので、ドレイン電極−画
素電極間にはDC成分の電圧が常にかかった状態となる
。そして、液晶にDC成分がかかってしまうと、劣化が
著しくなり信頼性がなくなるので、それを防ぐために対
向電極電圧を前記電圧降下に対応して低めに設定するこ
とが行われているが、それを行うと画素電極−対向電極
間の液晶にはDC成分が加わらなくなるものの、今度は
ドレイン電極−対向電極間の液晶にDC成分が加わって
しまい液晶が劣化するという問題点があった。
Furthermore, even if this light leakage can be prevented by such measures, it is impossible to prevent potential fluctuations occurring between the drain electrode and the pixel electrode. In other words, the drain electrode is located right next to the pixel electrode to which the voltage on the drain electrode has been written by the gate signal, and since some voltage is always applied to the drain electrode, capacitive coupling between the drain electrode and the pixel electrode occurs. Generally, the center value of the positive and negative levels of the pixel electrode potential is caused by the voltage drop caused by the capacitance between the gate electrode and the source electrode of the TFT.
Since it is lower than the center value of the negative level, a DC component voltage is always applied between the drain electrode and the pixel electrode. If a DC component is applied to the liquid crystal, the deterioration will be significant and reliability will be lost.To prevent this, the counter electrode voltage is set to be low in accordance with the voltage drop. When this is done, a DC component is no longer added to the liquid crystal between the pixel electrode and the counter electrode, but a DC component is added to the liquid crystal between the drain electrode and the counter electrode, causing the liquid crystal to deteriorate.

【0006】本発明は、上記従来の問題点を解決して、
開口率が大きく、液晶の劣化の少ない、表示品質、信頼
性共に優れた薄膜トランジスタ型液晶表示装置を提供す
ることを目的とする。
The present invention solves the above-mentioned conventional problems, and
It is an object of the present invention to provide a thin film transistor type liquid crystal display device with a large aperture ratio, little deterioration of liquid crystal, and excellent display quality and reliability.

【0007】[0007]

【課題を解決するための手段】前記問題点を解決するた
めに、本発明は、薄膜トランジスタ基板と、液晶を挟ん
で薄膜トランジスタ基板と対向する対向電極基板とを備
えた薄膜トランジスタ型液晶表示装置において、薄膜ト
ランジスタ基板のドレイン電極上に絶縁膜を介して遮蔽
電極を設け、かつ、遮蔽電極に入力する電圧を対向電極
基板の対向電極に入力する電圧と同程度にした。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a thin film transistor type liquid crystal display device including a thin film transistor substrate and a counter electrode substrate that faces the thin film transistor substrate with a liquid crystal in between. A shield electrode was provided on the drain electrode of the substrate via an insulating film, and the voltage input to the shield electrode was made to be approximately the same as the voltage input to the counter electrode of the counter electrode substrate.

【0008】[0008]

【作用】本発明によれば、以上のように薄膜トランジス
タ型液晶表示装置を構成したので、ドレイン電極−対向
電極間は遮蔽電極によって遮蔽される。したがって、ド
レイン電極−対向電極間に電位差が生じても、遮蔽電極
によってドレイン電圧が遮蔽されるので、それらの電極
間にDC成分が発生しなくなり、ドレイン電極上の液晶
がオンしなくなる。
According to the present invention, since the thin film transistor type liquid crystal display device is constructed as described above, the space between the drain electrode and the counter electrode is shielded by the shield electrode. Therefore, even if a potential difference occurs between the drain electrode and the counter electrode, the drain voltage is shielded by the shielding electrode, so no DC component is generated between these electrodes, and the liquid crystal on the drain electrode is not turned on.

【0009】[0009]

【実施例】以下、本発明の実施例について図面を参照し
ながら詳細に説明する。図1は本発明の実施例における
薄膜トランジスタ基板の平面図である。図に示すように
、ゲート電極1とドレイン電極2が交差する部分に、半
導体層5をチャネルとしたトランジスタが形成されてお
り、ゲート電極1に印加される電圧によってこの半導体
層5のスイッチングがなされ、ドレイン電極2の信号が
ソース電極3に書き込まれ、コンタクトホール25を通
して画素電極4に書き込まれる。こういった構成の中で
遮蔽電極6がドレイン電極5の上に平行に設けられてい
る。
Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a plan view of a thin film transistor substrate in an embodiment of the present invention. As shown in the figure, a transistor with the semiconductor layer 5 as a channel is formed at the intersection of the gate electrode 1 and the drain electrode 2, and the semiconductor layer 5 is switched by the voltage applied to the gate electrode 1. , a signal from the drain electrode 2 is written into the source electrode 3 and into the pixel electrode 4 through the contact hole 25. In this configuration, a shielding electrode 6 is provided above and parallel to the drain electrode 5.

【0010】図2は本発明の実施例における薄膜トラン
ジスタ基板の一部(図1のA−A′)断面図である。本
実施例では、ゲート電極1の上にゲート電極1を陽極酸
化してゲート陽極酸化膜7を形成している。ただし、こ
れは主にゲート電極−ドレイン電極間ショートを防ぐ目
的のものであり、本発明に必須の構成用件ではないので
、なくてもよい。そして、ゲート絶縁膜8がゲート陽極
酸化膜7の上にあり、その上に半導体層5があり。また
、ドレイン電極2、ソース電極3との接触部はオーミッ
ク接合層11がある。これらの膜の上に形成されている
のが中間絶縁膜9であり、ソース電極3と画素電極4の
導通をとるためのコンタクトホール25が作られている
。これらの上には、パッシベーション膜10が全面にあ
り、主に液晶層への不純物の溶け込み等を防いだものと
なっている。なお、先に述べた遮蔽電極6はこの図から
分かるように、画素電極と同じ電極材料(例、ITO)
で形成すると、マスク数が増えることがないため、工程
が複雑化しない。
FIG. 2 is a partial cross-sectional view (along line AA' in FIG. 1) of a thin film transistor substrate in an embodiment of the present invention. In this embodiment, a gate anodic oxide film 7 is formed on the gate electrode 1 by anodizing the gate electrode 1. However, this is mainly for the purpose of preventing short circuit between the gate electrode and the drain electrode, and is not an essential component of the present invention, so it may be omitted. The gate insulating film 8 is on the gate anodic oxide film 7, and the semiconductor layer 5 is on it. Further, an ohmic contact layer 11 is provided at the contact portion with the drain electrode 2 and the source electrode 3. An intermediate insulating film 9 is formed on these films, and a contact hole 25 is formed to establish conduction between the source electrode 3 and the pixel electrode 4. A passivation film 10 is provided on the entire surface of these layers, and is mainly used to prevent impurities from dissolving into the liquid crystal layer. As can be seen from this figure, the shield electrode 6 mentioned above is made of the same electrode material as the pixel electrode (for example, ITO).
By forming the mask, the number of masks does not increase, so the process does not become complicated.

【0011】図3は本発明の実施例における薄膜トラン
ジスタ基板の一部(図1のB−B′)断面図である。こ
の図から、本実施例においては遮蔽電極6はドレイン電
極2よりやや広い幅を有していることから、隣の画素電
極4との容量結合も小さくなり、かつドレイン電極信号
の液晶層側への到達も防ぐことができるということが分
かる。
FIG. 3 is a partial cross-sectional view (taken along line BB' in FIG. 1) of a thin film transistor substrate in an embodiment of the present invention. From this figure, it can be seen that in this example, the shield electrode 6 has a slightly wider width than the drain electrode 2, so that the capacitive coupling with the adjacent pixel electrode 4 is also reduced, and the drain electrode signal is transferred to the liquid crystal layer side. It can be seen that it is possible to prevent the arrival of

【0012】図4は本発明の実施例による薄膜トランジ
スタ型液晶表示装置のドレイン電極配線部の断面図であ
る。図に示すように、液晶18が対向電極基板とTFT
基板に狭持されていることが分かる。また、液晶分子を
配向させるために、配向膜12がそれら2枚の基板上に
形成されている。カラーフィルタ層14,15は、ドレ
イン配線やゲート配線の部分をブラックマスク層13で
覆い隠すように形成されており、その上にカラーフィル
タ第1色層14,カラーフィルタ第2色層15があり、
また一般にフィルタ表面を平坦にするための平坦化層1
6がある。
FIG. 4 is a sectional view of a drain electrode wiring portion of a thin film transistor type liquid crystal display device according to an embodiment of the present invention. As shown in the figure, the liquid crystal 18 is connected to the counter electrode substrate and the TFT.
It can be seen that it is held between the boards. Further, an alignment film 12 is formed on these two substrates in order to align the liquid crystal molecules. The color filter layers 14 and 15 are formed so as to cover the drain wiring and the gate wiring with a black mask layer 13, and a color filter first color layer 14 and a color filter second color layer 15 are provided on top of the black mask layer 13. ,
In addition, a flattening layer 1 for flattening the filter surface is generally used.
There are 6.

【0013】対向電極17は全面に形成されており、ソ
ース電極に保持される正・負レベルの中心値に当たる電
位に設定される。遮蔽電極6はドレイン電極5を覆うよ
うにやや幅広く形成されており、かつ遮蔽電極6にも対
向電極17と同じ電位が設定されているので、ドレイン
電極−対向電極間に電位差を生じても、遮蔽電極6によ
ってドレイン電圧は遮蔽され、ドレイン電極5上の液晶
18がONすることもなく、よって光漏れも生じない。 また、画素電極4に保持された電圧の正・負レベルの中
心値は対向電極電位、すなわち遮蔽電極電位に等しいの
で、遮蔽電極−画素電極間にDC成分は生じない。さら
に、画素電極4と対向電極17の間は、正・負対称の交
流電圧が印加されるので、DC成分は生じない。
The counter electrode 17 is formed over the entire surface and is set to a potential corresponding to the center value of the positive and negative levels held at the source electrode. The shield electrode 6 is formed to be slightly wide so as to cover the drain electrode 5, and the same potential as the counter electrode 17 is set for the shield electrode 6, so even if a potential difference occurs between the drain electrode and the counter electrode, The drain voltage is shielded by the shielding electrode 6, and the liquid crystal 18 on the drain electrode 5 is not turned on, so that no light leakage occurs. Furthermore, since the center value of the positive and negative levels of the voltage held at the pixel electrode 4 is equal to the counter electrode potential, that is, the shield electrode potential, no DC component occurs between the shield electrode and the pixel electrode. Furthermore, since an AC voltage with positive and negative symmetry is applied between the pixel electrode 4 and the counter electrode 17, no DC component is generated.

【0014】また、遮蔽電極6により光漏れがなくなる
ことから、いままで用いていた開口率を決めていたブラ
ックマスク層13はほとんど配線幅より広くとる必要は
なくなるどころか、もうブラックマスク層13がなくて
も何ら支障はない。すなわち、画素電極4の大きさの割
合がそのまま開口率とすることもできるのである。また
、画素電極−対向電極間での電気力線の広がりによって
生じる光漏れは、画素電極の実質的な広がりとなるので
、何ら問題とならないばかりか、むしろ長所である。
Furthermore, since light leakage is eliminated by the shielding electrode 6, the black mask layer 13 that has been used until now, which determines the aperture ratio, does not need to be almost wider than the wiring width, and the black mask layer 13 is no longer needed. However, there is no problem. That is, the ratio of the size of the pixel electrode 4 can be directly used as the aperture ratio. Further, light leakage caused by the spread of electric lines of force between the pixel electrode and the counter electrode does not pose any problem, but is actually an advantage, since the pixel electrode becomes substantially spread.

【0015】図5は本発明の実施例による薄膜トランジ
スタ型液晶表示装置の電気回路のブロック図である。図
に示すように、ゲート電極群19とドレイン電極群20
が交差する部分にトランジスタ21が形成されており、
遮蔽電極6はドレイン線に沿っているので、そのまま表
示部外まで引き出し、外部で導通するような構成がとれ
、対向電極17と導通され、対向電極信号24から対向
電極17と同じ電圧に設定されるようになっている。 対向電極信号24は、一般にはソース電圧の正・負レベ
ルの中心値であるようなDC電圧である。ただし、液晶
にかかる実効電圧を上げる等の目的で微小なAC電圧を
重畳することもあるが、要は、遮蔽電極への電圧は対向
電極への電圧と同程度の信号であればよい。
FIG. 5 is a block diagram of an electric circuit of a thin film transistor type liquid crystal display device according to an embodiment of the present invention. As shown in the figure, a gate electrode group 19 and a drain electrode group 20
A transistor 21 is formed at the intersection of
Since the shielding electrode 6 is along the drain line, it can be drawn out to the outside of the display area and conductively connected to the counter electrode 17, and set to the same voltage as the counter electrode 17 from the counter electrode signal 24. It has become so. The counter electrode signal 24 is generally a DC voltage that is the center value of the positive and negative levels of the source voltage. However, although a minute AC voltage may be superimposed for the purpose of increasing the effective voltage applied to the liquid crystal, the point is that the voltage applied to the shield electrode only needs to be a signal of the same level as the voltage applied to the counter electrode.

【0016】また、外部での遮蔽電極の引回しも、遮蔽
電極が中間絶縁膜とパッシベーション膜の間に形成され
ているので、他の電極との不可避的な交差を起こすこと
はない。また、両側へも取り出せるので、遮蔽電極材料
の高抵抗等による電圧降下も問題とはならない。さらに
、注目すべきはこの遮蔽電極は、ドレイン断線修正にも
効力を発揮するうことが分かる。すなわち、ドレイン断
線箇所の両隣にレーザを当てれば容易に下のドレイン電
極と導通する。そして、外部において修正に用いた遮蔽
電極を対向電極と電気的に更に切断しておけば、この遮
蔽電極はドレイン電極へと役割を変えるのである。
Furthermore, when the shield electrode is routed outside, since the shield electrode is formed between the intermediate insulating film and the passivation film, there is no unavoidable crossing with other electrodes. Further, since it can be taken out to both sides, voltage drop due to high resistance of the shielding electrode material does not become a problem. Furthermore, it should be noted that this shielding electrode is also effective in correcting drain disconnections. That is, if a laser beam is applied to both sides of the drain disconnection point, conduction can be easily established with the drain electrode below. If the shield electrode used for correction is further electrically disconnected from the counter electrode externally, this shield electrode changes its role to a drain electrode.

【0017】なお、本発明は上記実施例に限定されるも
のではなく、例えば、遮蔽電極を対向電極に接続せずに
同程度の電圧を入力するように構成する等、本発明の趣
旨に基づき種々の変形が可能であり、それらを本発明の
範囲から排除するものではない。
It should be noted that the present invention is not limited to the above-mentioned embodiments; for example, the shielding electrode may be constructed so that the same voltage is input without connecting it to the counter electrode, etc., based on the spirit of the present invention. Various modifications are possible and are not excluded from the scope of the invention.

【0018】[0018]

【発明の効果】以上詳細に説明したように、本発明によ
れば、ドレイン電極上に絶縁膜を介して遮蔽電極を設け
、かつ遮蔽電極が対向電極と同程度の電位に保たれるよ
うに構成したので、ドレイン電極−対向電極間は遮蔽電
極によって遮蔽され、それらの電極間にDC成分が発生
しなくなる。したがって、ドレイン電極上の液晶がオン
することがなくなるので、光漏れが生じなくなる。その
結果、ブラックマスクが不要になるので表示装置の開口
率が向上する。また、液晶の劣化もなくなる。
[Effects of the Invention] As described above in detail, according to the present invention, a shield electrode is provided on the drain electrode via an insulating film, and the shield electrode is maintained at the same potential as the counter electrode. With this configuration, the space between the drain electrode and the counter electrode is shielded by the shield electrode, and no DC component is generated between these electrodes. Therefore, since the liquid crystal on the drain electrode is no longer turned on, no light leakage occurs. As a result, the aperture ratio of the display device is improved because a black mask is not required. Also, the deterioration of the liquid crystal is eliminated.

【0019】そして、遮蔽電極の幅をドレイン電極の幅
よりも広く形成すれば、ドレイン電極上の電圧信号の遮
蔽機能を向上させることができる。さらに、ドレイン電
極の断線修正を行うこともできる。
If the width of the shield electrode is made wider than the width of the drain electrode, the function of shielding the voltage signal on the drain electrode can be improved. Furthermore, disconnection of the drain electrode can also be corrected.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の実施例における薄膜トランジスタ基板
の平面図である。
FIG. 1 is a plan view of a thin film transistor substrate in an embodiment of the present invention.

【図2】本発明の実施例における薄膜トランジスタ基板
の一部(図1のA−A′)断面図である。
FIG. 2 is a cross-sectional view (along line AA' in FIG. 1) of a portion of a thin film transistor substrate in an embodiment of the present invention.

【図3】本発明の実施例における薄膜トランジスタ基板
の一部(図1のB−B′)断面図である。
FIG. 3 is a cross-sectional view of a portion (BB' in FIG. 1) of a thin film transistor substrate in an embodiment of the present invention.

【図4】本発明の実施例による薄膜トランジスタ型液晶
表示装置のドレイン電極配線部の断面図である。
FIG. 4 is a cross-sectional view of a drain electrode wiring portion of a thin film transistor type liquid crystal display device according to an embodiment of the present invention.

【図5】図5は本発明の実施例による薄膜トランジスタ
型液晶表示装置の電気回路のブロック図である。
FIG. 5 is a block diagram of an electric circuit of a thin film transistor type liquid crystal display device according to an embodiment of the present invention.

【図6】従来の薄膜トランジスタ基板の一部断面図であ
る。
FIG. 6 is a partial cross-sectional view of a conventional thin film transistor substrate.

【符号の説明】[Explanation of symbols]

1      ゲート電極 2      ドレイン電極 3      ソース電極 4      画素電極 5      半導体層 6      遮蔽電極 8      ゲート絶縁膜 9      中間絶縁膜 17    対向電極 1 Gate electrode 2 Drain electrode 3 Source electrode 4 Pixel electrode 5 Semiconductor layer 6 Shielding electrode 8 Gate insulating film 9 Intermediate insulation film 17 Counter electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】  薄膜トランジスタ基板と、液晶を挟ん
で該薄膜トランジスタ基板と対向する対向電極基板とを
備えた薄膜トランジスタ型液晶表示装置において、(a
)前記薄膜トランジスタ基板のドレイン電極上に絶縁膜
を介して遮蔽電極を設け、(b)かつ、該遮蔽電極に入
力する電圧を前記対向電極基板の対向電極に入力する電
圧と同程度にすることを特徴とする薄膜トランジスタ型
液晶表示装置。
1. A thin film transistor type liquid crystal display device comprising a thin film transistor substrate and a counter electrode substrate facing the thin film transistor substrate with a liquid crystal interposed therebetween.
) A shielding electrode is provided on the drain electrode of the thin film transistor substrate via an insulating film, and (b) the voltage input to the shielding electrode is made to be approximately the same as the voltage input to the counter electrode of the counter electrode substrate. Features of thin film transistor type liquid crystal display device.
【請求項2】  遮蔽電極と対向電極とが電気的に接続
されていることを特徴とする請求項1記載の薄膜トラン
ジスタ型液晶表示装置。
2. The thin film transistor type liquid crystal display device according to claim 1, wherein the shield electrode and the counter electrode are electrically connected.
【請求項3】  遮蔽電極幅はドレイン電極幅よりやや
広いことを特徴とする請求項1又は2記載の薄膜トラン
ジスタ型液晶表示装置。
3. The thin film transistor type liquid crystal display device according to claim 1, wherein the width of the shield electrode is slightly wider than the width of the drain electrode.
JP3085535A 1991-04-17 1991-04-17 Thin film transistor type liquid crystal display device Pending JPH04318522A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3085535A JPH04318522A (en) 1991-04-17 1991-04-17 Thin film transistor type liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3085535A JPH04318522A (en) 1991-04-17 1991-04-17 Thin film transistor type liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH04318522A true JPH04318522A (en) 1992-11-10

Family

ID=13861577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3085535A Pending JPH04318522A (en) 1991-04-17 1991-04-17 Thin film transistor type liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH04318522A (en)

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US6590623B2 (en) 1995-07-25 2003-07-08 Hitachi, Ltd. Fabrication method of liquid crystal display device having a reduced number of process steps
US6969643B2 (en) 1995-12-29 2005-11-29 Samsung Electronics Co., Ltd. Thin film transistor array panel used for a liquid crystal display and a manufacturing method thereof
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US6590623B2 (en) 1995-07-25 2003-07-08 Hitachi, Ltd. Fabrication method of liquid crystal display device having a reduced number of process steps
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US6914260B2 (en) 1996-06-25 2005-07-05 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6246453B1 (en) 1996-06-25 2001-06-12 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
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US7821607B2 (en) 1997-04-11 2010-10-26 Hitachi, Ltd. Liquid crystal display device
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