JPH04316349A - Method of wiring semiconductor integrated-circuit device - Google Patents

Abstract

PURPOSE:To enable generation of wiring in horizontal direction at a rectangular channel line to be minimized and a chip area in vertical direction to be reduced. CONSTITUTION:An approximate wiring position 19 of a feed-through wire 17 passing on a plurality of rectangular block lines is determined. In a rectangular block line 22, a wiring prohibition region 6 is avoided and then the feed-through wire 17 is set to the minimum distance position from the approximate wiring position 19 again. Then, at second rectangular block lines 21 and 23 opposing the rectangular block line 22, the approximate wiring position 19 is changed to coordinate position of the feed-through wire 17 which is set on the rectangular block line 22. Detailed wiring is performed at the rectangular block lines 21 and 23 by this modified approximate wiring position 19. The approximate wiring position modification and detailed wiring of the feed-through wire 17 are all performed on the rectangular block lines.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring processing method for semiconductor integrated circuit devices.

0002

2. Description of the Related Art In recent years, with the increase in the scale of digital and analog ICs, shortening the development period has become an important issue, and semiconductor integrated circuit devices that automatically perform mask layout have been developed and used.

A conventional wiring processing method for a semiconductor integrated circuit device will be explained below. FIG. 4 shows a mask layout diagram obtained by a conventional wiring processing method for a semiconductor integrated circuit device. In FIG. 4, 1 is a semiconductor substrate, 2 is a rectangular block row formed at a predetermined interval on the semiconductor substrate 1, 3 is a rectangular channel row which is a space between the rectangular block rows 2, and 4 is each rectangular block row. Functional mask blocks placed adjacent to each other in block row 2; 5 is a functional mask block outer frame that defines the outline of functional mask block 4; 6 is a wiring prohibited area within functional mask block 4; 7 is a rectangular block row. 2 is a feedthrough wiring that passes in the vertical direction, 8 is a channel wiring in rectangular channel row 3, 9 is
is the feedthrough wiring 7 determined by the rough wiring process.
This is the approximate location of

A wiring processing method for a semiconductor integrated circuit device will be described below with reference to FIG. A plurality of rectangular block rows 2 are arranged on a semiconductor substrate 1 at predetermined intervals (rectangular channel rows 3
The functional mask blocks 4 are arranged adjacently in each rectangular block row 2. The setting of the feed-through wiring 7 that passes vertically within the rectangular block row 2 can be done at the same time when the designer designs the functional mask block 4, or automatically set on the functional mask block 4 using computer processing. Generate it. In this state, a wiring processing method is to select the feedthrough wiring 7 near the approximate position 9 of the feedthrough wiring 7 determined by the general wiring processing, and perform channel wiring 8 between the feedthrough wirings selected by the channel wiring. It had been taken.

[0005]

However, in the conventional wiring processing method described above, since the feed-through wiring 7 is first set on the functional mask block 4, the feed-through wiring 7 is set between the opposing rectangular block rows 2 (within the rectangular channel row 3). The position of the feed-through wiring 7 selected in was shifted, and when channel wiring 8 was performed, wiring (hereinafter referred to as lateral direction) in the rectangular channel row 3 in a direction parallel to the rectangular block row 2 (hereinafter referred to as lateral direction) was (referred to as trunk lines) occur frequently. Therefore, the direction perpendicular to the rectangular block row 2 of the rectangular channel row 3 (hereinafter referred to as the vertical direction)
There is a problem in that the width of the chip increases, and as a result, the chip size in the vertical direction increases.

The present invention solves the above-mentioned conventional problems, and minimizes the occurrence of trunk lines when channel wiring is performed by matching the feedthrough wiring positions between opposing rectangular block rows (within rectangular channel rows). An object of the present invention is to provide a wiring method for a semiconductor integrated circuit device that can reduce the chip area in the vertical direction.

[0007]

[Means for Solving the Problems] In order to achieve this object, the wiring method for a semiconductor integrated circuit device of the present invention includes a general wiring process for determining the general wiring position of a feed-through wiring that passes over a plurality of rectangular block rows. If the general wiring position is in a wiring prohibited area on a first rectangular block row that is one of the plurality of rectangular block rows, the feedthrough wiring is routed to the general wiring while avoiding the wiring prohibited area. a first detailed wiring processing step of resetting the approximate wiring position of at least one second rectangular block row facing the first rectangular block row to the first position having the shortest distance from the first rectangular block row; a general wiring position changing step of changing the setting to a second position opposite to the position of , and a second detailed wiring process of resetting the general wiring position on the second rectangular block row passing through the second position. and a step of performing the above-mentioned general wiring position changing step and detailed wiring processing step for all of the plurality of rectangular block rows.

[0008]

[Operation] With this configuration, it is possible to set the feed-through wiring to the same coordinates in the vertical direction between opposing rectangular block rows, minimizing the occurrence of trunk lines when performing channel wiring, and The area can be reduced.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a mask layout diagram obtained by a wiring method for a semiconductor integrated circuit device according to an embodiment of the present invention. In FIG. 1, 1 is a semiconductor substrate, 2 is a rectangular block row formed at a predetermined interval on the semiconductor substrate 1, 3 is a space sandwiched between the rectangular block rows 2 and is a rectangular channel row, and 4 is each rectangular block row. 2, 5 is an outer frame of the functional mask block that defines the outline of the functional mask block 4, 6 is a wiring prohibited area within the functional mask block 4, and 17
18 is a feed-through wiring that passes vertically over rectangular block row 2, and channel wiring in rectangular channel row 3.

FIG. 2 is a process diagram showing a wiring method for feed-through wiring. In FIG. 2, 21, 22, and 23 are rectangular block rows formed on the semiconductor substrate 1, 19 is the approximate wiring position of the feed-through wiring 17 determined by the general wiring, and 10 is the approximate wiring position 19 of the feed-through wiring 17. is the feed-through wiring pin position, which is the intersection point where the rectangular block rows 21, 22, and 23 intersect. All other component numbers of the semiconductor circuit device are the same as in FIG.

Regarding the wiring method for semiconductor integrated circuit devices,
This will be explained using FIG. 2. Rectangular block rows 21, 22, and 23 are formed on the semiconductor substrate 1, and each rectangular block row 21,
Functional mask blocks 4 are arranged adjacently within 22 and 23 (not shown). At this time, each rectangular block row 21, 2
2, 23 placement coordinates, rectangular block rows 21, 22, 23
Information such as the arrangement coordinates of the functional mask block 4 within the functional mask block 4 and the wiring prohibited area 6 within the functional mask block 4 is registered in the semiconductor integrated circuit device.

Next, the rough wiring process of the feed-through wiring 17 is performed to form a rough wiring position 19 of the feed-through wiring 17 where the wiring as shown in FIG. is determined. Based on the approximate wiring position 19 of this feed-through wiring 17,
The feed-through wiring 17 is set in units of rectangular block rows.

Next, as shown in FIG. 2(b), first, a first rectangular block row is selected from among the plurality of rectangular block rows 2 to be subjected to feed-through wiring processing first. In this embodiment, it is assumed that rectangular block row 22 is selected. The wiring prohibited area 6 around the approximate wiring position 19 of the feedthrough wiring 17 in the rectangular block row 22 is read, and the feedthrough wiring 17 is set at the shortest distance position from the feedthrough wiring pin position 10 by avoiding this data (detailed wiring processing).

Next, for the second rectangular block rows 21 and 23 facing the first rectangular block row 22, the feed-through wiring pin position 10 determined by the rough wiring process is changed. The feed-through wiring pin position 10 on the lower side of the second rectangular block row 21 is located at the same horizontal coordinate position where the feed-through wiring 17 set in the first rectangular block row 22 intersects with the upper side of the rectangular block row 22. The feed-through wiring pin position 10 on the upper side of the second rectangular block row 23 is changed to the position at the same horizontal coordinates where the feed-through wiring 17 set in the first rectangular block row 22 intersects with the lower side of the rectangular block row 22. Ru. The feedthrough wiring pin positions 10 on the lower side of the second rectangular block row 21 and the upper side of the rectangular block row 23 are not changed.

After changing the feed-through wiring pin position 10 determined by the general wiring process as described above, detailed wiring process is performed in the second rectangular block rows 21 and 23. The results are shown in FIG. 2(c).

As described above, according to this embodiment, the general wiring process, the detailed wiring process in the first rectangular block row 22, and the second rectangular block row 21 opposite to the first rectangular block row 22 are performed. , Feedthrough wiring 1 in 23
Through the general wiring position changing step and the detailed wiring processing step 7, when wiring between opposing rectangular block rows in the rectangular channel row 3, the wiring can be made as straight as possible. As a result, the occurrence of main lines in the rectangular channel row 3 can be minimized, that is, the vertical direction of the rectangular channel row can be minimized,
The vertical chip area can be reduced.

FIG. 3 shows the results of feed-through wiring. In FIG. 3, 31 and 32 are rectangular block rows formed on the semiconductor substrate 1. In FIG. All other component numbers of the semiconductor circuit device are the same as in FIG.

A method for selecting the first rectangular block row will now be explained with reference to FIG. The rough wiring position 19 of the feed-through wiring 17 determined in the rough wiring processing step is shown in FIG.
Shown in a).

Next, as the first rectangular block row, the rectangular block row 32 having the smallest number of feed-through wires in the rectangular block row is selected, and the result of executing the wiring method for the semiconductor circuit device described above is shown in FIG. 3(b). ). Feed-through wiring 71 of second rectangular block row 31 performed based on the position of feed-through wiring 73 of first rectangular block row 32
As a result, the wiring route of the next feed-through wiring 72 in the second rectangular block row 31 is blocked, and there is a case where it becomes impossible to set it on the second rectangular block 31.

In order to avoid such a situation, the first rectangular block row is selected from the rectangular block with the strictest setting conditions,
That is, the rectangular block with the largest number of feed-through wires in the rectangular block row is selected. FIG. 3C shows the results of selecting the rectangular block row 31 with the largest number of feed-through wires in the rectangular block row and executing the wiring method for a semiconductor circuit device of the present invention. In this case, all feedthrough wiring settings can be made.

Note that when there are four or more rectangular block rows, the rectangular block row for which feed-through wiring has already been set is regarded as the first rectangular block, and the general wiring position changing step and detailed wiring processing step are similarly performed. Setting of feed-through wiring for all rectangular block rows is completed by repeating this process for all of the plurality of rectangular block rows.

[0023]

[Effects of the Invention] In feed-through wiring processing for each rectangular block row, the rough wiring position of the target feed-through wiring is changed in consideration of the wiring result of the rectangular block row that has undergone the feed-through wiring processing. . This makes it possible to minimize the occurrence of main lines in rectangular channel rows, that is, to minimize the length of rectangular channel rows in the vertical direction, and to realize an excellent semiconductor integrated circuit device that can reduce the chip area in the vertical direction. .

[Brief explanation of drawings]

FIG. 1 is a mask layout diagram according to a wiring method of a semiconductor integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a process diagram showing a wiring method for a semiconductor integrated circuit device in an embodiment of the present invention.

FIG. 3: Results of wiring processing using a wiring method for a semiconductor integrated circuit device according to an embodiment of the present invention.

[Figure 4] Mask layout diagram according to the conventional wiring method for semiconductor integrated circuit devices

[Explanation of symbols]

1 Semiconductor substrate 2 Rectangular block row 3 Rectangular channel row 4 Functional mask block 5 Functional mask block outer frame 6. Wiring prohibited area 7, 17 Feed through wiring 8, 18 Channel wiring 9, 19 Rough wiring position 10 Feedthrough wiring pin position

Claims (2)

[Claims] 1. A rough wiring processing step of determining a rough wiring position of a feed-through wire passing over a plurality of rectangular block rows, and a first rectangle in which the rough wiring position is one of the plurality of rectangular block rows. If it is in a wiring prohibited area on a block row, a first detailed wiring processing step of avoiding the wiring prohibited area and resetting the feedthrough wiring to a first position having the shortest distance from the general wiring position; changing the approximate wiring position of at least one second rectangular block row facing the first rectangular block row to a second position facing the first position;
a second detailed wiring processing step of resetting the general wiring position on the second rectangular block row through the second position; and a second detailed wiring processing step of resetting the general wiring position on the second rectangular block row; A wiring method for a semiconductor integrated circuit device, comprising a process performed for all block rows. 2. A wiring method for a semiconductor integrated circuit device, in which, among a plurality of rectangular block rows, a rectangular block row through which the largest number of feed-through wires pass is set as a first rectangular block row.