JPH04311071A - Manufacture of photodetective element and photoelectric integrated circuit - Google Patents

Abstract

PURPOSE:To provide a photodetective element small in dark current and excellent in characteristics such as sensitivity and the like. CONSTITUTION:The prescribed regions of semiconductor crystal layers 4, 6, and 8 formed of III-V compound semiconductor such as GaInAs or the like are removed for the formation of a mesa structure in a first process, where the crystal layer 6 serves as a light absorbing layer. The surfaces of the semiconductor layers 4, 6, and 8 exposed at the edge of the mesa structure are reconstituted with S or Se. Thereafter, an insulating film 10 is formed on the surfaces of the semiconductor layers 4, 6, and 8 through an ECR-CVD method. By this manufacturing method, many trapping centers are prevented from being formed on the surfaces of the semiconductor layers 4, 6, and 8. Furthermore, as the insulating film 10 is formed through an ECR-CVD method, the surfaces of the semiconductor layers 4, 6, and 8 can be covered with the insulating film 10 without deteriorating the surface treatment carried out with S or Se in effect. In result, a photodetective element small in dark current and excellent in characteristics can be obtained.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photodetector using a III-V compound semiconductor and a method for manufacturing an optoelectronic integrated circuit constructed from the photodetector.

0002

[Prior Art] Mesa-type photodiodes, such as pin photodiodes (hereinafter abbreviated as pinPD), which are integrated into optoelectronic integrated circuits, are used from the viewpoint of ease of integration and element separation. This is often the case.

0003

[Problems to be Solved by the Invention] However, in conventional mesa-type pin PDs, a large dark current flows through the insulating film/semiconductor interface. Further, in optoelectronic integrated circuits in which such pin PDs and the like are integrated, problems such as a decrease in receiving sensitivity have occurred due to this dark current.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a light-receiving element with low dark current, and a further object of the present invention is to provide an opto-electronic integrated circuit with excellent characteristics such as receiving sensitivity.

[0005]

[Means for Solving the Problems] In order to achieve the above object, a method for manufacturing a light receiving element according to the present invention includes (a) III-
(b) The surface of the semiconductor crystal layer exposed at the edge of the mesa structure is treated with sulfur (S).
) or treatment with selenium (Se); and (c)
After the step of treatment with sulfur (S) or selenium (Se),
The method includes a step of forming an insulating film on the surface of the semiconductor crystal layer using electron cyclotron resonance chemical vapor deposition (hereinafter abbreviated as ECR-CVD).

Furthermore, the method for manufacturing an optoelectronic integrated circuit according to the present invention includes the step of forming a light receiving element made of the semiconductor crystal layer as described above using the method for manufacturing a light receiving element as described above.

[0007]

According to the method of manufacturing a photodetector according to the present invention, the surface of the semiconductor crystal layer exposed at the edge of the mesa structure of the photodetector is treated with S or Se. For this reason, InP, In
It is possible to prevent many trapping centers such as dangling bonds from being formed on the surface of a semiconductor crystal layer made of a material such as GaAs or GaAs. Regarding the mechanism of inactivating the surface of crystalline materials such as GaAs by surface treatment using S, for example, see the document "Japanese Journal
of Applied Physics, Vol.
28, No. 3, March 1989 pp. L3
40-L342''. Furthermore, after the surface treatment process using S or Se, EC is applied to the surface of the semiconductor layer.
An insulating film is formed using the R-CVD method. In this case, E
Since the insulating film is formed using the CR-CVD method, generation of plasma, which is a material for the insulating film, and its deposition are performed in separate chambers. Therefore, the surface of the semiconductor crystal layer can be covered with an insulating film without impairing the effect of surface treatment with S or Se.

Furthermore, according to the method for manufacturing an optoelectronic integrated circuit according to the present invention, since the light receiving element is formed using the method for manufacturing a light receiving element as described above, the surface of the semiconductor crystal layer constituting the light receiving element is This can prevent the formation of capture centers such as dangling bonds.

[0009]2

[Example] Hereinafter, with reference to the cross-sectional views of FIGS. 1 and 2,
An embodiment of the method for manufacturing a light receiving element according to the present invention will be described.

First, a semi-insulating InP substrate 2 is prepared (FIG. 1(a)). Next, MOVP is placed on this InP substrate 2.
Pi
n-InP layer 4 to become nPD and i-GaInAs
A layer 6 and a p-GaInAs layer 8 are grown in sequence (FIG. 1).
(b)). After that, the pin is removed by wet etching etc.
PD mesa formation is performed (Figure 1(c)). After forming the mesa, it was immersed in a solution of (NH4)2Sx for 10 minutes,
Wash with pure water for 10 minutes and dry with N2 gas (S treatment). This S treatment reconfigures the surface of each semiconductor layer of the mesa structure. Next, silicon nitride (
A SiN film 10 is grown to a thickness of about 3000 angstroms (FIG. 2(a)). Here, in order to enhance the effect of the above-mentioned S treatment, heat treatment is performed at 400° C. for 30 minutes. Thereafter, by a lift-off method, a ring-shaped p
A type ohmic electrode 12 and an n-type ohmic electrode 14 are formed on the n-InP layer 4 (FIG. 2(b)). lastly,
Appropriate pad wiring 16 is provided to obtain a mesa-type pin PD (FIG. 2(c)).

According to the method for manufacturing a mesa-type pinPD as described above, the InP layer 4 and the Ga layer exposed at the edge of the mesa structure are
The surfaces of the InAs layers 6 and 8 are restructured by S treatment. Therefore, it is possible to prevent many dangling bonds from being formed on the surfaces of layers 4, 6, and 8 exposed at the edges of the mesa structure. Furthermore, after the S treatment, EC was added to the surfaces of layers 4, 6, and 8.
Since the SiN film 10 is formed using the R-CVD method, plasma generation of N2 gas and SiH4 gas and deposition thereof are performed in separate chambers. Therefore, the surfaces of layers 4, 6, and 8 can be covered with an insulating film without impairing the effect of the S treatment, and the semiconductor/insulating film interface, which is the main path of dark current, can be made good and stable. can. As a result, the dark current of the mesa-type pinPD can be significantly reduced, and the characteristics of the pinPD can be improved. Specifically, in a pinPD in which a SiN film was formed using a normal CVD method without performing S treatment, the
The dark current was 2 to 2 in the pinPD of the example.
It decreased to 3nA.

Next, referring to the cross-sectional views of FIGS. 3 to 5,
An embodiment of the method for manufacturing an optoelectronic integrated circuit according to the present invention will be described.

First, a semi-insulating InP substrate 52 is prepared, and a recess is formed in a region where a mesa-type pin PD is to be formed (FIG. 3(a)). Next, on this InP substrate 52, MO
By crystal growth methods such as VPE method, I
nP layer 60, GaInAs layer 62 and AlInAs layer 6
4 is sequentially grown, and then an n-GaInAs layer 54, i, which is to become a pinPD, is grown through an InP buffer layer 66.
- A GaInAs layer 56 and a p-GaInAs layer 58 are sequentially grown (FIG. 3(b)). These layers 54, 56, 5
8 is subjected to wet etching or the like to form a mesa structure to become a pin PD (FIG. 4(a)). moreover,
Wet etching etc. are performed on the remaining layers 60, 62, and 64 to form a region that should become a pinPD (left side in FIG. 4(a)) and a region that should become a HEMT (right side in FIG. 4(a)).
(FIG. 4(b)). Next, add this (N
H4) 2 Sx solution to perform S treatment, p
The surfaces of each semiconductor layer in a region to become an inPD and a region to become a HEMT are reconfigured. Thereafter, a SiN film 80 is grown on the entire surface of the element obtained in the step of FIG. 4B by ECR-CVD, and heat treatment is performed to enhance the effect of the S treatment. After this heat treatment, Ti/Pt/A is deposited on the p-GaInAs layer 58 by a lift-off method or the like.
A p-type ohmic electrode 72 made of u is formed. Thereafter, an n-type ohmic electrode 7 made of AuGe/Ti/Au is placed on the n-GaInAs layer 54 and the AlInAs layer 64.
4, form 84. The n-type ohmic electrode 84 formed on the AlInAs layer 64 becomes the source and drain of the HEMT. Finally, a first wiring metal 76 is deposited,
After forming the SiN film 80, which will serve as an interlayer insulating film, a second wiring metal 78 is deposited to complete the optoelectronic integrated circuit (FIG. 5).

According to the method for manufacturing an optoelectronic integrated circuit as described above, it is possible to cover the surface of the pin PD constituting the circuit with an insulating film without damaging the surface of the pin PD.
The dark current of the PD can be reduced. As a result, effects such as increasing the degree of integration of optoelectronic integrated circuits and increasing receiving sensitivity can be expected.

[0015] The method for manufacturing the above-mentioned photodetector is not limited to pinPD. The light absorption layer is made of III- such as GaAs.
The above-described manufacturing method can be applied to a light-receiving element made of a group V compound semiconductor in which dark current on the surface of its mesa structure poses a problem. Further, in the method for manufacturing an optoelectronic integrated circuit described above, the pinPD and the HEMT are integrated, but it is also possible to integrate various transistors, resistive elements, and the like.

[0016]

[Effects of the Invention] According to the method of manufacturing a light receiving element of the present invention,
The surface of the semiconductor crystal layer exposed at the edge of the mesa structure is
In addition to reconfiguring by e-processing, an insulating film is formed using ECR-CVD. Therefore, formation of many dangling bonds and the like on the surface of the semiconductor crystal layer can be prevented, and characteristics of the light receiving element can be improved by reducing dark current.

Furthermore, according to the method for manufacturing an optoelectronic integrated circuit of the present invention, it is possible to cover the surface of the light receiving element constituting the circuit with an insulating film without damaging it, thereby reducing the dark current of the light receiving element. be able to. Thereby, the homogeneity, degree of integration, etc. of the optoelectronic integrated circuit can be improved, or its reception sensitivity, etc. can be improved.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the first half of an embodiment of a method for manufacturing a light receiving element.

FIG. 2 is a diagram showing the second half of the embodiment of the method for manufacturing a light-receiving element.

FIG. 3 is a diagram showing the first half of an embodiment of a method for manufacturing an optoelectronic integrated circuit.

FIG. 4 is a diagram showing the second half of the embodiment of the method for manufacturing an optoelectronic integrated circuit.

FIG. 5 is a cross-sectional view showing a completed optoelectronic integrated circuit.

[Explanation of symbols]

4, 6, 8...semiconductor crystal layer 10...Insulating film

Claims (3)

[Claims] 1. A step of removing a semiconductor crystal layer including a light absorption layer made of a III-V compound semiconductor in a predetermined region to form a mesa structure, and removing a surface of the semiconductor crystal layer exposed at the edge of the mesa structure. , a step of treating with sulfur (S) or selenium (Se), and a step of treating with sulfur (S) or selenium (Se);
), and then forming an insulating film on the surface of the semiconductor layer using an electron cyclotron resonance CVD method. 2. The semiconductor crystal layer is made of GaAs or In.
2. The method of manufacturing a light receiving element according to claim 1, wherein the light receiving element is made of GaAs. 3. A method for manufacturing an optoelectronic integrated circuit, comprising the step of forming a light receiving element made of the semiconductor crystal layer using the method for manufacturing a light receiving element according to claim 1.