JPH04304941A - Manufacture of wafer holder - Google Patents
Manufacture of wafer holderInfo
- Publication number
- JPH04304941A JPH04304941A JP3089140A JP8914091A JPH04304941A JP H04304941 A JPH04304941 A JP H04304941A JP 3089140 A JP3089140 A JP 3089140A JP 8914091 A JP8914091 A JP 8914091A JP H04304941 A JPH04304941 A JP H04304941A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- installation surface
- electrostatic chuck
- dielectric layer
- ceramics
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000000919 ceramic Substances 0.000 claims abstract description 53
- 238000005422 blasting Methods 0.000 claims abstract description 13
- 238000009434 installation Methods 0.000 claims description 38
- 238000000034 method Methods 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 abstract description 31
- 235000012431 wafers Nutrition 0.000 description 99
- 238000010438 heat treatment Methods 0.000 description 15
- 239000012528 membrane Substances 0.000 description 9
- 229910052581 Si3N4 Inorganic materials 0.000 description 8
- 239000011347 resin Substances 0.000 description 8
- 229920005989 resin Polymers 0.000 description 8
- 230000004043 responsiveness Effects 0.000 description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 8
- 239000000758 substrate Substances 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 238000003754 machining Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 229910010271 silicon carbide Inorganic materials 0.000 description 4
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 3
- 229910003460 diamond Inorganic materials 0.000 description 3
- 239000010432 diamond Substances 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 2
- CPLXHLVBOLITMK-UHFFFAOYSA-N Magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000001179 sorption measurement Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000011324 bead Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- -1 molysdene Chemical compound 0.000 description 1
- 229910052575 non-oxide ceramic Inorganic materials 0.000 description 1
- 239000011225 non-oxide ceramic Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 229910052574 oxide ceramic Inorganic materials 0.000 description 1
- 239000011224 oxide ceramic Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Jigs For Machine Tools (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は、例えば半導体製造装置
用のウエハー保持具に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer holder for, for example, semiconductor manufacturing equipment.
【０００２】0002
【従来の技術】従来の半導体ウエハー固定技術としては
、メカニカル固定、真空チャック、静電チャックの各方
式が知られており、例えば、半導体ウエハーの搬送用、
露光、成膜、微細加工、洗浄、ダイシング等に使用され
ている。このうち、静電チャックは、ウエハー設置面に
対して静電力によって半導体ウエハーを吸着し、これと
ウエハー設置面との密着性を制御できるものである。ま
た、これにより半導体ウエハーの冷却や平面度矯正等の
性能をも付与できるため、非常に有望と考えられている
。[Prior Art] Conventional semiconductor wafer fixing techniques include mechanical fixing, vacuum chuck, and electrostatic chuck.
It is used for exposure, film formation, microfabrication, cleaning, dicing, etc. Among these, an electrostatic chuck attracts a semiconductor wafer to a wafer installation surface using electrostatic force, and can control the adhesion between the semiconductor wafer and the wafer installation surface. In addition, it is considered to be very promising because it can provide properties such as semiconductor wafer cooling and flatness correction.
【０００３】こうした静電チャックにおいては、ウエハ
ー設置面の表面に、半導体ウエハーを静電力によって吸
着する。この際、ウエハー設置面を平面加工すると、静
電チャックへの印加電圧を０にしても、残留吸着力によ
って半導体ウエハーがウエハー設置面に吸着し続けるた
め、チャック解除時の応答性が非常に悪くなる。この問
題を解決するための方法として、ウエハー設置面にスリ
ット加工を施すことで、電圧除去後の吸着力の残留時間
を短かくする技術が開示されている。In such an electrostatic chuck, a semiconductor wafer is attracted to the surface of a wafer mounting surface by electrostatic force. At this time, if the wafer installation surface is flattened, even if the voltage applied to the electrostatic chuck is reduced to 0, the semiconductor wafer will continue to be attracted to the wafer installation surface due to residual adsorption force, resulting in very poor response when releasing the chuck. Become. As a method for solving this problem, a technique has been disclosed in which the wafer installation surface is processed with slits to shorten the residual time of the attraction force after the voltage is removed.
【０００４】0004
【発明が解決しようとする課題】しかし、上記の技術に
ついて本発明者が検討を加えたところ、以下の問題があ
ることが解った。即ち、静電チャックを高温下で使用す
るためには、少なくとも静電チャック表面の誘電体層を
、窒化珪素、アルミナ等の緻密質セラミックスで形成す
る必要がある。そして、これらセラミックスの表面を機
械加工するためには、ダイヤモンド砥石を用いる必要が
あるため、実際上、幅の小さな （幅数ｍｍ以下） 、
深さ数十μｍ 以下の凹部を形成することが困難である
。[Problems to be Solved by the Invention] However, when the present inventor investigated the above-mentioned technique, it was found that there were the following problems. That is, in order to use an electrostatic chuck at high temperatures, at least the dielectric layer on the surface of the electrostatic chuck must be formed of a dense ceramic such as silicon nitride or alumina. In order to machine the surfaces of these ceramics, it is necessary to use a diamond grindstone, so in practice, it is necessary to use diamond grindstones to machine the surfaces of these ceramics.
It is difficult to form recesses with a depth of several tens of μm or less.
【０００５】この一方、凹部が深くなると、半導体ウエ
ハーの吸着力が著しく低下し、静電チャックとして使用
できなくなる。これをカバーするためには、静電チャッ
クの稼動電圧を非常に大きくする他はないが、この場合
には、誘電体層が絶縁破壊したり、電圧を印加する電極
部分で非常に放電が生じ易くなり、極めて不都合である
。On the other hand, if the recesses become deep, the suction force for the semiconductor wafer will be significantly reduced, making it impossible to use the chuck as an electrostatic chuck. In order to overcome this problem, the only option is to make the operating voltage of the electrostatic chuck extremely high, but in this case, the dielectric layer may break down or a discharge may occur at the electrode where the voltage is applied. This is extremely inconvenient.
【０００６】本発明者は、他の加工方法として、エッチ
ングについて検討した。しかし、例えば炭化珪素、窒化
珪素等の緻密質セラミックスは、耐食性が良いため、エ
ッチング加工が困難であり、良好な凹部パターンを形成
できないし、生産性も低いため、実用に適さない。The present inventor investigated etching as another processing method. However, since dense ceramics such as silicon carbide and silicon nitride have good corrosion resistance, they are difficult to etch, cannot form good concave patterns, and have low productivity, so they are not suitable for practical use.
【０００７】本発明の課題は、静電チャック等のウエハ
ー保持具の基材として緻密質セラミックスを用いた場合
に、このウエハー保持具のウエハー設置面に、深さ数１
０μｍ以下の浅い溝を、生産性良く良好に形成すること
である。The problem of the present invention is that when dense ceramics are used as the base material of a wafer holder such as an electrostatic chuck, the wafer mounting surface of the wafer holder has a depth of several tens of meters.
The object of the present invention is to form shallow grooves of 0 μm or less with good productivity.
【０００８】[0008]
【課題を解決するための手段】本発明は、基材として緻
密質セラミックスを用いた盤状のウエハー保持具のウエ
ハー設置面を研摩加工して平坦面とし、次いでこのウエ
ハー設置面にショットブラスト処理を施して凹部を形成
することを特徴とする、ウエハー保持具の製造方法に係
るものである。「ウエハー保持具」としては、セラミッ
クスサセプター、セラミックスヒーター、後述するよう
な静電チャック、セラミックスヒーターと一体化された
静電チャック、更には静電力以外の力で半導体ウエハー
を保持するウエハー保持具等がある。[Means for Solving the Problems] The present invention involves polishing the wafer installation surface of a disc-shaped wafer holder using dense ceramics as a base material to make it a flat surface, and then shot blasting the wafer installation surface. The present invention relates to a method for manufacturing a wafer holder, characterized in that a concave portion is formed by applying the following steps. Examples of "wafer holders" include ceramic susceptors, ceramic heaters, electrostatic chucks as described below, electrostatic chucks integrated with ceramic heaters, and wafer holders that hold semiconductor wafers using forces other than electrostatic force. There is.
【０００９】[0009]
【実施例】図１は、セラミックスヒーターと一体化され
た静電チャックを示す概略断面図、図２は、半導体ウエ
ハーを取り外した状態での静電チャックをウエハー設置
面側からみた平面図である。まず最初に、この静電チャ
ック自体の構成について説明する。[Example] Fig. 1 is a schematic cross-sectional view showing an electrostatic chuck integrated with a ceramic heater, and Fig. 2 is a plan view of the electrostatic chuck with a semiconductor wafer removed, viewed from the wafer installation surface side. . First, the structure of this electrostatic chuck itself will be explained.
【００１０】例えば円盤状のセラミックス基体１の内部
には抵抗発熱体２が埋設され、この抵抗発熱体２は例え
ば螺旋状に巻回されている。抵抗発熱体２の両端部には
、それぞれ電極端子３が接続固定され、各電極端子３の
端面が給電ケーブル１１に接合されている。一対の給電
ケーブル１１は、それぞれヒーター電源１０に接続され
ており、図示省略したスイッチを作動させることにより
、抵抗発熱体２を発熱させることができる。円盤状のセ
ラミックス基体１は、相対向する主面１ａ， １ｂを有
する。ここで主面とは、他の面より相対的に広い面をい
う。For example, a resistance heating element 2 is embedded inside a disk-shaped ceramic base 1, and this resistance heating element 2 is wound, for example, in a spiral shape. Electrode terminals 3 are connected and fixed to both ends of the resistance heating element 2, respectively, and the end surface of each electrode terminal 3 is joined to a power supply cable 11. The pair of power supply cables 11 are each connected to a heater power source 10, and can cause the resistance heating element 2 to generate heat by operating a switch (not shown). A disc-shaped ceramic substrate 1 has principal surfaces 1a and 1b that face each other. Here, the principal surface refers to a surface that is relatively wider than other surfaces.
【００１１】円盤状のセラミックス基体１の一方の主面
１ｂに沿って、例えば円形の膜状電極５が形成されてい
る。そして、この膜状電極５を覆うように、一方の主面
１ｂ上にセラミックス誘電体層６が形成され、一体化さ
れている。これにより、膜状電極５は、セラミックス基
体１とセラミックス誘電体層６との間に内蔵される。こ
の膜状電極５は、パンチングメタルのような穴明き形状
とすると、誘電体層６の基材１との密着性が良好となる
。
セラミックス基体１の内部には電極端子４が埋設され、
この電極端子４の一端には膜状電極５が接続され、電極
端子４の他端には給電ケーブル１２が接続されている。
この給電ケーブル１２は静電チャック電源１３の正極に
接続され、直流電源１３の負極がアース線に接続される
。A circular membrane electrode 5, for example, is formed along one main surface 1b of the disc-shaped ceramic substrate 1. Then, a ceramic dielectric layer 6 is formed on one main surface 1b so as to cover the film electrode 5, and is integrated. Thereby, the membrane electrode 5 is built in between the ceramic base 1 and the ceramic dielectric layer 6. When the film-like electrode 5 has a perforated shape such as punched metal, the adhesion of the dielectric layer 6 to the base material 1 is improved. An electrode terminal 4 is embedded inside the ceramic base 1,
A membrane electrode 5 is connected to one end of the electrode terminal 4, and a power supply cable 12 is connected to the other end of the electrode terminal 4. This power supply cable 12 is connected to the positive pole of an electrostatic chuck power supply 13, and the negative pole of the DC power supply 13 is connected to a ground wire.
【００１２】セラミックス誘電体層６のウエハー設置面
２２側には、リング状突起７Ａ， ７Ｂが同心円状に設
けられる。リング状突起７Ａの内側には、円形の凹部８
Ａが形成され、リング状突起７Ａと７Ｂとの間には、リ
ング状の凹部８Ｂが形成される。Ring-shaped projections 7A and 7B are provided concentrically on the wafer installation surface 22 side of the ceramic dielectric layer 6. A circular recess 8 is provided inside the ring-shaped projection 7A.
A is formed, and a ring-shaped recess 8B is formed between the ring-shaped projections 7A and 7B.
【００１３】ウエハー９を加熱処理する際には、セラミ
ックス誘電体層６のウエハー設置面２２にウエハー９を
設置し、ウエハー９に対してアース線１２Ａを接触させ
る。
そして、膜状電極５に正電荷を蓄積してセラミックス誘
電体層６を分極させ、セラミックス誘電体層６のウエハ
ー設置面側に正電荷を蓄積させる。それと共に、ウエハ
ー９に負電荷を蓄積させ、セラミックス誘電体層６とウ
エハー９との間のクーロン引力により、ウエハー９をウ
エハー設置面２２へと吸着させる。これと共に、抵抗発
熱体２を発熱させてウエハー設置面２２を所定温度に加
熱する。When heating the wafer 9, the wafer 9 is placed on the wafer installation surface 22 of the ceramic dielectric layer 6, and the ground wire 12A is brought into contact with the wafer 9. Then, positive charges are accumulated in the membrane electrode 5 to polarize the ceramic dielectric layer 6, and the positive charges are accumulated on the wafer installation surface side of the ceramic dielectric layer 6. At the same time, negative charges are accumulated in the wafer 9, and the wafer 9 is attracted to the wafer installation surface 22 by the Coulomb attraction between the ceramic dielectric layer 6 and the wafer 9. At the same time, the resistance heating element 2 is made to generate heat to heat the wafer installation surface 22 to a predetermined temperature.
【００１４】こうしたヒーター付き静電チャックによれ
ば、ウエハー９をウエハー設置面２２へとクーロン力に
よって全面で吸着しつつ、同時にウエハー設置面２２を
加熱してウエハーを加熱することができる。従って、特
に中高真空中でウエハー９を全面に亘って追従させるこ
とができ、均熱化することができ、ウエハー９とウエハ
ー加熱面との間の隙間によるウエハー９の均熱性の低下
が生じない。従って、ウエハー９の熱処理をウエハー全
面に亘って均一に行うことができ、例えば半導体製造装
置においては、半導体の歩留り低下を防止することがで
きる。[0014] According to such an electrostatic chuck with a heater, the wafer 9 can be attracted to the wafer installation surface 22 with its entire surface by Coulomb force, and at the same time, the wafer installation surface 22 can be heated to heat the wafer. Therefore, the wafer 9 can be followed over the entire surface, especially in a medium-high vacuum, and the temperature can be equalized, and the temperature uniformity of the wafer 9 will not deteriorate due to the gap between the wafer 9 and the wafer heating surface. . Therefore, the heat treatment of the wafer 9 can be uniformly performed over the entire surface of the wafer, and, for example, in semiconductor manufacturing equipment, a decrease in semiconductor yield can be prevented.
【００１５】また、誘電体膜６もセラミックスからなる
ので、誘電体膜６の耐熱性も高く、例えば熱ＣＶＤ装置
において良好に使用できる。と共に、誘電体膜６は、ウ
エハーの１万回以上のチャックによる摩耗及び変形に対
して耐久性を有するセラミックスから形成すると良い。Furthermore, since the dielectric film 6 is also made of ceramics, the dielectric film 6 has high heat resistance and can be used satisfactorily in, for example, a thermal CVD apparatus. In addition, the dielectric film 6 is preferably formed of ceramics that has durability against wear and deformation caused by chucking the wafer 10,000 times or more.
【００１６】更に、セラミックス基体１の内部に抵抗発
熱体２が埋設され、また膜状電極５がセラミックス誘電
体層６とセラミックス基体１との間に内蔵されているの
で、従来の金属ヒーターの場合のような汚染を防止でき
る。また、ウエハー９をウエハー設置面２２へと吸着し
た状態で直接加熱するので、間接加熱方式の場合のよう
な熱効率の悪化の問題は生じない。Furthermore, since the resistance heating element 2 is embedded inside the ceramic base 1 and the membrane electrode 5 is built in between the ceramic dielectric layer 6 and the ceramic base 1, it is different from the conventional metal heater. It can prevent contamination such as Furthermore, since the wafer 9 is directly heated while adsorbed to the wafer installation surface 22, the problem of deterioration of thermal efficiency as in the indirect heating method does not occur.
【００１７】更に、本実施例では、ウエハー設置面２２
に凹部８Ａ， ８Ｂを設けているので、直流電源１３か
らの印加電圧を除いたときにも、半導体ウエハー９が外
れ易く、チャック解除の応答性が良い。Furthermore, in this embodiment, the wafer installation surface 22
Since the recesses 8A and 8B are provided in the wafer, the semiconductor wafer 9 is easily removed even when the voltage applied from the DC power source 13 is removed, and the response of chuck release is good.
【００１８】また、１０−３Ｔｏｒｒ以下の高真空中で
半導体ウエハー９を処理する場合には、凹部８Ａ， ８
Ｂ内にガスを残して凹部８Ａ，８Ｂ内の圧力を１〜１０
−３Ｔｏｒｒの相対的に圧力の高い状態としておくこと
ができる。仮に半導体ウエハー９とウエハー設置面との
間に高真空の隙間があると、この隙間を通しては非常に
熱が伝わりにくく、温度上昇時の応答性が悪くなる。Furthermore, when processing the semiconductor wafer 9 in a high vacuum of 10 -3 Torr or less, the recesses 8A, 8
Leave the gas in B and reduce the pressure in the recesses 8A and 8B to 1 to 10
A relatively high pressure state of −3 Torr can be maintained. If there is a high-vacuum gap between the semiconductor wafer 9 and the wafer installation surface, it will be very difficult for heat to be transferred through this gap, resulting in poor responsiveness when the temperature rises.
【００１９】即ち、ウエハー設置面のガス分子の挙動は
、１Ｔｏｒｒ以上の圧力に於いては粘性流域であり、ガ
ス分子による熱移動 （熱伝達） があるためにヒータ
ー温度に対してウエハー温度があまり低下せず、良い追
従性を示すが、中高真空になると分子流域に移行し、ガ
ス分子による熱移動が大幅に低下するために、ヒーター
温度に対してウエハー温度が低下し、均熱性、応答性の
悪化を生じることが判っている。In other words, the behavior of gas molecules on the wafer installation surface is in a viscous region at pressures of 1 Torr or more, and because of heat transfer (heat transfer) by gas molecules, the wafer temperature is much lower than the heater temperature. However, when it comes to medium-high vacuum, it shifts to a molecular region, and the heat transfer by gas molecules decreases significantly, so the wafer temperature decreases with respect to the heater temperature, resulting in poor thermal uniformity and responsiveness. It is known that it causes deterioration of
【００２０】これに対し、凹部８Ａ， ８Ｂに予めガス
を滞留させておき、この圧力を１〜１０−３Ｔｏｒｒ程
度にしておくと、１０−３Ｔｏｒｒ以下の高真空の隙間
よりも、上記の理由から熱が伝わり易い。従って、ウエ
ハー設置面２２の温度を上昇させる際に、半導体ウエハ
ー９がこれに追従して温度上昇し易く、応答性が良くな
る。On the other hand, if gas is allowed to stay in the recesses 8A and 8B in advance and the pressure is set to about 1 to 10-3 Torr, it will be more effective for the above reasons than in a high vacuum gap of 10-3 Torr or less. Heat is easily transmitted. Therefore, when the temperature of the wafer installation surface 22 is increased, the temperature of the semiconductor wafer 9 tends to follow this and increase the temperature, improving responsiveness.
【００２１】ただし、凹部８Ａ， ８Ｂの深さｄが、分
子の平均自由工程λに対し、ｄ≦λの関係から大きく外
れると、上記のような効果を奏することができないばか
りか、かえって半導体ウエハー９の吸着力が低下し、温
度上昇時の応答性も悪くなり、半導体ウエハー９におけ
る温度差も大きくなる。しかし、本実施例では、後述す
るショットブラスト法によって凹部８Ａ， ８Ｂを形成
するので、凹部８Ａ， ８Ｂの厚さを数１０μｍ 以下
、更には５μｍ 以下程度まで小さくすることが可能で
ある。これにより、上記の問題は防止できる。However, if the depth d of the recesses 8A and 8B deviates significantly from the relationship d≦λ with respect to the mean free path λ of molecules, not only will the above effects not be achieved, but the semiconductor wafer will be damaged. The adsorption force of the semiconductor wafer 9 decreases, the responsiveness when the temperature rises also deteriorates, and the temperature difference in the semiconductor wafer 9 also increases. However, in this embodiment, since the recesses 8A and 8B are formed by the shot blasting method described later, it is possible to reduce the thickness of the recesses 8A and 8B to several tens of micrometers or less, and even to about 5 micrometers or less. Thereby, the above problem can be prevented.
【００２２】誘電体層６をセラミックスにて形成したが
、セラミックスは温度が高くなるにつれて絶縁抵抗値（
体積固有抵抗）が低くなるという特性があるので、例え
ば、１０１１Ω・ｃｍ程度の適当な体積抵抗率よりも低
くなり、リーク電流が大きくなり、半導体ウエハーが破
損する可能性がでてくる。この点で、本実施例のヒータ
ー付き静電チャックに用いるには、例えば５００〜６０
０ ℃の高温域においても１０１１Ω・ｃｍ以上の体積
抵抗率を有するものが好ましい。この点では、アルミナ
、ベリリア、マグネシアや、窒化珪素、窒化ホウ素、窒
化アルミニウムが好ましい。Although the dielectric layer 6 was formed of ceramics, the insulation resistance value (
Since it has a characteristic that the volume resistivity (specific volume resistivity) is low, it becomes lower than a suitable volume resistivity of, for example, about 1011 Ω·cm, and the leakage current becomes large and there is a possibility that the semiconductor wafer is damaged. In this respect, for example, 500 to 600
It is preferable that the material has a volume resistivity of 1011 Ω·cm or more even in the high temperature range of 0°C. In this respect, alumina, beryllia, magnesia, silicon nitride, boron nitride, and aluminum nitride are preferred.
【００２３】また、セラミックス基体１、セラミックス
誘電体層６は、例えば熱ＣＶＤ装置においては、最大
６００℃から１１００℃程度まで加熱されるので、耐熱
性の点で、アルミナ、窒化珪素焼結体、サイアロン、窒
化アルミニウム、アルミナ−炭化珪素複合材料等とする
のが好ましい。特にセラミックス基体１とセラミックス
誘電体層６とは、共に非酸化物系セラミックスで形成す
ることが好ましい。Furthermore, the ceramic substrate 1 and the ceramic dielectric layer 6 are
Since it is heated from 600° C. to about 1100° C., from the viewpoint of heat resistance, it is preferable to use alumina, silicon nitride sintered body, sialon, aluminum nitride, alumina-silicon carbide composite material, or the like. In particular, both the ceramic substrate 1 and the ceramic dielectric layer 6 are preferably formed of non-oxide ceramics.
【００２４】これは、アルミナ等の酸化物系セラミック
スに比べて炭化珪素、窒化珪素等の非酸化物系共有結合
セラミックスは、高真空中でのガス放出量が少ないため
であり、つまり吸着ガスが少ないことにより、誘電体の
抵抗値、耐絶縁破壊電圧等の変化が少なく、ヒーター付
き静電チャックの安定な運転が可能となる。This is because non-oxide covalently bonded ceramics such as silicon carbide and silicon nitride release less gas in high vacuum than oxide ceramics such as alumina, which means that adsorbed gas is Due to the small amount, changes in the resistance value of the dielectric material, dielectric breakdown voltage resistance, etc. are small, and stable operation of the electrostatic chuck with a heater is possible.
【００２５】このうち、特に窒化珪素を採用すると、ヒ
ーター付き静電チャック全体の強度が高く、窒化珪素の
低熱膨脹率のため静電チャックの耐熱衝撃性が高く、高
温での急熱、急冷を繰り返して行っても静電チャックが
破損しない。Among these, when silicon nitride is used in particular, the strength of the entire electrostatic chuck with a heater is high, and silicon nitride's low coefficient of thermal expansion provides high thermal shock resistance of the electrostatic chuck, making it possible to withstand rapid heating and cooling at high temperatures. The electrostatic chuck will not be damaged even after repeated use.
【００２６】更に、セラミックス基体１とセラミックス
誘電体層６は、密着性の面から熱膨脹の等しい同材質と
するのが好ましく、ヒーターとしての性能、静電チャッ
クとしての性能の両者の点より、窒化珪素が好ましい。Further, the ceramic substrate 1 and the ceramic dielectric layer 6 are preferably made of the same material with equal thermal expansion from the viewpoint of adhesion, and from the viewpoint of both performance as a heater and performance as an electrostatic chuck, nitrided Silicon is preferred.
【００２７】抵抗発熱体２としては、高融点でありしか
も窒化珪素等との密着性に優れたタングステン、モリブ
デン、白金等を使用することが適当である。膜状電極５
としても熱膨脹がヒーターに近い低抵抗金属のタングス
テン、モリズデン、白金等が好ましい。図１の例ではウ
エハー設置面２２を上向きにしたが、ウエハー設置面２
２を下向きにしてもよい。As the resistance heating element 2, it is appropriate to use tungsten, molybdenum, platinum, or the like, which has a high melting point and has excellent adhesion to silicon nitride or the like. Membrane electrode 5
However, low-resistance metals such as tungsten, molysdene, and platinum, whose thermal expansion is similar to that of the heater, are preferable. In the example of FIG. 1, the wafer installation surface 22 is directed upward, but the wafer installation surface 22
2 may be facing downward.
【００２８】上記各例において、ヒーター付き静電チャ
ック全体の形状は、略円形のウエハー９を均等に加熱す
るためには円盤状とするのが好ましいが、他の形状、例
えば四角盤状、六角盤状等としてもよい。こうしたヒー
ター付き静電チャックは、エピタキシャル装置、プラズ
マエッチング装置、光エッチング装置等に対しても適用
可能である。更に、ウエハーとしては、半導体ウエハー
だけでなく、Ａｌウエハー、Ｆｅウエハー等の導体ウエ
ハーの吸着、加熱処理も可能である。In each of the above examples, the overall shape of the electrostatic chuck with a heater is preferably a disk shape in order to uniformly heat the approximately circular wafer 9, but other shapes, such as a square disk shape or a hexagonal shape, are preferable. It may also be shaped like a disk. Such an electrostatic chuck with a heater can also be applied to an epitaxial device, a plasma etching device, a photoetching device, etc. Furthermore, as for the wafer, not only semiconductor wafers but also conductor wafers such as Al wafers and Fe wafers can be adsorbed and heat-treated.
【００２９】次いで、図３、図４を主として参照しつつ
、上記した静電チャックのウエハー設置面に、所定パタ
ーンの凹部を形成する方法について述べる。まず、図３
に示すヒーター付き静電チャックを作製する。この作製
時には、セラミックス基体１とセラミックス誘電体層６
とを別体として焼結するか、一体焼結する。いずれにせ
よ、セラミックス基体１となるべき成形体中には、予め
抵抗発熱体２、電極端子３，４を埋設しておく。Next, referring mainly to FIGS. 3 and 4, a method for forming recesses in a predetermined pattern on the wafer mounting surface of the electrostatic chuck described above will be described. First, Figure 3
Fabricate the electrostatic chuck with a heater shown in . During this fabrication, the ceramic substrate 1 and the ceramic dielectric layer 6 are
Either they are sintered separately or they are sintered together. In any case, the resistance heating element 2 and the electrode terminals 3 and 4 are embedded in advance in the molded body that is to become the ceramic base 1.
【００３０】次いで、このウエハー設置面２２を研摩加
工して平坦面とする。次いで、平滑となったウエハー設
置面２２を洗浄する。この洗浄は、例えばトリクレン等
の有機溶剤で行い、脱脂する。この脱脂後には、例えば
、温水で洗浄する。Next, this wafer installation surface 22 is polished to make it a flat surface. Next, the wafer mounting surface 22, which has become smooth, is cleaned. This cleaning is performed, for example, with an organic solvent such as trichlene, and degreased. After this degreasing, it is washed with warm water, for example.
【００３１】次いで、このウエハー設置面２２に、図４
に示すようにマスク１４を設ける。このマスク１４の形
状は、図２に示すリング状突起７Ａ， ７Ｂの形状と同
じとする。このマスク１４としては、感光性樹脂や板状
マスクを使用する。この方法は常法に従う。例えば感光
性樹脂をマスク１４として使用するときには、液状の感
光性樹脂をウエハー設置面２２に塗布し、この液状感光
性樹脂を熱硬化させる。この塗布と熱硬化とは、必要な
回数だけ繰り返す。
そして、感光性樹脂層の上にパターンフィルムをセット
し、超高圧水銀灯などで露光する。これにより、パター
ンフィルムの透明な部分の下にある感光性樹脂層に対し
て光が照射される。この感光性樹脂層を現像液で処理し
、図４に示すマスク１４を設ける。Next, on this wafer installation surface 22, a pattern shown in FIG.
A mask 14 is provided as shown in FIG. The shape of this mask 14 is the same as that of the ring-shaped protrusions 7A and 7B shown in FIG. As this mask 14, a photosensitive resin or a plate mask is used. This method follows conventional methods. For example, when using a photosensitive resin as the mask 14, the liquid photosensitive resin is applied to the wafer installation surface 22, and the liquid photosensitive resin is thermally cured. This application and heat curing are repeated as many times as necessary. A pattern film is then set on the photosensitive resin layer and exposed using an ultra-high pressure mercury lamp or the like. As a result, light is irradiated onto the photosensitive resin layer below the transparent portion of the pattern film. This photosensitive resin layer is treated with a developer to form a mask 14 shown in FIG.
【００３２】次いで、ショットブラストを行い、マスク
１４によって覆われていない部分に凹部８Ａ， ８Ｂを
形成する。このショットブラストに使用する粒子として
は、アルミナ、炭化珪素、ガラスビーズ等が好ましく、
粒子の粒径は、１０〜３００ μｍ 程度とすることが
好ましい。これは、ショットブラスト用の粒子の粒径Ｄ
と、ショットブラストによってできる加工深さｄの関係
が、Ｄ：ｄ＝１０：１程度であることから決定でき、こ
れにより０．５ 〜数１０μｍ の加工深さのコントロ
ールを行える。Next, shot blasting is performed to form recesses 8A and 8B in the portions not covered by the mask 14. The particles used for this shot blasting are preferably alumina, silicon carbide, glass beads, etc.
The particle size of the particles is preferably about 10 to 300 μm. This is the particle size D of particles for shot blasting.
This can be determined from the fact that the relationship between the machining depth d and the machining depth d created by shot blasting is approximately D:d=10:1, and thereby the machining depth can be controlled from 0.5 to several tens of micrometers.
【００３３】次いで、マスク１４を除去し、図１、図２
に示すヒーター付き静電チャックを得る。この際、マス
ク１４が感光性樹脂からなる場合には、塩化メチレン等
の剥離液を用いる。Next, the mask 14 is removed, and FIGS.
Obtain the electrostatic chuck with heater shown in . At this time, if the mask 14 is made of photosensitive resin, a stripping liquid such as methylene chloride is used.
【００３４】上記の例では、マスク１４を用いてショッ
トブラストを行った。しかし、ブラストのノズルの直径
が１ｍｍ程度である場合には、このブラストノズルをＸ
−Ｙテーブルで走査させることにより、図２に示す所定
形状の凹部８Ａ， ８Ｂを形成することが可能である。
この場合には、マスク１４は不要である。In the above example, shot blasting was performed using the mask 14. However, if the diameter of the blast nozzle is about 1 mm, the blast nozzle should be
- By scanning with the Y table, it is possible to form the recesses 8A and 8B in the predetermined shape shown in FIG. In this case, mask 14 is not necessary.
【００３５】セラミックス誘電体層６のウエハー設置面
２２Ａ に、図５に示すような形状の突起又は凹部を形
成することもできる。図５においては、多数の線状突起
１５を互いに等間隔に渦巻状に設ける。各線状突起１５
の間には、細長い凹部１６がやはり等間隔に渦巻状に形
成されている。ウエハー設置面２２Ａ の中央部には、
円形の凹部１７が設けられており、各凹部１６はすべて
凹部１７につながっている。これらの凹部１６， １７
もやはり、前記した凹部８Ａ， ８Ｂと同様に、ショッ
トブラストによって形成する。It is also possible to form protrusions or recesses in the shape shown in FIG. 5 on the wafer installation surface 22A of the ceramic dielectric layer 6. In FIG. 5, a large number of linear protrusions 15 are provided in a spiral shape at regular intervals. Each linear protrusion 15
In between, elongated recesses 16 are also spirally formed at equal intervals. In the center of the wafer installation surface 22A,
A circular recess 17 is provided, and each recess 16 is all connected to the recess 17. These recesses 16, 17
Again, like the recesses 8A and 8B described above, they are formed by shot blasting.
【００３６】こうした構成によれば、各凹部１６にそれ
ぞれガスを流すことができる。そして、例えば半導体ウ
エハーを加熱するためにウエハー設置面２２Ａ を昇温
させる際に、ウエハー設置面２２Ａ の周囲にガスを流
すと、このガスが凹部１６を、線状突起１５の形状に沿
って螺旋状に流れる。これにより、ガスの滞留時間が長
くなり、半導体ウエハーの加熱時、昇温時に、応答性を
一層高めることができる。According to this configuration, gas can flow into each recess 16, respectively. For example, when the temperature of the wafer installation surface 22A is raised to heat a semiconductor wafer, when gas is flowed around the wafer installation surface 22A, the gas spirals in the recess 16 along the shape of the linear protrusion 15. flow in a shape. This increases the residence time of the gas, making it possible to further improve responsiveness during heating and temperature rise of the semiconductor wafer.
【００３７】図６は、本発明の方法によって凹部を形成
した静電チャックの一例を示す概略断面図である。円盤
状セラミックス基体２１の一方の主面２１ａ に沿って
、例えば円形の膜状電極５が形成されている。そして、
この膜状電極５を覆うように、一方の主面２１ａ 上に
セラミックス誘電体層６が形成され、一体化されている
。これにより、膜状電極５は、セラミックス基体２１と
セラミックス誘電体層６との間に内蔵される。この膜状
電極５は、パンチングメタルのような穴明きの形状とす
ると、誘電体層６の密着性が良好となる。セラミックス
基体２１の内部には電極端子４が埋設され、この電極端
子４の一端には膜状電極５が接続され、電極端子４の他
端には給電ケーブル１２が接続されている。この給電ケ
ーブル１２は静電チャック電源１３の正極に接続され、
直流電源１３の負極がアース線に接続される。そして、
半導体ウエハー９をウエハー設置面２２Ｂ に設置し、
吸着する。この動作は、前記したヒーター付き静電チャ
ックと同じである。FIG. 6 is a schematic cross-sectional view showing an example of an electrostatic chuck in which recesses are formed by the method of the present invention. For example, a circular membrane electrode 5 is formed along one main surface 21a of the disc-shaped ceramic base 21. and,
A ceramic dielectric layer 6 is formed on one main surface 21a so as to cover the film electrode 5, and is integrated. Thereby, the membrane electrode 5 is built in between the ceramic base 21 and the ceramic dielectric layer 6. If the film-like electrode 5 is formed into a perforated shape such as punched metal, the adhesion of the dielectric layer 6 will be improved. An electrode terminal 4 is buried inside the ceramic base 21, a membrane electrode 5 is connected to one end of the electrode terminal 4, and a power supply cable 12 is connected to the other end of the electrode terminal 4. This power supply cable 12 is connected to the positive terminal of an electrostatic chuck power supply 13,
The negative pole of the DC power supply 13 is connected to the ground wire. and,
Place the semiconductor wafer 9 on the wafer installation surface 22B,
Adsorb. This operation is the same as that of the electrostatic chuck with a heater described above.
【００３８】このウエハー設置面２２Ｂ の平面形状の
一部を拡大して図７に示す。平面略正方形の突起１８が
図７において上下方向及び左右方向に一定間隔で基盤目
状に設けられており、各突起１８の間の領域に凹部１９
が形成されている。この凹部１９によって、前述したよ
うに、半導体ウエハー９のチャック解除後の残留吸着力
を減らし、かつ温度上昇時の応答性を高める。この凹部
１９を設ける方法は、図１〜図４において説明した方法
と同様であり、ショットブラスト処理による。FIG. 7 shows an enlarged view of a part of the planar shape of this wafer installation surface 22B. In FIG. 7, projections 18 that are approximately square in plan are provided in the shape of a grid at regular intervals in the vertical and horizontal directions, and recesses 19 are formed in the areas between the projections 18.
is formed. As described above, this recess 19 reduces the residual suction force after the semiconductor wafer 9 is released from the chuck, and improves responsiveness when the temperature rises. The method for providing this recess 19 is the same as the method explained in FIGS. 1 to 4, and is based on shot blasting.
【００３９】[0039]
【発明の効果】本発明によれば、基材として緻密質セラ
ミックスを用いた盤状のウエハー保持具のウエハー設置
面に、ショットブラスト処理を施して凹部を形成するの
で、深さ数１０μｍ 程度以下の凹部を生産性良く形成
できる。この凹部を設けることにより、直流電源からの
印加電圧を除いたときにも、半導体ウエハー等が外れ易
く、チャック解除時の応答性が良い。また、この凹部に
ガスを残し、また、ガスを供給することで、例えば周囲
の真空度が１０−３Ｔｏｒｒ以下となったときでも、半
導体ウエハーが設置面の温度に追従して温度上昇し易く
、応答性が良くなる。[Effects of the Invention] According to the present invention, since a recess is formed by shot blasting on the wafer mounting surface of a disc-shaped wafer holder using dense ceramics as a base material, the recess is approximately several tens of μm or less in depth. recesses can be formed with high productivity. By providing this recessed portion, the semiconductor wafer etc. can be easily removed even when the applied voltage from the DC power supply is removed, and the response when releasing the chuck is good. In addition, by leaving gas in this recess and supplying gas, the semiconductor wafer can easily follow the temperature of the installation surface and rise in temperature, even when the surrounding vacuum level is 10-3 Torr or less, for example. Improves responsiveness.
【００４０】しかも、ダイヤモンド砥石による機械加工
の場合と異なり、凹部が深くなりすぎず、深さのコント
ロールが可能であるので、この凹部による半導体ウエハ
ーの吸着力が安定し、温度上昇時の応答性が良くなり、
半導体ウエハーの均熱性が向上する。Furthermore, unlike machining using a diamond grindstone, the concave portion does not become too deep and the depth can be controlled, so the suction force of the semiconductor wafer by this concave portion is stable and responsiveness when the temperature rises. becomes better,
Thermal uniformity of semiconductor wafers is improved.
【図１】セラミックスヒーターと一体化された静電チャ
ックを示す概略断面図である。FIG. 1 is a schematic cross-sectional view showing an electrostatic chuck integrated with a ceramic heater.
【図２】図１に示す静電チャックをウエハー設置面側か
ら見た平面図である。FIG. 2 is a plan view of the electrostatic chuck shown in FIG. 1, viewed from the wafer installation surface side.
【図３】図１に示す静電チャックのショットブラスト前
の状態を示す断面図である。FIG. 3 is a sectional view showing the state of the electrostatic chuck shown in FIG. 1 before shot blasting.
【図４】静電チャックのウエハー設置面にマスクを設け
た状態を示す断面図である。FIG. 4 is a cross-sectional view showing a state in which a mask is provided on the wafer installation surface of the electrostatic chuck.
【図５】ウエハー設置面における凹部形成パターンの一
例を示す平面図である。FIG. 5 is a plan view showing an example of a recess formation pattern on the wafer installation surface.
【図６】静電チャックを示す概略断面図である。FIG. 6 is a schematic cross-sectional view showing an electrostatic chuck.
【図７】図６の静電チャックのウエハー設置面の形状を
示す拡大平面図である。7 is an enlarged plan view showing the shape of the wafer installation surface of the electrostatic chuck shown in FIG. 6; FIG.
１， ２１ セラミックス基体
２ 抵抗発熱体
５ 膜状電極
６ セラミックス誘電体層
７Ａ， ７Ｂ， １５， １８ 突起８Ａ， ８Ｂ，
１６， １７， １９ 凹部９ 半導体ウエハー1, 21 ceramic base 2 resistance heating element 5 film electrode 6 ceramic dielectric layer 7A, 7B, 15, 18 protrusion 8A, 8B,
16, 17, 19 recess 9 semiconductor wafer
Claims (1)
た盤状のウエハー保持具のウエハー設置面を研摩加工し
て平坦面とし、次いでこのウエハー設置面にショットブ
ラスト処理を施して凹部を形成することを特徴とする、
ウエハー保持具の製造方法。[Claim 1] The wafer installation surface of a disc-shaped wafer holder using dense ceramics as a base material is polished to make it a flat surface, and then the wafer installation surface is subjected to shot blasting to form recesses. characterized by
Method for manufacturing a wafer holder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8914091A JPH0755423B2 (en) | 1991-03-29 | 1991-03-29 | Wafer holder manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8914091A JPH0755423B2 (en) | 1991-03-29 | 1991-03-29 | Wafer holder manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04304941A true JPH04304941A (en) | 1992-10-28 |
| JPH0755423B2 JPH0755423B2 (en) | 1995-06-14 |
Family
ID=13962569
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8914091A Expired - Lifetime JPH0755423B2 (en) | 1991-03-29 | 1991-03-29 | Wafer holder manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0755423B2 (en) |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0536819A (en) * | 1991-07-30 | 1993-02-12 | Kyocera Corp | Electrostatic chuck |
| JPH06151332A (en) * | 1992-11-12 | 1994-05-31 | Ngk Insulators Ltd | Ceramic heater |
| US5413360A (en) * | 1992-12-01 | 1995-05-09 | Kyocera Corporation | Electrostatic chuck |
| WO1995014308A1 (en) * | 1993-11-18 | 1995-05-26 | Ngk Insulators, Ltd. | Electrode for generating plasma, element for burying electrode, and method for manufacturing the electrode and the element |
| US5633073A (en) * | 1995-07-14 | 1997-05-27 | Applied Materials, Inc. | Ceramic susceptor with embedded metal electrode and eutectic connection |
| US5800618A (en) * | 1992-11-12 | 1998-09-01 | Ngk Insulators, Ltd. | Plasma-generating electrode device, an electrode-embedded article, and a method of manufacturing thereof |
| US5817406A (en) * | 1995-07-14 | 1998-10-06 | Applied Materials, Inc. | Ceramic susceptor with embedded metal electrode and brazing material connection |
| WO2002047129A1 (en) * | 2000-12-05 | 2002-06-13 | Ibiden Co., Ltd. | Ceramic substrate for semiconductor manufacturing and inspecting devices, and method of manufacturing the ceramic substrate |
| JP2003511856A (en) * | 1999-10-01 | 2003-03-25 | バリアン・セミコンダクター・エクイップメント・アソシエイツ・インコーポレイテッド | Surface structure and manufacturing method thereof, and electrostatic wafer clamp incorporating surface structure |
| US6863281B2 (en) | 2001-09-13 | 2005-03-08 | Sumitomo Osaka Cement Co., Ltd. | Chucking apparatus and production method for the same |
| JP2007511900A (en) * | 2003-10-10 | 2007-05-10 | アクセリス テクノロジーズ インコーポレーテッド | MEMS-based contact-conduction electrostatic chuck |
| JP2009146793A (en) * | 2007-12-17 | 2009-07-02 | Nhk Spring Co Ltd | Heater unit and its manufacturing method |
| JP2011119326A (en) * | 2009-12-01 | 2011-06-16 | Tokyo Electron Ltd | Substrate mounting base, method for manufacturing the same, and substrate processing apparatus |
| JP2013102076A (en) * | 2011-11-09 | 2013-05-23 | Tokyo Electron Ltd | Substrate mounting system, substrate processing apparatus, electrostatic chuck and substrate cooling method |
| JP2015211116A (en) * | 2014-04-25 | 2015-11-24 | 東京エレクトロン株式会社 | Electrostatic chuck, mounting table, plasma processing apparatus |
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|---|---|---|---|---|
| JPH0536819A (en) * | 1991-07-30 | 1993-02-12 | Kyocera Corp | Electrostatic chuck |
| JPH06151332A (en) * | 1992-11-12 | 1994-05-31 | Ngk Insulators Ltd | Ceramic heater |
| US5800618A (en) * | 1992-11-12 | 1998-09-01 | Ngk Insulators, Ltd. | Plasma-generating electrode device, an electrode-embedded article, and a method of manufacturing thereof |
| US6101969A (en) * | 1992-11-12 | 2000-08-15 | Ngk Insulators, Ltd. | Plasma-generating electrode device, an electrode-embedded article, and a method of manufacturing thereof |
| US6197246B1 (en) | 1992-11-12 | 2001-03-06 | Ngk Insulators, Ltd. | Plasma-generating electrode device, an electrode-embedded article, and a method of manufacturing thereof |
| US5413360A (en) * | 1992-12-01 | 1995-05-09 | Kyocera Corporation | Electrostatic chuck |
| WO1995014308A1 (en) * | 1993-11-18 | 1995-05-26 | Ngk Insulators, Ltd. | Electrode for generating plasma, element for burying electrode, and method for manufacturing the electrode and the element |
| US5633073A (en) * | 1995-07-14 | 1997-05-27 | Applied Materials, Inc. | Ceramic susceptor with embedded metal electrode and eutectic connection |
| US5817406A (en) * | 1995-07-14 | 1998-10-06 | Applied Materials, Inc. | Ceramic susceptor with embedded metal electrode and brazing material connection |
| JP2003511856A (en) * | 1999-10-01 | 2003-03-25 | バリアン・セミコンダクター・エクイップメント・アソシエイツ・インコーポレイテッド | Surface structure and manufacturing method thereof, and electrostatic wafer clamp incorporating surface structure |
| JP4854056B2 (en) * | 1999-10-01 | 2012-01-11 | バリアン・セミコンダクター・エクイップメント・アソシエイツ・インコーポレイテッド | Cooling device and clamping device |
| WO2002047129A1 (en) * | 2000-12-05 | 2002-06-13 | Ibiden Co., Ltd. | Ceramic substrate for semiconductor manufacturing and inspecting devices, and method of manufacturing the ceramic substrate |
| US6960743B2 (en) | 2000-12-05 | 2005-11-01 | Ibiden Co., Ltd. | Ceramic substrate for semiconductor manufacturing, and method of manufacturing the ceramic substrate |
| US6863281B2 (en) | 2001-09-13 | 2005-03-08 | Sumitomo Osaka Cement Co., Ltd. | Chucking apparatus and production method for the same |
| JP2007511900A (en) * | 2003-10-10 | 2007-05-10 | アクセリス テクノロジーズ インコーポレーテッド | MEMS-based contact-conduction electrostatic chuck |
| JP2009146793A (en) * | 2007-12-17 | 2009-07-02 | Nhk Spring Co Ltd | Heater unit and its manufacturing method |
| JP2011119326A (en) * | 2009-12-01 | 2011-06-16 | Tokyo Electron Ltd | Substrate mounting base, method for manufacturing the same, and substrate processing apparatus |
| JP2013102076A (en) * | 2011-11-09 | 2013-05-23 | Tokyo Electron Ltd | Substrate mounting system, substrate processing apparatus, electrostatic chuck and substrate cooling method |
| TWI612575B (en) * | 2011-11-09 | 2018-01-21 | Tokyo Electron Ltd | Substrate mounting system, substrate processing apparatus, electrostatic chuck, and substrate cooling method |
| JP2015211116A (en) * | 2014-04-25 | 2015-11-24 | 東京エレクトロン株式会社 | Electrostatic chuck, mounting table, plasma processing apparatus |
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| Publication number | Publication date |
|---|---|
| JPH0755423B2 (en) | 1995-06-14 |
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