JPH04302128A - Process control system on wafer processing line - Google Patents

Abstract

PURPOSE:To establish the title process control system neither requiring an identification system of lot members nor a network such as Ethernet and an emergency stop of a central computer causes not stoppage of line when a wafer is processed while being contained in a cassette on a wafer processing line. CONSTITUTION:A communication controller 3 is built in a processor 2 provided on a processing line while an IC memory 6 built in a cassette 4 containing multiple wafers 5 to be processed stores the data such as the identification code of the cassette 4, job details to be processed in respective processors 2 so that the job corresponding to individual processors 2 may be instructed while inputting the job results of the processors 2 to be stored in the IC memory 6.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a process control system in a wafer processing line, and more particularly to a process control system for wafers in a wafer process in which wafers are stored in cassettes and processed.

0002

[Background Art] As is well known, the manufacturing process of semiconductor devices includes a pre-process called a wafer process for forming elements on a wafer, and after forming elements, the wafer is divided into chips and the chips are assembled as final products. It is broadly divided into post-processes up to sorting/inspection. In the wafer process, which is a pre-process, a lot number is determined for each wafer, for example, 25 wafers as one lot, and all wafers and cassettes in this lot are assigned a lot number and transported to each processing device. Additionally, each cassette comes with a process control card called a run card made of dust-free paper on which processing conditions, inspection conditions, etc. are written, and each processing device uses various instructions for each cassette based on the instruction items. Processing is performed.

Conventionally, lot numbers assigned to cassettes used in the above-mentioned wafer process have been identified by stamping characters, pasting barcode marks, or markings, as described in, for example, Japanese Unexamined Patent Publication No. 60-216534. These symbols are read visually or with a barcode reader, and management is performed based on this lot number. However, in the conventional management method using cassettes with engraved characters or barcode marks, it is necessary to install an expensive recognition device for identification, and visual recognition is an obstacle to automation. It may happen.

Furthermore, in recent years, with the development of communication control technology between processing devices, methods have been developed to remotely control each processing device online using a large central computer, and attempts are being made to automate the manufacturing process. If the recognition device malfunctions, normal process control cannot be performed. Furthermore, such an automated system has the disadvantage that, for example, if an abnormality occurs in the computer, all processing equipment must be stopped, so various measures have been taken. In other words, it is possible to achieve a non-stop system by adopting a dual system to deal with abnormal computer stoppages, but
On the other hand, however, when an Ethernet type network is used for communication control, for example, there is a drawback that if the backbone LAN breaks down, it will not be possible to control all the processing equipment.

[0005]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems without using an expensive recognition device or an Ethernet type network, and without the need for abnormal computer stoppages. An object of the present invention is to provide a process control method for a wafer processing line that can reliably perform process control of wafers that is not affected by the process.

[0006]

[Means for Solving the Problems] The present invention is a process control system when a cassette containing a plurality of wafers is transported to a wafer processing line and processed by a processing device, in which a cassette is embedded inside the back surface of the wafer. The identification symbol of the cassette and work contents such as the processing procedure, processing conditions, and inspection conditions necessary for the processing operation for each processing device are stored in advance in the IC memory stored in the IC memory, and the cassette is stored in the IC memory as data. The wafer processing line is characterized in that when the wafer processing device moves to the processing device, a work instruction corresponding to the processing device is given based on the identification symbol, and data of the work results of the processing device is inputted into the IC memory and stored therein. This is a process control method.

[0007]

[Function] According to the present invention, an IC memory is embedded in the cassette, and the identification symbol of the cassette and information on the work contents necessary for the processing work of each processing device are stored and retained, and the information necessary for the work is stored for each processing device. Since the processing equipment is controlled individually by outputting it as a work instruction, the operation of the equipment can be controlled independently without instructions from a central computer. As a result, even if an abnormality occurs in the central computer, processing can be continued without hindrance to process control.

[0008]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic diagram showing the management method of the present invention. In the figure, 1 is a processing line provided in the previous process, for example, for an element forming process, and it is common for a plurality of similar devices to be arranged in parallel like 1', 1''.2. 4 is a processing device, in which a communication control device 3 is stored. 4 is a cassette containing a plurality of wafers 5, and an IC memory 6 is embedded inside the back surface of the cassette, as shown in FIG. , an external connection part 7 such as a plug connector is provided on the bottom surface, and an external connection part 8 for external contacts is provided on the side thereof. 9 is a communication interface, and 10 is provided in the center. It is a large computer.

A communication control device 3 stored in the processing device 2 has a power supply 1 connected to a supply line 11 as shown in FIG.
For example, RS232C connected to 2 and bus bar 13,
It is composed of a driver 14 such as GP-IB. Moreover, the IC memory 6 embedded in the cassette 4 is connected to the bus bar 15.
A CPU 16 connected to the computer, a storage device 17 such as an EEPROM that retains memory even when the power is turned off, a ROM 18 that stores communication programs, and a ROM 18 that stores data.
It is composed of a RAM 19 for reading data, etc. The communication control device 3 and the IC memory 6 are connected by connecting each line by inserting the external connection section 7 provided on the cassette 4 and the external connection section 20 of the plug connector provided on the loader section of the processing device 2. As a result, the voltage from the power supply 12 of the communication control device 3 can be supplied to the CPU 16 of the IC memory 6 via the supply line 21, and the busbar 13 of the communication control device 3 and the busbar of the IC memory 6 can be connected via the supply line 21. 15 may also be connected. The output of the driver 14 of the communication control device 3 is connected to the communication interface 9 via a line 22.

Here, the IC memory 6 embedded in the cassette 4 is provided with the following functions. ■ A function for writing, storing, and reading out identification symbols such as the lot number of the wafer 5 and information on work contents such as the processing procedure, processing conditions, and inspection conditions of the wafer 5 in the storage device 17. ■ Function to control communication with each processing device 2 using ROM 18 and RAM 19. ■ Data on work results such as processing results and inspection results in each processing device 2 are sent to the RO.
A function to perform calculations and processing according to the program written in the M18, and to write and store it in the storage device 17. ■ A function to send a new work instruction to the processing device 2 again based on the calculation result of the work result data.

Next, an example in which the present invention is applied to a wafer test apparatus will be described with reference to FIG. As shown in the figure, the cassette 4 containing a plurality of wafers 5 is
It is held by the arm 24 of the cassette carrier 23 and is connected from the previous process to the carrier line main line 25 to the carrier line branch lines 26, 2.
7 and is transported to the loader position of the prober 28. Then, the external connection part 7 (see FIG. 2) provided on the bottom surface of the cassette 4 is joined to the external connection part 20 (see FIG. 3) provided at the loader position of the prober 28. As a result, from the power supply 12 of the communication control device 3 provided in the prober 28 to the IC
Since power is supplied to the CPU 16 of the memory 6, the IC
The memory 6 starts operating and outputs work instructions such as processing procedures, processing conditions, and inspection conditions for the wafer 5 necessary for the processing work in the wafer test apparatus from the stored contents of the storage device 17. When the prober 28 finishes loading and aligning the wafers 5, it requests the tester main body 29 to start a test according to the work instructions, and the tester head 30 takes out the wafers 5 one by one from the cassette 4.
Perform the test. When all the wafers in one cassette have been tested in this way, the test results are output from the tester main body 29 to the IC memory 6 to be written and stored in the storage device 17.

[0012] The cassette transport vehicle 23 that has completed its work in the wafer test equipment moves to the next process via the main transport line 25. Information such as the destination of the cassette transport vehicle 23 at that time is stored in the IC memory 6. By storing the data in the memory, the trolley position control device (not shown) can read the data from the external connection part 8 attached to the side of the cassette 4 via the arm 24, and automatically move to the target position based on the work instructions. It is also possible to transport the cassette 4 automatically.

[0013]

As explained above, according to the present invention, an IC memory is embedded in a cassette and the information necessary for the work of each processing device is stored and retained, and the information necessary for the work of each processing device is sent as a work instruction. Since the processing equipment is controlled individually by outputting the information, it is possible to control the operation of the equipment independently without receiving instructions from a central computer. Furthermore, since a network such as Ethernet is not required, it is possible to simplify the communication control system.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram showing a process control system of the present invention.

FIG. 2 is a side view, partially in section, of a cassette used in the present invention.

FIG. 3 is a circuit configuration diagram illustrating detailed functions of the configuration of the present invention.

FIG. 4 is a perspective view showing an example of application of the present invention to a wafer test apparatus.

[Explanation of symbols]

1 Processing line 2 Processing equipment 3 Communication control device 4 Cassette 5 Wafer 6 IC memory 9 Communication interface 10 Computer 23 Cassette transport trolley 28 Prober 29 Tester body 30 Tester head

Claims (1)

[Claims] 1. A process control system when a cassette containing a plurality of wafers is transported to a wafer processing line and processed by a processing device, wherein the cassette is stored in an IC memory embedded in the back surface of the cassette in advance. The identification symbol and work contents such as processing procedures, processing conditions, and inspection conditions necessary for each processing device are stored and retained as data, and when the cassette is moved to a predetermined processing device, the identification symbol is stored. 1. A process control system for a wafer processing line, characterized in that work instructions corresponding to the processing equipment are given based on the processing equipment, and data on the work results of the processing equipment is input to the IC memory and stored and retained.