JPH04301676A - Multi-value output driving device - Google Patents

Abstract

PURPOSE:To realize the miniaturization of a device and reduction in cost and low power consumption by making an integration circuit and using a reactive power recovery circuit. CONSTITUTION:A color AC memory PDP requires maintaining pluses 2, erasuring pluses, and write pulses whose voltages are different with each other. For multi-value driving like this, a P-channel MOSFET, an N channel MOSFET, a diode, etc., are made into the integration circuit on one semiconductor substrate. Further, plural driving MOSFETs 7-9 or bidirectional switches connected with the voltage values and level converters 4-6 which control them are provided.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-value output drive device, and more particularly to a multi-value output drive device that drives a plurality of voltage values.

0002

2. Description of the Related Art Conventionally, such multi-value output driving devices have been used as devices for driving plasma displays (hereinafter referred to as PDPs), electroluminescence devices, and the like.

FIG. 6 is a circuit diagram of a multi-value output drive device showing an example of such a conventional device. As shown in FIG. 6, the conventional multi-value output drive device uses PMOSFET and NMOSFET.
a sustaining signal source 1 consisting of N transistors 27, 2;
8 and diodes 29 to 31, and two open drain ICs 32 and 35. The open drain ICs 32 and 35 each include an NMOSFET 33 and a control circuit 34, and an NMOSFET 36 and a control circuit 37. In addition, outputs O1 to On are AC memory type P
It is connected to the scanning side electrode of the DP (not shown).

FIG. 7 is a timing chart of various signals for explaining the circuit operation in FIG. 6. As shown in FIG. 7, the sustain signal 2 supplied to the transistors 27 and 28 is
This is a pulse that maintains the discharge of the AC memory PDP, and is generated by the sustain signal source 1. This pulse 2 is applied to the outputs O1 to On via transistors 27 and 28. On the other hand, the NMOSFETs controlled by the control circuits 34 and 37
When the transistors 33 and 36 are off, the base of the transistor 27 is open, so the transistor 27 is switched on and the pulse 2 from the sustain signal source 1 is transmitted as is. Also, Figure 7
When the NMOSFET 33 (Tr33) is turned on at the timing of , the base potential of the transistor 27 is lowered through the diode 30, and the transistor 27 is turned off.
Furthermore, the output O1 is fixed to -VE through the diode 29. This voltage -VE is an erase pulse voltage, and this pulse stops the sustain discharge of the AC memory PDP. Next, when NMOSFET 33 is turned off, resistor R1
The base of transistor 27 is biased through. Therefore, the output O1 reaches the collector potential of 0V at this time,
It rises relatively slowly due to the time constant of the resistor R1 and the capacitance connected to the base. Similarly, when NMOSFET 36 is turned on, the O1 output falls to -VW. This voltage -VW is the write pulse voltage, and this pulse causes A
The sustaining discharge of the C memory PDP is started.

[0005]

[Problems to be Solved by the Invention] The conventional multi-value output drive device described above requires a discrete transistor, resistor, and diode for each output, and also requires two open drain driver ICs, so the number of components is large. There is a drawback. Also, two open drain drivers I
Since the voltage applied to C is different between -VE and -VW, and the level of the logic signal input to each control circuit is different,
In addition to requiring a level conversion circuit such as optical isolation,
It has the disadvantage that it is difficult to downsize and reduce costs. Further, since the rise from -VE to 0V and the rise from -VW to 0V are slow due to the time constant of the resistor and the capacitance connected to the base of the transistor, erasing and writing operations take time. That is, since the number of writing lines cannot be increased, it is difficult to increase the number of sustain pulses to increase the brightness. Furthermore, the diode D
1. Composed of open drain driver IC32-
Since the VE circuit can only draw in current (pull operation) and cannot push out current (push operation), the voltage from -VSUS, -VW, which is lower than -VE, is -
It cannot be pulled up directly to VE, and the driving conditions are restricted. In other words, at the intermediate voltage among the multi-value voltages, push-p
It has the disadvantage that it cannot perform a full operation.

[0006] The purpose of the present invention is to reduce the number of parts,
It is an object of the present invention to provide a multi-value output drive device that can achieve miniaturization and cost reduction, as well as an increase in sustain pulses and multi-value voltages.

[0007]

[Means for Solving the Problems] A multi-value output drive device according to a first aspect of the invention is a multi-value output drive device that drives a display panel having a plurality of electrodes with a plurality of voltage values.
An OSFET, an N-channel MOSFET, and a diode are mounted on one semiconductor substrate, and a plurality of drive MOSFETs are connected to a plurality of voltage values, and the plurality of drive MOSs are connected to a plurality of voltage values.
Each output section includes a plurality of level converters for controlling FETs and a diode matrix.

[0008] Furthermore, the multi-value output drive device of the second invention includes:
In a multi-value output drive device that drives a display panel having multiple electrodes with multiple voltage values, P-channel MOSFET
and an N-channel MOSFET on one semiconductor substrate, and each output section includes a plurality of bidirectional switches connected to a plurality of voltage values and a plurality of level converters that control the plurality of bidirectional switches. It is composed of:

[0009]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of a multi-value output drive device showing a first embodiment of the present invention. As shown in FIG. 1, this embodiment uses a P-channel MOSFET (PMOS) and an N-channel MOS connected in series between the power supply -VSUS and the ground.
A sustaining signal source 1 consisting of FETs (NMOS) and outputting a sustaining signal 2 from their connection points, various power supplies -VE,
-VW, -VW+5, VDD, and a multi-value output driver IC3 that outputs various voltage values to O1 to On upon receiving the control input 13. This multi-value output driver IC3
is formed on one semiconductor substrate, and has n outputs O1 to O
Each output part of n, for example, output O1 is connected to drive MOSFET7~
9, level converters 4 to 6 that drive them, control circuit 12 that controls them, and matrix diodes 10 and 1
1. In addition, the control input 13 inputs a signal with an amplitude of 5V with -VW as a reference, and the control circuit 12 inputs a signal with an amplitude of 5V based on -VW.
~O1c signal is output. Further, the level converters 4 to 6 convert the amplitudes of -VW to -VW+5V into amplitudes of -VW to VDD, and input the amplitudes to the gates of the drive MOSFETs 7 to 9. These drive MOSFETs 7 to 9 have thick gate oxide films to increase the voltage resistance, and are set to withstand high voltage amplitudes from -VW to VDD.

FIG. 2 is a circuit diagram of the level converter shown in FIG. 1, and FIG. 3 is a timing diagram of various signals for explaining the circuit operation in FIG. 1. As shown in FIGS. 2 and 3, the drive MOSFETs 7 to 9 are turned on and off at the timings shown in Tr7 to Tr9. Due to recent advances in IC technology, such high-voltage ICs with a high degree of integration and a large number of outputs can be produced at low cost.

Furthermore, by adopting such a complete CMOS (complementary MOS) configuration, high-speed switching and low power consumption can be realized. That is, in FIG. 1, a sustain signal source 1 is provided outside the IC, and a sustain signal (
The reason why the pulse) 2 is generated is that this sustain pulse 2 is always included in the full output, which consumes a large amount of power, and this heat generation is to be consumed outside the IC. Various circuits are used for this sustain signal source 1 part.

FIGS. 4A and 4B are a diagram of a reactive power recovery circuit used in the sustaining signal source shown in FIG. 1 and a timing diagram of its signals, respectively. As shown in FIGS. 4(a) and 4(b), this reactive power recovery circuit includes PMOSs 14, 20, NMOSs 15 to 17, 20, and a Zener diode Z.
It is composed of D1, ZD2, diodes 18, 19, capacitor C1, power supply VG, and inductor L. The inductor L and capacitor C1 can recover the reactive power consumed by the capacitive load C2, making it possible to construct a low-power, compact, and low-cost drive system.

According to the first embodiment described above, the multi-value output driver IC 3 has a breakdown voltage of 250V, an output current of 200mA,
A pellet with an output of about 32 can be packed into a pellet of about 6 x 7 mm square, and can be mass-produced for about a few hundred yen per piece by sealing with a mold. In addition, when driving a color AC and memory PDP with 512 lines on the scanning side, conventionally 512 lines
Whereas it required discrete components for two circuits,
According to this embodiment, it can be realized with 16 driver ICs 3.

FIGS. 5A and 5B are a circuit diagram of a multi-value output drive device and a timing diagram of its input/output signals, respectively, for explaining a second embodiment of the present invention. Figure 5 (a
), (b), the difference between this embodiment and the first embodiment described above is that a bidirectional switch consisting of NMOS 24 and 25 is used instead of a diode matrix. . Although this bidirectional switch has a slightly larger pellet size than a diode matrix, it has the advantage of enabling push-pull operation at an intermediate voltage V1 between voltages V0 and V2. Also, O1a to O1
c are inputs to be supplied to the level converters 4 to 6, respectively, 23 is a PMOS, and 26 is an NMOS. For this reason,
Various voltages of V0 to V2 are output to each of the outputs O1 to On.

[0016]

Effects of the Invention As explained above, the multi-value output drive device of the present invention includes a control circuit, a level converter, a drive MOSFE
By integrating T into one IC pellet, the number of parts can be reduced and the size can be significantly reduced. Further, in the present invention, the control input only needs to input a signal with an amplitude of 5V with −VW as the reference, and the reference of the control system is set to −VW.
If set to , no isolation is required, which has the effect of allowing mass production and lowering costs. Furthermore, by using a reactive power recovery circuit in the maintenance signal source, the present invention can recover nearly 90% of the reactive power.
Since a small signal source can be used, the system as a whole can be significantly reduced in size and weight. Furthermore, the present invention has the advantage that the driving conditions are not restricted and the sustain pulse and multi-value voltage can be increased.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a multi-value output drive device showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram of the level converter shown in FIG. 1;

FIG. 3 is a timing diagram of various signals for explaining the circuit operation in FIG. 1;

FIG. 4 is a diagram showing a reactive power recovery circuit and signal timing used in the sustaining signal source shown in FIG. 1;

FIG. 5 is a diagram showing a circuit of a multi-value output driving device and the timing of input/output signals for explaining a second embodiment of the present invention.

FIG. 6 is a circuit diagram of a multi-value output drive device showing a conventional example.

FIG. 7 is a timing diagram of various signals for explaining the circuit operation in FIG. 6;

[Explanation of symbols]

1 Sustaining signal source 3 Multi-value output driver IC 4 to 6 Level converter 7, 14, 20, 23 PMOSFET 8, 9,
15-17, 21, 24-26 NMOSFET 10, 11, 18, 19 Diode 12
Control circuit 13 Control input 22 Output terminal

Claims (4)

[Claims] 1. A multi-value output drive device that drives a display panel having a plurality of electrodes with a plurality of voltage values, in which a P-channel MOSFET, an N-channel MOSFET, and a diode are mounted on one semiconductor substrate, and a display panel with a plurality of voltage values is mounted. 1. A multi-value output drive device comprising, at each output section, a plurality of drive MOSFETs connected to each other, a plurality of level converters for controlling the plurality of drive MOSFETs, and a diode matrix. 2. A multi-value output drive device that drives a display panel having a plurality of electrodes with a plurality of voltage values, in which a P-channel MOSFET and an N-channel MOSFET are mounted on one semiconductor substrate, and a multi-value output drive device that drives a display panel with a plurality of voltage values. 1. A multi-value output drive device comprising, in each output section, a plurality of bidirectional switches connected to a plurality of bidirectional switches and a plurality of level converters for controlling the plurality of bidirectional switches. 3. The multi-value output drive device according to claim 1, wherein one of the plurality of voltage values is driven by an external pulse drive device. 4. The multi-value output drive device according to claim 3, wherein the pulse drive device uses a reactive power recovery device including an inductor and a capacitor.