JPH04301296A - Memory device - Google Patents

Abstract

PURPOSE:To provide a memory device where a latch circuit is easily constituted by a light emitting means and a light receiving means. CONSTITUTION:A switch control signal input means 60 controls a switch means 40 to be operation possible or impossible, the switch means 40 which is made to be operation possible turns on the light emitting means 20 in accordance with the level 'H' of an input signal, the turned-on light is received by the light receiving means 10 so as to supply current to the light emitting means 20 and to continue supplying current even if the switch means is made to be operation impossible and, then, an energized state is hold. When an input means 50 inputs the level 'L' of the signal, the current of the light emitting means 20 is interrupted so as to execute turning-off and to cut the current of the light receiving means 10 at the time of making the switch means 40 operation possible and the current interruption state is hold even at the time of making the switch means 40 operation impossible. A data signal obtained by converting the interruption or energized state of hold current into a voltage by means of an output means 30 so as to be hold is outputted.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory device using light.

0002

2. Description of the Related Art In recent years, memory devices have been widely used, and one of the important issues is high-speed operation and simplification of circuit configuration.

[0003] Conventional memory devices will be explained below. Conventional memory devices include those that have a latch circuit as a basic component, such as static RAM, and those that have latch circuits as a basic component, such as static RAM, and those that have a latch circuit as a basic component, such as static RAM, and dynamic RAM.
A typical memory device, like AM, has a capacitor as its basic component.

0004

[Problems to be Solved by the Invention] In such conventional memory devices, those whose constituent elements are latch circuits require a circuit configuration with a large number of transistors, and those whose constituent elements are capacitors require a refresh operation. A circuit configuration is required for this purpose.

[0005] Therefore, in either case, there is a problem in that the scale of the circuit configuration of the device becomes large.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a memory device with a simple device configuration.

[0007]

[Means for Solving the Problems] In order to achieve the above objects, the present invention includes a light emitting means that emits light by applying electricity, and a light emitting means that receives light emitted from the light emitting means and supplies current to the light emitting means. a light receiving means, a switch means for supplying or cutting off current to the light emitting means in response to a high level or a low level of a data signal input, and a switch control signal input means for controlling the operation of the switch means to be enabled or disabled; an output means for outputting a data signal in response to the current of the light emitting means, and the memory is configured such that the energization or cutoff state of the current of the light emitting means is determined by the input of the switch control signal to latch and output the data signal input. A device.

[0008]

[Operation] In the above configuration, the present invention controls the switch means to be enabled or disabled by the switch control signal input means, and the switch means enabled by the switch control signal input means changes to the level 'H' of the input signal. Correspondingly, the light emitting means is turned on, and the lighting light is received by the light receiving means and a current is supplied to the light emitting means, so that even if the switch control signal input means disables the switch means, the current is continued to be supplied and energized. Retain state. When the input means inputs the signal level 'L', when the switch control signal input means enables the switch means, the current of the light emitting means is cut off and the light is turned off.Therefore, the current of the light receiving means is also cut off, and the switch is turned off. The current interruption state is maintained even if the control signal disables the switching means. The held current cutoff or energization state is converted into voltage by the output means and the held data signal is output.

[0009]

Embodiments (Embodiment 1) A memory device according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing the main structure of a memory device according to an embodiment of the present invention. In the figure, 10 is a light receiving means that detects light and outputs a current, 20 is a light emitting means that emits light when a current is applied, and 30 is a light receiving means 10 and a light emitting means 20.
40 is a switch means composed of a P-channel MOS transistor and an N-channel MOS transistor, 50 is a data input means to the switch means 40, and 60 is a switch for opening and closing the switch means 40. The control signal input means 70 is data output means for outputting the voltage generated by the resistor means 30.

[0011] The mutual relationship and operation of the above components will be explained. In the initial state, the light emitting means 20 is off, and the data output means 70 outputs an 'L' level. When an 'H' level is applied to the data input means 50 and a signal for closing the switch means 40 is applied to the switch control signal input means 60, a current flows through the light emitting means 20 and the resistor means 30, and the light emitting means 20 lights up. At the same time, a voltage according to this is outputted from the data output means 70. Once the light emitting means 20 emits light, the light is received by the light receiving means 10, and even if the switch means 40 is opened by the switch control signal input means 60 in this state, the light receiving means 10 detects the light from the light emitting means 20 and the current does not flow. continues to flow, the light emitting means 20 and the light receiving means 10 become energized, and the data output means 70 receives ''.
Continue to output H' level output voltage.

When the data output is set to the 'L' level, a ground level 'L' is applied to the data input means 50, and when a signal for closing the switch is applied to the switch control signal input means 60, the light emitting means 20 is turned off. The light goes out, the light receiving means 10 also loses light and enters a cut-off state, and the energization state is canceled and the data output means 70 outputs an 'L' level.

FIG. 2 is an explanatory diagram showing the structure of the light receiving means 10 and the light emitting means 20 in a memory device according to an embodiment of the present invention. In the figure, a light receiving section of a light receiving means 10 and a light emitting section of a light emitting means 20 are provided facing each other, and are covered with a sealing means 100 so as not to malfunction due to external light other than the light emitting means.

As described above, according to the memory device of the embodiment of the present invention, the light emitting means is energized and emits light, and the light receiving means receives the light emitted from the light emitting means and supplies current to the light emitting means. a switch means for supplying or cutting off current to the light emitting means in response to a high level or a low level of a data signal input; a switch control signal input means for controlling the operation of the switch means to enable or disable the light emitting means; an output means for outputting a data signal in accordance with the current of the light emitting means, and the memory device is configured such that the energization or cutoff state of the current of the light emitting means is determined by the input of the switch control signal to latch and output the data signal input. By doing so,
A memory device that operates at high speed with a small number of transistors and does not require refresh processing can be obtained.

[0015]

As is clear from the above embodiments, the present invention comprises a light-emitting means that emits light by applying electricity, and a light-receiving means that receives the light emitted from the light-emitting means and supplies current to the light-emitting means. , a switch means for supplying or cutting off current to the light emitting means in response to a high level or a low level of a data signal input; a switch control signal input means for controlling the operation of the switch means to be enabled or disabled; and the light emitting means an output means for outputting a data signal in response to the current;
By providing a memory device in which the current conduction or cutoff state of the light emitting means is determined by the switch control signal input to latch and output the data signal input, the memory operates at high speed with a small number of transistors and does not require refresh processing. You can get the equipment.

[Brief explanation of drawings]

FIG. 1 is a main circuit diagram showing the configuration of a memory device according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing the configuration of a light emitting means and a light receiving means in a memory device according to an embodiment of the present invention.

[Explanation of symbols]

10 Light receiving means 20 Light emitting means 30 Resistor means 40 Switch means 50 Input means 60 Switch control signal input means 70 Output means

Claims (1)

[Claims] 1. A light emitting device that emits light when energized; a light receiving device that receives light emitted from the light emitting device and supplies current to the light emitting device; switch means for supplying or cutting off current to the light emitting means; switch control signal input means for enabling or disabling the operation of the switch means; and output means for outputting a data signal in response to the current of the light emitting means. 2. A memory device comprising: a current conduction state or a cutoff state of the light emitting means such that a data signal input is latched and outputted by the switch control signal input.