JPH0429893A - Card base containing ic memory - Google Patents
Card base containing ic memoryInfo
- Publication number
- JPH0429893A JPH0429893A JP2135793A JP13579390A JPH0429893A JP H0429893 A JPH0429893 A JP H0429893A JP 2135793 A JP2135793 A JP 2135793A JP 13579390 A JP13579390 A JP 13579390A JP H0429893 A JPH0429893 A JP H0429893A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- memory
- connection terminal
- card base
- mounting board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 title claims abstract description 53
- 230000005611 electricity Effects 0.000 abstract description 12
- 230000003068 static effect Effects 0.000 abstract description 10
- 238000007599 discharging Methods 0.000 abstract 1
- 238000007747 plating Methods 0.000 description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
Landscapes
- Credit Cards Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、ＩＣ（集積回路）メモリを内蔵したＩＣメモ
リ内蔵カード基体に間し、とくに静電気により、内蔵し
たＩＣメモリが破壊するのを防止したＩＣメモリ内蔵カ
ード基体に関する。Detailed Description of the Invention (Industrial Field of Application) The present invention provides an IC (integrated circuit) memory for preventing damage to the built-in IC memory due to static electricity. The present invention relates to a card base with a built-in IC memory.
（従来技術およびその課題）
ＩＣメモリを内蔵したＩＣメモリ内蔵カード基体は種々
のデータを記憶する媒体として近年広く使用されている
。この種ＩＣメモリ内蔵カード基体はコンピュータ等の
外部装置と接続するための接続端子が多数説けであるが
、該カード基体を使用する際に、帯電した人が該カード
を持って外部装置に接続しようとすると、接続端子の信
号用接続端子箇所で高電圧（約２万ボルト）の放電が生
じる恐れがあり、このなめ、内蔵したＩＣメモリが破壊
されたり、誤動作するという問題点があった。(Prior Art and its Problems) Card bases with built-in IC memories have been widely used in recent years as media for storing various data. This type of card base with a built-in IC memory has many connection terminals for connecting to external devices such as computers, but when using the card base, a charged person may hold the card and connect it to an external device. If so, there is a risk that a high voltage (approximately 20,000 volts) will be discharged at the signal connection terminal of the connection terminal, which may cause the built-in IC memory to be destroyed or malfunction.
（課題を解決するための手段）
本発明は上記従来の点に鑑みなされたものであって、Ｉ
Ｃメモリと、外部装置に接続するための接続端子を有す
るＩＣ内蔵カード基体であって、該カード基体の接続端
子の接地用接続端子またはこれに接続された接地用配線
端子に、接続端子の信号用接続端子またはこれに接続さ
れた信号用配線端子よりも先端を先細形状とした放電電
極部を形成することにより、発生した静電気により、内
蔵したＩＣメモリが破壊したり、誤動作するのを防止し
たＩＣメモリ内蔵カード基体である。(Means for Solving the Problems) The present invention has been made in view of the above-mentioned conventional points.
A card base with a built-in IC having a C memory and a connection terminal for connecting to an external device, wherein a signal of the connection terminal is connected to the ground connection terminal of the connection terminal of the card base or the ground wiring terminal connected to the ground connection terminal of the connection terminal of the card base. By forming a discharge electrode portion with a tapered tip than the connection terminal for the terminal or the signal wiring terminal connected to it, the built-in IC memory is prevented from being destroyed or malfunctioning due to generated static electricity. It is a card base with built-in IC memory.
（実施例）
以下、本発明を第１〜７図に示す実施例に基づき説明す
る。(Example) The present invention will be described below based on the example shown in FIGS. 1 to 7.
第１図は本発明のＩＣメモリ内蔵カード基体の一実施例
を示す斜視図、第２図は第１図の■−■断面図、第３図
は第１〜２図のＩＣメモリ内蔵カード基体に使用するＩ
Ｃメモリ実装基板の表面を示す平面図、第４図は第３図
に示すＩＣメモリ実装基板の裏面を示す平面図、第５図
は第３図のＩＣメモリ実装基板の裏面の別の実施例を示
す平面図、第６図は別のＩＣメモリ実装基板の裏面を示
す平面図、第７図は別のＩＣメモリ実装基板の表面を示
す平面図である。Fig. 1 is a perspective view showing an embodiment of the card base with built-in IC memory of the present invention, Fig. 2 is a sectional view taken along the line ■-■ in Fig. 1, and Fig. 3 is the card base with built-in IC memory shown in Figs. I used for
4 is a plan view showing the back surface of the IC memory mounting board shown in FIG. 3; FIG. 5 is another embodiment of the back surface of the IC memory mounting board shown in FIG. 3. FIG. 6 is a plan view showing the back surface of another IC memory mounting board, and FIG. 7 is a plan view showing the front surface of another IC memory mounting board.
第１図において、１は本発明のＩＣメモリ内蔵カード基
体であって、該ＩＣメモリ内蔵カード基体１は、ＩＣメ
モリ実装基板１１にＩＣメモリ１２を搭載し、その端部
に外部装置との多数の接続端子１３を形成し、このＩＣ
メモリ実装基板１１を外枠部材１４内に装着して一体と
しである。１５は中枠部材であって、ＩＣメモリ１２お
よび電池１６等を収容する収容部を形成してあり、ＩＣ
メモリ実装基板１１とともに外枠部材１４の内部に装着
される。ＩＣメモリ１２と接続端子１３ならびに電池１
６とはプリント配線（図示＃ｉ）で相互に接続されてい
る。１７はステンレス板等の金属板からなるシールド板
であって、ＩＣメモリ実装基板１１に搭載したＩＣメモ
リ１２を両側から挾み込むようにして装着しである。該
シールド板１７はコイルバネ等のバネ手段（図示路）で
相互に接続しであるとともに、後述する接続端子１３の
接地用接続端子１３Ａにプリント配線（図示路）を介し
て接続しである。In FIG. 1, reference numeral 1 denotes a card base with a built-in IC memory of the present invention, and the card base 1 with a built-in IC memory has an IC memory 12 mounted on an IC memory mounting board 11, and a large number of external devices connected to the end thereof. The connection terminal 13 of this IC is formed.
The memory mounting board 11 is mounted inside the outer frame member 14 and is integrated. Reference numeral 15 denotes a middle frame member, which forms a housing section for housing the IC memory 12, battery 16, etc.
It is mounted inside the outer frame member 14 together with the memory mounting board 11 . IC memory 12, connection terminal 13 and battery 1
6 and are mutually connected by printed wiring (#i shown). Reference numeral 17 denotes a shield plate made of a metal plate such as a stainless steel plate, and is mounted so as to sandwich the IC memory 12 mounted on the IC memory mounting board 11 from both sides. The shield plates 17 are connected to each other by spring means (paths shown) such as coil springs, and are also connected to a grounding connection terminal 13A of the connection terminal 13, which will be described later, via printed wiring (paths shown).
第３〜４図に平面図で示すように、ＩＣメモリ実装基板
１１の表面の端部には、接地用接続端子１３Ａおよび信
号用接続端子１３Ｂが形成してあり、各接続端子１３Ａ
および１３Ｂはスルーホール１８を通して裏面の接地用
配線端子１９Ａおよび信号用配線端子１９Ｂに接続しで
ある。接続端子１３の接地用接続端子１３Ａに接続され
た接地用配線端子１９Ａのみに、信号用接続端子１３Ｂ
あるいはこれに接続された信号用配線端子１９Ｂよりも
先端を先細形状とした放電電極部２を形成しである。こ
れにより、帯電した人がＩＣメモリ内蔵カード基体１を
持って外部装置に接続しようとする際、高電圧の静電気
が生じても、先端を先細形状とした放電＠＃１部２から
最初に静電気が放電されて、信号用接続端子１３Ｂから
静電気が放電されるのを防止し、ＩＣメモリ１２が破壊
されなり、誤動作するのを防止することができるのであ
る。図示したように、先端を先細形状とした放電電極部
２が最も長くなるよう突出形成すると一層好適である。As shown in plan views in FIGS. 3 and 4, a ground connection terminal 13A and a signal connection terminal 13B are formed at the end of the surface of the IC memory mounting board 11, and each connection terminal 13A
and 13B are connected to the grounding wiring terminal 19A and the signal wiring terminal 19B on the back side through the through hole 18. Only the ground wiring terminal 19A connected to the ground connection terminal 13A of the connection terminal 13 is connected to the signal connection terminal 13B.
Alternatively, the discharge electrode portion 2 is formed so that the tip thereof is tapered more than the signal wiring terminal 19B connected thereto. As a result, even if high-voltage static electricity is generated when a charged person holds the card base 1 with built-in IC memory and tries to connect it to an external device, the static electricity will first be discharged from the tapered tip #1 part 2. This prevents static electricity from being discharged from the signal connection terminal 13B, thereby preventing the IC memory 12 from being destroyed and malfunctioning. As shown in the figure, it is more preferable to form the discharge electrode portion 2 having a tapered tip so as to protrude to be the longest.
先端を先細形状とした放電電極部２を接地用配線端子１
９Ａに形成するには、各配線端子１９Ａ、１９Ｂおよび
各接続端子１３Ａ、１３Ｂを金メツキする際には、細幅
のメツキ用端子を各配線端子１９Ａ、１９ＢからＩＣメ
モリ実装基板１１の端部に延設して形成し、該メツキ用
端子を介して金メツキを施すが、各端子１９Ａ、１９Ｂ
、１３Ａおよび１３Ｂに金メツキを施した後、このメツ
キ用端子のうち、接地用配線端子１９Ａに形成したメツ
キ用端子のみを残して、他のメツキ用端子を切削すれば
良い。A discharge electrode part 2 with a tapered tip is connected to a grounding wiring terminal 1
9A, when gold plating each wiring terminal 19A, 19B and each connection terminal 13A, 13B, connect a narrow plating terminal from each wiring terminal 19A, 19B to the end of IC memory mounting board 11. Gold plating is applied through the plating terminals.
, 13A, and 13B, the other plating terminals may be cut, leaving only the plating terminal formed on the grounding wiring terminal 19A among the plating terminals.
第５図に示すように、信号用配線端子１９ＢとＩＣメモ
リ実装基板１１との間にも、多数の放電電極２を形成す
ると、発生した静電気が信号用接続端子１３Ｂまたは信
号用配線端子１９Ｂで放電することなく、接地用接続端
子１３Ａおよび接地用配線端子１９Ａに接続された放電
型［！２から確実に放電されるので好適である。As shown in FIG. 5, when a large number of discharge electrodes 2 are formed between the signal wiring terminal 19B and the IC memory mounting board 11, the generated static electricity is transferred to the signal connection terminal 13B or the signal wiring terminal 19B. The discharge type [! This is preferable because the discharge is reliably discharged from 2.
接地用接続端子１３Ａおよびこれに接続された接地用配
線端子１９Ａの形成位置は、ＩＣメモリ実装基板１１の
中央部に限定されず、第６図に平面図で示すように、Ｉ
Ｃメモリ実装基板１１の両側端部に配設し、接地用配線
端子１９Ａの先端を尖鋭とした先細形状の放電電極部２
としても良い。The formation position of the grounding connection terminal 13A and the grounding wiring terminal 19A connected thereto is not limited to the central part of the IC memory mounting board 11, but as shown in the plan view in FIG.
Discharge electrode portions 2 are disposed at both ends of the C memory mounting board 11 and have a tapered shape with a sharp tip of the grounding wiring terminal 19A.
It's good as well.
更に、第７図に平面図で示すように、ＩＣメモリ実装基
板１１の表面において、接続端子１３の接地用接続端子
１３Ａ自体を先端が尖鋭な先細形状の放電電極部２とし
ても良い。この場合、接地用接続端子１３Ａ以外の信号
用接続端子１３Ｂの先端形状を半円状としておくと、発
生した静電気が接地用接続端子１３Ａのみで一層放電し
易くなるので好適である。Furthermore, as shown in a plan view in FIG. 7, on the surface of the IC memory mounting board 11, the grounding connection terminal 13A of the connection terminal 13 itself may be formed into a tapered discharge electrode portion 2 with a sharp tip. In this case, it is preferable to make the tips of the signal connection terminals 13B other than the ground connection terminal 13A semicircular, since this makes it easier for the generated static electricity to be discharged only through the ground connection terminal 13A.
以上、ＩＣメモリ１２を搭載し、端部に接続端子１３を
形成したＩＣメモリ実装基板１１を、外枠部材１４等と
一体に構成したものを図示したが、本発明はこれに限定
されず、ゲームカートリッジ等、筐体内にＩＣメモリ１
２を内蔵したカード基体１１を装着させ、筐体の側面部
の開口において、外部装置と接続する等、他の構成であ
っても勿論良い。Although the IC memory mounting board 11 on which the IC memory 12 is mounted and the connection terminals 13 are formed at the end is configured integrally with the outer frame member 14 and the like has been illustrated above, the present invention is not limited to this. 1 IC memory inside the housing for game cartridges, etc.
Of course, other configurations may also be used, such as attaching the card base 11 containing the card 2 and connecting it to an external device through an opening in the side surface of the housing.
（発明の効果）
以上説明したように、本発明によれば、ＩＣメモリ内蔵
カード基体の接続端子の接地用接続端子またはこれに接
続された接地用配線端子に、接続端子の信号用接続端子
またはこれに接続された信号用配線端子よりも先端を先
細形状とした放電電極部を形成したから、カード基体を
帯電した人が持って、コンピュータ等の外部装置に接続
する際、静電気は接地用接続端子またはこれに接続され
た接地用配線端子に形成した放電電極部から放電され、
信号用接続端子またはこれに接続された信号用配線端子
から放電されるのを防止するから、内蔵したＩＣメモリ
が破壊されたり、誤動作するのを防止することができる
という利点を有する。(Effects of the Invention) As explained above, according to the present invention, the signal connection terminal or Since a discharge electrode part is formed with a tapered tip than the signal wiring terminal connected to this, when a charged person holds the card base and connects it to an external device such as a computer, static electricity is grounded. Discharge occurs from the discharge electrode formed on the terminal or the grounding wiring terminal connected to it,
Since discharge from the signal connection terminal or the signal wiring terminal connected thereto is prevented, it has the advantage that the built-in IC memory can be prevented from being destroyed or malfunctioning.
第１図は本発明のＩＣメモリ内蔵カード基体の一実施例
を示す斜視図、第２図は第１図の■−…断面図、第３図
は第１〜２図のＩＣメモリ内蔵カード基体に使用するＩ
Ｃメモリ実装基板の表面を示す平面図、第４図は第３図
に示すＩＣメモリ実装基板の裏面を示す平面図、第５図
は第３図のＩＣメモリ実装基板の裏面の別の実施例を示
す平面図、第６図は別のＩＣメモリ実装基板の裏面を示
す平面図、第７図は別のＩＣメモリ実装基板の表面を示
す平面図である。
図中、１はＩＣメモリ内蔵カード基体、１１はＩＣメモ
リ実装基板、１２はＩＣメモリ、１３は接続端子、１３
Ａは接地用接続端子、１３Ｂは信号用接続端子、１４は
外枠部材、１５は中枠部材、１６は電池、１７はシール
ド板、１８はスルーホール、１９は配線端子、１９Ａは
接地用配線端子、１９Ｂは信号用配線端子、２は放電電
極部である６特許出願人 三菱樹脂株式会社第
固
藁
図
第
凪
第
図
／ＩFig. 1 is a perspective view showing one embodiment of the card base with built-in IC memory of the present invention, Fig. 2 is a cross-sectional view taken along line 1 in Fig. 1, and Fig. 3 is the card base with built-in IC memory of Figs. 1 and 2. I used for
4 is a plan view showing the back surface of the IC memory mounting board shown in FIG. 3; FIG. 5 is another embodiment of the back surface of the IC memory mounting board shown in FIG. 3. FIG. 6 is a plan view showing the back surface of another IC memory mounting board, and FIG. 7 is a plan view showing the front surface of another IC memory mounting board. In the figure, 1 is a card base with built-in IC memory, 11 is an IC memory mounting board, 12 is an IC memory, 13 is a connection terminal, 13
A is a grounding connection terminal, 13B is a signal connection terminal, 14 is an outer frame member, 15 is a middle frame member, 16 is a battery, 17 is a shield plate, 18 is a through hole, 19 is a wiring terminal, 19A is a grounding wiring Terminal, 19B is a signal wiring terminal, 2 is a discharge electrode part. 6 Patent applicant: Mitsubishi Plastics Co., Ltd.
Claims (1)
するＩＣメモリ内蔵カード基体であって、該カード基体
の接続端子の接地用接続端子またはこれに接続された接
地用配線端子に、接続端子の信号用接続端子またはこれ
に接続された信号用配線端子よりも先端を先細形状とし
た放電電極部を形成したことを特徴とするＩＣメモリ内
蔵カード基体。An IC memory built-in card base having an IC memory and a connection terminal for connecting to an external device. 1. A card base with a built-in IC memory, characterized in that a discharge electrode portion is formed with a tip end tapered more than a signal connection terminal or a signal wiring terminal connected thereto.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2135793A JPH0429893A (en) | 1990-05-26 | 1990-05-26 | Card base containing ic memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2135793A JPH0429893A (en) | 1990-05-26 | 1990-05-26 | Card base containing ic memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0429893A true JPH0429893A (en) | 1992-01-31 |
Family
ID=15159962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2135793A Pending JPH0429893A (en) | 1990-05-26 | 1990-05-26 | Card base containing ic memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0429893A (en) |
-
1990
- 1990-05-26 JP JP2135793A patent/JPH0429893A/en active Pending
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