JPH04297946A - Display character address data transfer system - Google Patents

Abstract

PURPOSE:To reduce the capacity of an address data memory by providing two address data memories having capacity for address data for one line of display characters on a screen and a switching circuit. CONSTITUTION:A data memory 1 for a microcomputer, switching circuit 2, two address data memories 3 and 4, and data buses 5-7 are provided. This switching circuit 2 is provided for selectively inputting the address data of display character data for one line transferred from the data memory 1 from either the address data memory 3 or 4. The address data memories 3 and 4 are memories for temporarily storing the address data for one line of the display character data on the display screen. Then, these address data memories 3 and 4 are constituted by using a shift register with the same bit length as the data length of the address data of the display character data for one line, for example.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display character address data transfer system, and more particularly to a display character address data transfer system for a microcomputer having a character display function.

0002

2. Description of the Related Art A conventional display character address data transfer system of this type includes a data memory 1 of a microcomputer, a data bus 5, and a data memory 8 for storing display character address data, as shown in FIG. It was composed of: Here, as the data memories 1 and 8, RAM
It is common to use

Next, the operation will be explained.

In a microcomputer having a character display function, a data memory 8 of the same size as the data memory 1 is provided because the control data memory 1 cannot be shared for storing display character address data. When displaying characters, the display character address data stored in the data memory 1 is first transferred to the data memory 8 via the data bus 5, and is read out and output to the display circuit by controlling the display characters. Was.

[0005]

[Problems to be Solved by the Invention] The conventional display character address data transfer method described above requires a data memory for display character address data of the same size as a data memory for control. The disadvantage was that the physical size of the Additionally, as the number of displayed characters increases, the time required to transfer from the control data memory to the data memory for display character address data increases, and if this transfer time exceeds the display screen rewriting time, the display becomes impossible. Ta.

[0006]

[Means for Solving the Problems] The display character address data transfer method of the present invention provides a first address data transfer system for storing display character data for one line on a display screen of display character data stored in a data storage device. and a second storage means, when reading out the address data stored in the first storage means, the address data is inputted to the second storage means and the address data stored in the second storage means is read out. and memory switching means for alternately switching the inputs of the first and second storage means so that the address data is input to the first storage means when address data is read.

[0007]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the display character address data transfer system of the present invention.

The display character address data transfer system of this embodiment, as shown in FIG. It is composed of:

The switching circuit 2 is for selecting and inputting the address data of one line of display character data transferred from the data memory 1 to either the address data memories 3 or 4.

The address data memories 3 and 4 are memories for temporarily storing address data of one line of display character data on the display screen. The address data memories 3 and 4 are constructed using, for example, shift registers having the same bit length as the data length of the address data of one line of display character data.

Data bus 5 is a data bus that connects data memory 1 to switching circuit 2 .

Data buses 6 and 7 are data buses that connect from switching circuit 2 to address data memories 3 and 4, respectively.

Next, the operation of this embodiment will be explained.

First, when the microcomputer displays characters, address data A1 of one line of display character data on the display screen stored in the data memory 1 is transferred to the switching circuit 2 via the data bus 5. do. Next, the switching circuit 2 transfers this address data A1 to the address data memory 3 via the data bus 6, and the address data memory 3 stores this address data A1. Here, the characters in the row of address data A1 are displayed on the screen.

Next, while the characters of the address data A1 are being displayed on the screen, the address data A2 of the display character data of the next line is transferred from the data memory 1 to the data bus 5 to the switching circuit 2.
The address data A2 is then transferred to the address data memory 4 via the data bus 7, and the address data memory 4 stores this address data A2. When the screen display of the characters of the address data A1 is completed, the address data A2 stored in the address data memory 4 is read out, and the characters of the row of the address data A2 are displayed on the screen. Meanwhile, the address data A3 of the character in the next line is transferred from data memory 1.
The address data A3 is transferred to the address data memory 3 via the data bus 5, switching circuit 2 and data bus 6, and the address data memory 3 stores this address data A3.

The above operation is repeated every time the line of displayed characters on the screen changes, and the address data memories 3 and 4 are filled with
By switching the switching circuit 2, the address data A2, A3, . At the same time, the address data A1, A2, A3, . . . of display character data in the previous row are sequentially read out, and the characters in each row of address data are sequentially displayed on the screen.

[0018]

[Effects of the Invention] As explained above, the display character address data transfer method of the present invention has two address data memories each having a capacity of address data for one line of display characters on the screen, and these memories are switched alternately. By providing the switching circuit, the capacity of the address data memory can be reduced, and therefore the physical size of the memory can be reduced. Furthermore, even if the number of lines displayed on the screen increases, the transfer time of address data only needs to be taken into consideration for one line, so that stable character display can be achieved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a display character address data transfer method of the present invention.

FIG. 2 is a block diagram showing an example of a conventional display character address data transfer method.

[Explanation of symbols]

1, 8 Data memory 2 Switching circuit 3, 4 Address data memory 5-7 Data bus

Claims (2)

[Claims] 1. First and second storage means for storing address data of one line of display character data on a display screen of display character data stored in a data storage device; When reading the stored address data, the address data is input to the second storage means, and when reading the address data stored in the second storage means, the address data is input to the first storage means. A display character address data transfer method comprising memory switching means for alternately switching inputs of the first and second storage means so as to input address data. 2. The display character address data transfer system according to claim 1, wherein the storage means includes a shift register having the same bit length as the data length of the address data.