JPH04279054A - Manufacture of input protection circuit - Google Patents

Abstract

PURPOSE:To enable an area of an input circuit to be reduced by forming a gate electrode for reducing a withstand voltage of a source/drain diode of a field transistor at an upper portion of a semiconductor substrate which is in two-layer structure or more and forming the gate electrode which uses an insulation film on a rear face as a gate film of the field transistor. CONSTITUTION:A lower layer portion Si layer 3 of a substrate is entirely eliminated to allow an insulation layer 2 to be totally exposed and then a contact hole is formed at a portion which becomes a drain of a field transistor from a rear face. Then, a metal 13 which becomes a gate electrode of the field transistor is applied onto an entire surface and a patterning is performed so that it becomes the electrode of the gate and the drain. A circuit with a smaller area can be obtained with a same configuration as a conventional input protection by using the insulation layer 2 as a gate film and forming the field transistor on a rear face in this manner.

Description

[Detailed description of the invention]

0001

[Field of Industrial Application] This invention relates to an input protection circuit that can reduce the area of the protection circuit by forming the gate electrode of the field transistor on the back surface when the input protection circuit is formed from a diode and a field transistor. .

0002

[Prior Art] Conventionally, as shown in FIG.
4(a) to (d), FIG. 5(a)
It is carried out by the conventional manufacturing method of ~(b). In FIG. 4A, a field 4 is formed on a semiconductor substrate 14 having a single layer structure by conventional LOCOS, and then a gate oxide film 5 is formed in an active area.

FIG. 4(b) shows the field 4 formed above.
, gate electrode 7 is deposited on the entire surface of gate oxide film 5 . In FIG. 4C, the gate electrode 7 deposited above is patterned into an arbitrary shape using photolithography, and then an impurity layer 6 is formed by ion implantation using the gate electrode 7 and field 4 as a mask.

In FIG. 4(d), an insulator that will become the interlayer film 8 is deposited. In FIG. 5A, a contact hole is formed in the deposited interlayer film 8 at a portion that will become the electrode portion of the impurity layer 6 by photolithography and etching. In FIG. 5B, a metal (10) (for example, Al--Si) is deposited and patterned to form the electrode of the impurity layer 6, the gate electrode 7, and the gate 10 of the field transistor.

A method of manufacturing the input protection circuit as described above is known.

[0006]

However, in the input protection circuit formed by the conventional manufacturing method, the gate electrode 7 formed to lower the withstand voltage of the diode 15 and the gate 10 of the field transistor are on the same layer plane. Therefore, there is a drawback that the area becomes large. Further, there is also a drawback that the threshold voltage (VTh) of the field transistor is determined by element isolation and there is no degree of freedom.

Therefore, the purpose of the present invention is to solve these conventional problems by using a three-layer Si substrate and providing the gate of the field transistor on the back side, thereby reducing the area and increasing the degree of freedom in VTH. That's true.

[0008]

[Means for Solving the Problems] In order to solve the above problems, the present invention provides a method for forming a source/drain of a field transistor and a gate electrode for lowering the withstand voltage of a diode on the upper part of a semiconductor substrate having a two-layer structure or more. By forming a gate electrode using the insulating film on the back surface as the gate film of the field transistor, it was possible to reduce the area of the input circuit.

[0009]

[Operation] By providing the gate electrode of the field transistor on the back side as described above, in other words, the gate electrode for lowering the diode breakdown voltage and the electrode of the field transistor can be formed on different planes, reducing the area of the input circuit. can be made smaller. Furthermore, since the gate film of the field transistor is not related to element isolation, VTH can now be set freely.

0010

EXAMPLES Examples of the present invention will be described below with reference to FIGS. 1(a) to (d) and FIGS. 2(a) to (c), which are sectional views in the order of steps. As shown in FIG. 1(a), the semiconductor substrate has a three-layer structure of a Si device layer 1, an insulating layer 2, and a Si layer 3.
Using the conventional technology LOCOS on the device layer 1 side,
A field portion 4 is formed, and a gate oxide film 5 is formed in the active portion.

As shown in FIG. 1B, the gate electrode 7 (eg, made of PolySi, Policide) is patterned into an arbitrary pattern using photolithography. Then, using the ion implantation method, the gate electrode 7 is used as a mask in the active part, and the source/source of the field transistor is
An impurity layer 6 that will become a drain is formed. The bottom of the impurity layer 6 is formed in contact with the insulating layer 2 by the acceleration energy of ion implantation and heat treatment.

As shown in FIG. 1C, after depositing an insulating film that will become the interlayer film 8 over the entire surface, contact holes are formed in the impurity layer 6 and the gate electrode portion by photolithography and etching techniques. Then, as shown in FIG. 1(d), a film (for example, Al-Si, Silicide, etc.) that will become an electrode is attached and patterned by photolithography and etching.
A metal electrode 10 is formed. Then, a protective film 9 is deposited as a final protective film.

As shown in FIG. 2(a), after coating the adhesive 11 on the protective film 9, a quartz substrate 12 is used as a supporting substrate.
Attach it to the i-board. As shown in FIG. 2(b), the entire lower Si layer 3 of the substrate is removed using KOH. At this time, Si
Even if the layer 3 is completely removed, the intermediate insulating layer 2 is not etched with KOH and therefore serves as a stopper. After the entire surface of the insulating layer 2 is exposed, a contact hole is formed in the insulating layer 2 by photolithography and etching in order to obtain a contact from the back side to a portion that will become the drain of the field transistor.

Then, as shown in FIG. 2C, a metal 13 that will become the gate electrode of the field transistor is applied to the entire surface and patterned to become the gate and drain electrodes. As described above, by using the insulating layer 2 as a gate film and forming the field transistor on the back surface, a circuit with the same configuration as the conventional input protection but with a small area can be obtained.

[0015]

[Effects of the Invention] The present invention reduces the area of the input protection circuit by forming a diode with withstand voltage due to surface breakdown on the front side of a semiconductor layer-insulating layer-semiconductor layer substrate, and forming a field transistor on the back side. effective. Furthermore, since the transistors on the back side are not related to element isolation, arbitrary VTH control is possible, which also has the effect of improving the withstand voltage for input protection.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of the first half of an input protection circuit according to the present invention in the order of manufacturing steps.

FIG. 2 is a sectional view showing the second half of the manufacturing process of the input protection circuit of the present invention.

FIG. 3 is a circuit diagram of a conventional input protection circuit.

FIG. 4 is a sectional view of a conventional input protection circuit in the order of the first half of the manufacturing process.

FIG. 5 is a sectional view of a conventional input protection circuit in the latter half of the manufacturing process.

[Explanation of symbols]

1 Si device layer 2 Insulating layer 3 Si layer 4 Field 5 Gate oxide film 6 Impurity layer 7 Gate electrode 8 Interlayer film 9 Protective film 10 Metal electrode 11 Adhesive 12 Quartz substrate 13 Metal

Claims (1)

[Claims] Claim 1: In an input protection circuit composed of a diode and a field transistor, a substrate consisting of three layers: a semiconductor layer, an insulating layer, and a semiconductor layer is used, and the upper semiconductor layer is used as the source/drain of the field transistor. In addition, the first step is to form an impurity layer that also serves as a diode, the second step is to take out the electrode from the impurity layer made in the first step and form a protective film, and the entire surface of the protective film formed in the second step is The third step is to apply an adhesive and attach the quartz substrate, and after removing the lower semiconductor substrate and forming a contact hole for forming an electrode with the upper impurity layer, the gate electrode of the field transistor is removed. A method for manufacturing an input protection circuit comprising a fourth step of forming a metal electrode.